Coverage Report

Created: 2024-04-04 10:24

/__w/smoldot/smoldot/repo/target/debug/build/cranelift-codegen-aa26ad0d31859f5c/out/isle_x64.rs
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Source (jump to first uncovered line)
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// GENERATED BY ISLE. DO NOT EDIT!
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//
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// Generated automatically from the instruction-selection DSL code in:
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// - src/prelude.isle
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// - src/prelude_lower.isle
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// - src/isa/x64/inst.isle
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// - src/isa/x64/lower.isle
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// - /__w/smoldot/smoldot/repo/target/debug/build/cranelift-codegen-aa26ad0d31859f5c/out/clif_lower.isle
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use super::*;  // Pulls in all external types.
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use std::marker::PhantomData;
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/// Context during lowering: an implementation of this trait
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/// must be provided with all external constructors and extractors.
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/// A mutable borrow is passed along through all lowering logic.
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pub trait Context {
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    fn unit(&mut self, ) -> Unit;
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    fn value_type(&mut self, arg0: Value) -> Type;
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    fn u32_nonnegative(&mut self, arg0: u32) -> Option<u32>;
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    fn offset32(&mut self, arg0: Offset32) -> i32;
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    fn u32_lteq(&mut self, arg0: u32, arg1: u32) -> Option<Unit>;
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    fn u8_lteq(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
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    fn u8_lt(&mut self, arg0: u8, arg1: u8) -> Option<Unit>;
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    fn u8_as_i8(&mut self, arg0: u8) -> i8;
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    fn u8_as_u32(&mut self, arg0: u8) -> u32;
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    fn u8_as_u64(&mut self, arg0: u8) -> u64;
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    fn u16_as_u64(&mut self, arg0: u16) -> u64;
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    fn u32_as_u64(&mut self, arg0: u32) -> u64;
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    fn i32_as_i64(&mut self, arg0: i32) -> i64;
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    fn i64_as_u64(&mut self, arg0: i64) -> u64;
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    fn i64_neg(&mut self, arg0: i64) -> i64;
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    fn i8_neg(&mut self, arg0: i8) -> i8;
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    fn u128_as_u64(&mut self, arg0: u128) -> Option<u64>;
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    fn u64_as_u32(&mut self, arg0: u64) -> Option<u32>;
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    fn u64_as_i32(&mut self, arg0: u64) -> i32;
36
    fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8;
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    fn u8_shl(&mut self, arg0: u8, arg1: u8) -> u8;
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    fn u8_shr(&mut self, arg0: u8, arg1: u8) -> u8;
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    fn u8_sub(&mut self, arg0: u8, arg1: u8) -> u8;
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    fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32;
41
    fn u32_sub(&mut self, arg0: u32, arg1: u32) -> u32;
42
    fn u32_and(&mut self, arg0: u32, arg1: u32) -> u32;
43
    fn s32_add_fallible(&mut self, arg0: i32, arg1: i32) -> Option<i32>;
44
    fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64;
45
    fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64;
46
    fn u64_mul(&mut self, arg0: u64, arg1: u64) -> u64;
47
    fn u64_sdiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
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    fn u64_udiv(&mut self, arg0: u64, arg1: u64) -> Option<u64>;
49
    fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64;
50
    fn u64_or(&mut self, arg0: u64, arg1: u64) -> u64;
51
    fn u64_xor(&mut self, arg0: u64, arg1: u64) -> u64;
52
    fn u64_shl(&mut self, arg0: u64, arg1: u64) -> u64;
53
    fn imm64_shl(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
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    fn imm64_ushr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
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    fn imm64_sshr(&mut self, arg0: Type, arg1: Imm64, arg2: Imm64) -> Imm64;
56
    fn u64_not(&mut self, arg0: u64) -> u64;
57
    fn u64_eq(&mut self, arg0: u64, arg1: u64) -> bool;
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    fn u64_le(&mut self, arg0: u64, arg1: u64) -> bool;
59
    fn u64_lt(&mut self, arg0: u64, arg1: u64) -> bool;
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    fn i64_shr(&mut self, arg0: i64, arg1: i64) -> i64;
61
    fn i64_ctz(&mut self, arg0: i64) -> i64;
62
    fn i64_sextend_u64(&mut self, arg0: Type, arg1: u64) -> i64;
63
    fn i64_sextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> i64;
64
    fn u64_uextend_imm64(&mut self, arg0: Type, arg1: Imm64) -> u64;
65
    fn imm64_icmp(&mut self, arg0: Type, arg1: &IntCC, arg2: Imm64, arg3: Imm64) -> Imm64;
66
    fn u64_is_zero(&mut self, arg0: u64) -> bool;
67
    fn i64_is_zero(&mut self, arg0: i64) -> bool;
68
    fn u64_is_odd(&mut self, arg0: u64) -> bool;
69
    fn u128_replicated_u64(&mut self, arg0: u128) -> Option<u64>;
70
    fn u64_replicated_u32(&mut self, arg0: u64) -> Option<u64>;
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    fn u32_replicated_u16(&mut self, arg0: u64) -> Option<u64>;
72
    fn u16_replicated_u8(&mut self, arg0: u64) -> Option<u8>;
73
    fn ty_umin(&mut self, arg0: Type) -> u64;
74
    fn ty_umax(&mut self, arg0: Type) -> u64;
75
    fn ty_smin(&mut self, arg0: Type) -> u64;
76
    fn ty_smax(&mut self, arg0: Type) -> u64;
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    fn ty_bits(&mut self, arg0: Type) -> u8;
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    fn ty_bits_u16(&mut self, arg0: Type) -> u16;
79
    fn ty_bits_u64(&mut self, arg0: Type) -> u64;
80
    fn ty_mask(&mut self, arg0: Type) -> u64;
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    fn ty_lane_mask(&mut self, arg0: Type) -> u64;
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    fn ty_lane_count(&mut self, arg0: Type) -> u64;
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    fn ty_bytes(&mut self, arg0: Type) -> u16;
84
    fn lane_type(&mut self, arg0: Type) -> Type;
85
    fn ty_half_lanes(&mut self, arg0: Type) -> Option<Type>;
86
    fn ty_half_width(&mut self, arg0: Type) -> Option<Type>;
87
    fn ty_equal(&mut self, arg0: Type, arg1: Type) -> bool;
88
    fn mem_flags_trusted(&mut self, ) -> MemFlags;
89
    fn intcc_swap_args(&mut self, arg0: &IntCC) -> IntCC;
90
    fn intcc_complement(&mut self, arg0: &IntCC) -> IntCC;
91
    fn intcc_without_eq(&mut self, arg0: &IntCC) -> IntCC;
92
    fn floatcc_swap_args(&mut self, arg0: &FloatCC) -> FloatCC;
93
    fn floatcc_complement(&mut self, arg0: &FloatCC) -> FloatCC;
94
    fn floatcc_unordered(&mut self, arg0: &FloatCC) -> bool;
95
    fn fits_in_16(&mut self, arg0: Type) -> Option<Type>;
96
    fn fits_in_32(&mut self, arg0: Type) -> Option<Type>;
97
    fn lane_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
98
    fn fits_in_64(&mut self, arg0: Type) -> Option<Type>;
99
    fn ty_32(&mut self, arg0: Type) -> Option<Type>;
100
    fn ty_64(&mut self, arg0: Type) -> Option<Type>;
101
    fn ty_int_ref_scalar_64_extract(&mut self, arg0: Type) -> Option<Type>;
102
    fn ty_int_ref_scalar_64(&mut self, arg0: Type) -> Option<Type>;
103
    fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>;
104
    fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>;
105
    fn ty_16_or_32(&mut self, arg0: Type) -> Option<Type>;
106
    fn int_fits_in_32(&mut self, arg0: Type) -> Option<Type>;
107
    fn ty_int_ref_64(&mut self, arg0: Type) -> Option<Type>;
108
    fn ty_int_ref_16_to_64(&mut self, arg0: Type) -> Option<Type>;
109
    fn ty_int(&mut self, arg0: Type) -> Option<Type>;
110
    fn ty_scalar(&mut self, arg0: Type) -> Option<Type>;
111
    fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>;
112
    fn ty_float_or_vec(&mut self, arg0: Type) -> Option<Type>;
113
    fn ty_vector_float(&mut self, arg0: Type) -> Option<Type>;
114
    fn ty_vector_not_float(&mut self, arg0: Type) -> Option<Type>;
115
    fn ty_vec64(&mut self, arg0: Type) -> Option<Type>;
116
    fn ty_vec64_ctor(&mut self, arg0: Type) -> Option<Type>;
117
    fn ty_vec128(&mut self, arg0: Type) -> Option<Type>;
118
    fn ty_dyn_vec64(&mut self, arg0: Type) -> Option<Type>;
119
    fn ty_dyn_vec128(&mut self, arg0: Type) -> Option<Type>;
120
    fn ty_vec64_int(&mut self, arg0: Type) -> Option<Type>;
121
    fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>;
122
    fn ty_addr64(&mut self, arg0: Type) -> Option<Type>;
123
    fn not_vec32x2(&mut self, arg0: Type) -> Option<Type>;
124
    fn not_i64x2(&mut self, arg0: Type) -> Option<()>;
125
    fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8;
126
    fn u64_from_bool(&mut self, arg0: bool) -> u64;
127
    fn u64_from_imm64(&mut self, arg0: Imm64) -> u64;
128
    fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>;
129
    fn imm64_power_of_two(&mut self, arg0: Imm64) -> Option<u64>;
130
    fn imm64(&mut self, arg0: u64) -> Imm64;
131
    fn imm64_masked(&mut self, arg0: Type, arg1: u64) -> Imm64;
132
    fn u32_from_ieee32(&mut self, arg0: Ieee32) -> u32;
133
    fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64;
134
    fn multi_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
135
    fn dynamic_lane(&mut self, arg0: Type) -> Option<(u32, u32)>;
136
    fn dynamic_int_lane(&mut self, arg0: Type) -> Option<u32>;
137
    fn dynamic_fp_lane(&mut self, arg0: Type) -> Option<u32>;
138
    fn ty_dyn64_int(&mut self, arg0: Type) -> Option<Type>;
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    fn ty_dyn128_int(&mut self, arg0: Type) -> Option<Type>;
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    fn offset32_to_i32(&mut self, arg0: Offset32) -> i32;
141
    fn i32_to_offset32(&mut self, arg0: i32) -> Offset32;
142
    fn intcc_unsigned(&mut self, arg0: &IntCC) -> IntCC;
143
    fn signed_cond_code(&mut self, arg0: &IntCC) -> Option<IntCC>;
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    fn trap_code_division_by_zero(&mut self, ) -> TrapCode;
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    fn trap_code_integer_overflow(&mut self, ) -> TrapCode;
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    fn trap_code_bad_conversion_to_integer(&mut self, ) -> TrapCode;
147
    fn range(&mut self, arg0: usize, arg1: usize) -> Range;
148
    fn range_view(&mut self, arg0: Range) -> RangeView;
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    fn value_reg(&mut self, arg0: Reg) -> ValueRegs;
150
    fn writable_value_reg(&mut self, arg0: WritableReg) -> WritableValueRegs;
151
    fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs;
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    fn writable_value_regs(&mut self, arg0: WritableReg, arg1: WritableReg) -> WritableValueRegs;
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    fn value_regs_invalid(&mut self, ) -> ValueRegs;
154
    fn output_none(&mut self, ) -> InstOutput;
155
    fn output(&mut self, arg0: ValueRegs) -> InstOutput;
156
    fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput;
157
    fn output_builder_new(&mut self, ) -> InstOutputBuilder;
158
    fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit;
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    fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput;
160
    fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg;
161
    fn is_valid_reg(&mut self, arg0: Reg) -> bool;
162
    fn invalid_reg(&mut self, ) -> Reg;
163
    fn mark_value_used(&mut self, arg0: Value) -> Unit;
164
    fn put_in_reg(&mut self, arg0: Value) -> Reg;
165
    fn put_in_regs(&mut self, arg0: Value) -> ValueRegs;
166
    fn ensure_in_vreg(&mut self, arg0: Reg, arg1: Type) -> Reg;
167
    fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg;
168
    fn value_regs_len(&mut self, arg0: ValueRegs) -> usize;
169
    fn preg_to_reg(&mut self, arg0: PReg) -> Reg;
170
    fn add_range_fact(&mut self, arg0: Reg, arg1: u16, arg2: u64, arg3: u64) -> Reg;
171
    fn single_target(&mut self, arg0: &MachLabelSlice) -> Option<MachLabel>;
172
    fn two_targets(&mut self, arg0: &MachLabelSlice) -> Option<(MachLabel, MachLabel)>;
173
    fn jump_table_targets(&mut self, arg0: &MachLabelSlice) -> Option<(MachLabel, BoxVecMachLabel)>;
174
    fn jump_table_size(&mut self, arg0: &BoxVecMachLabel) -> u32;
175
    fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice;
176
    fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>;
177
    fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>;
178
    fn value_slice_len(&mut self, arg0: ValueSlice) -> usize;
179
    fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value;
180
    fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg;
181
    fn inst_results(&mut self, arg0: Inst) -> ValueSlice;
182
    fn first_result(&mut self, arg0: Inst) -> Option<Value>;
183
    fn inst_data(&mut self, arg0: Inst) -> InstructionData;
184
    fn def_inst(&mut self, arg0: Value) -> Option<Inst>;
185
    fn i64_from_iconst(&mut self, arg0: Value) -> Option<i64>;
186
    fn zero_value(&mut self, arg0: Value) -> Option<Value>;
187
    fn is_sinkable_inst(&mut self, arg0: Value) -> Option<Inst>;
188
    fn maybe_uextend(&mut self, arg0: Value) -> Option<Value>;
189
    fn simm32(&mut self, arg0: Imm64) -> Option<i32>;
190
    fn uimm8(&mut self, arg0: Imm64) -> Option<u8>;
191
    fn emit(&mut self, arg0: &MInst) -> Unit;
192
    fn sink_inst(&mut self, arg0: Inst) -> Unit;
193
    fn emit_u64_le_const(&mut self, arg0: u64) -> VCodeConstant;
194
    fn emit_u128_le_const(&mut self, arg0: u128) -> VCodeConstant;
195
    fn const_to_vconst(&mut self, arg0: Constant) -> VCodeConstant;
196
    fn tls_model(&mut self, arg0: Type) -> TlsModel;
197
    fn tls_model_is_elf_gd(&mut self, ) -> Option<Unit>;
198
    fn tls_model_is_macho(&mut self, ) -> Option<Unit>;
199
    fn tls_model_is_coff(&mut self, ) -> Option<Unit>;
200
    fn preserve_frame_pointers(&mut self, ) -> Option<Unit>;
201
    fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName;
202
    fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance);
203
    fn symbol_value_data(&mut self, arg0: GlobalValue) -> Option<(ExternalName, RelocDistance, i64)>;
204
    fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>;
205
    fn vec_mask_from_immediate(&mut self, arg0: Immediate) -> Option<VecMask>;
206
    fn u128_from_immediate(&mut self, arg0: Immediate) -> Option<u128>;
207
    fn vconst_from_immediate(&mut self, arg0: Immediate) -> Option<VCodeConstant>;
208
    fn u128_from_constant(&mut self, arg0: Constant) -> Option<u128>;
209
    fn u64_from_constant(&mut self, arg0: Constant) -> Option<u64>;
210
    fn shuffle64_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8)>;
211
    fn shuffle32_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8)>;
212
    fn shuffle16_from_imm(&mut self, arg0: Immediate) -> Option<(u8, u8, u8, u8, u8, u8, u8, u8)>;
213
    fn only_writable_reg(&mut self, arg0: WritableValueRegs) -> Option<WritableReg>;
214
    fn writable_regs_get(&mut self, arg0: WritableValueRegs, arg1: usize) -> WritableReg;
215
    fn abi_num_args(&mut self, arg0: Sig) -> usize;
216
    fn abi_get_arg(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
217
    fn abi_num_rets(&mut self, arg0: Sig) -> usize;
218
    fn abi_get_ret(&mut self, arg0: Sig, arg1: usize) -> ABIArg;
219
    fn abi_ret_arg(&mut self, arg0: Sig) -> Option<ABIArg>;
220
    fn abi_no_ret_arg(&mut self, arg0: Sig) -> Option<()>;
221
    fn abi_sized_stack_arg_space(&mut self, arg0: Sig) -> i64;
222
    fn abi_sized_stack_ret_space(&mut self, arg0: Sig) -> i64;
223
    fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst;
224
    fn abi_dynamic_stackslot_addr(&mut self, arg0: WritableReg, arg1: DynamicStackSlot) -> MInst;
225
    fn abi_arg_only_slot(&mut self, arg0: &ABIArg) -> Option<ABIArgSlot>;
226
    fn abi_arg_struct_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, u64)>;
227
    fn abi_arg_implicit_pointer(&mut self, arg0: &ABIArg) -> Option<(ABIArgSlot, i64, Type)>;
228
    fn real_reg_to_reg(&mut self, arg0: RealReg) -> Reg;
229
    fn real_reg_to_writable_reg(&mut self, arg0: RealReg) -> WritableReg;
230
    fn gen_move(&mut self, arg0: Type, arg1: WritableReg, arg2: Reg) -> MInst;
231
    fn gen_return(&mut self, arg0: ValueSlice) -> Unit;
232
    fn gen_return_call(&mut self, arg0: SigRef, arg1: ExternalName, arg2: RelocDistance, arg3: ValueSlice) -> InstOutput;
233
    fn gen_return_call_indirect(&mut self, arg0: SigRef, arg1: Value, arg2: ValueSlice) -> InstOutput;
234
    fn safe_divisor_from_imm64(&mut self, arg0: Type, arg1: Imm64) -> Option<u64>;
235
    fn operand_size_of_type_32_64(&mut self, arg0: Type) -> OperandSize;
236
    fn raw_operand_size_of_type(&mut self, arg0: Type) -> OperandSize;
237
    fn put_in_reg_mem_imm(&mut self, arg0: Value) -> RegMemImm;
238
    fn put_in_reg_mem(&mut self, arg0: Value) -> RegMem;
239
    fn synthetic_amode_to_reg_mem(&mut self, arg0: &SyntheticAmode) -> RegMem;
240
    fn amode_to_synthetic_amode(&mut self, arg0: &Amode) -> SyntheticAmode;
241
    fn sum_extend_fits_in_32_bits(&mut self, arg0: Type, arg1: Imm64, arg2: Offset32) -> Option<u32>;
242
    fn amode_offset(&mut self, arg0: &Amode, arg1: i32) -> Amode;
243
    fn zero_offset(&mut self, ) -> Offset32;
244
    fn intcc_to_cc(&mut self, arg0: &IntCC) -> CC;
245
    fn cc_invert(&mut self, arg0: &CC) -> CC;
246
    fn cc_nz_or_z(&mut self, arg0: &CC) -> Option<CC>;
247
    fn encode_fcmp_imm(&mut self, arg0: &FcmpImm) -> u8;
248
    fn encode_round_imm(&mut self, arg0: &RoundImm) -> u8;
249
    fn imm8_reg_to_imm8_gpr(&mut self, arg0: &Imm8Reg) -> Imm8Gpr;
250
    fn gpr_from_imm8_gpr(&mut self, arg0: &Imm8Gpr) -> Option<Gpr>;
251
    fn imm8_from_imm8_gpr(&mut self, arg0: &Imm8Gpr) -> Option<u8>;
252
    fn writable_gpr_to_reg(&mut self, arg0: WritableGpr) -> WritableReg;
253
    fn writable_xmm_to_reg(&mut self, arg0: WritableXmm) -> WritableReg;
254
    fn writable_reg_to_xmm(&mut self, arg0: WritableReg) -> WritableXmm;
255
    fn writable_xmm_to_xmm(&mut self, arg0: WritableXmm) -> Xmm;
256
    fn writable_gpr_to_gpr(&mut self, arg0: WritableGpr) -> Gpr;
257
    fn gpr_to_reg(&mut self, arg0: Gpr) -> Reg;
258
    fn gpr_to_gpr_mem(&mut self, arg0: Gpr) -> GprMem;
259
    fn gpr_to_gpr_mem_imm(&mut self, arg0: Gpr) -> GprMemImm;
260
    fn xmm_to_reg(&mut self, arg0: Xmm) -> Reg;
261
    fn xmm_to_xmm_mem_imm(&mut self, arg0: Xmm) -> XmmMemImm;
262
    fn xmm_mem_to_xmm_mem_imm(&mut self, arg0: &XmmMem) -> XmmMemImm;
263
    fn xmm_mem_to_xmm_mem_aligned(&mut self, arg0: &XmmMem) -> XmmMemAligned;
264
    fn xmm_mem_imm_to_xmm_mem_aligned_imm(&mut self, arg0: &XmmMemImm) -> XmmMemAlignedImm;
265
    fn temp_writable_gpr(&mut self, ) -> WritableGpr;
266
    fn temp_writable_xmm(&mut self, ) -> WritableXmm;
267
    fn reg_mem_to_xmm_mem(&mut self, arg0: &RegMem) -> XmmMem;
268
    fn reg_to_reg_mem_imm(&mut self, arg0: Reg) -> RegMemImm;
269
    fn gpr_mem_imm_new(&mut self, arg0: &RegMemImm) -> GprMemImm;
270
    fn xmm_mem_imm_new(&mut self, arg0: &RegMemImm) -> XmmMemImm;
271
    fn xmm_to_xmm_mem(&mut self, arg0: Xmm) -> XmmMem;
272
    fn xmm_mem_to_reg_mem(&mut self, arg0: &XmmMem) -> RegMem;
273
    fn gpr_mem_to_reg_mem(&mut self, arg0: &GprMem) -> RegMem;
274
    fn xmm_new(&mut self, arg0: Reg) -> Xmm;
275
    fn gpr_new(&mut self, arg0: Reg) -> Gpr;
276
    fn reg_mem_to_gpr_mem(&mut self, arg0: &RegMem) -> GprMem;
277
    fn reg_to_gpr_mem(&mut self, arg0: Reg) -> GprMem;
278
    fn put_in_xmm_mem(&mut self, arg0: Value) -> XmmMem;
279
    fn put_in_xmm_mem_imm(&mut self, arg0: Value) -> XmmMemImm;
280
    fn gpr_to_imm8_gpr(&mut self, arg0: Gpr) -> Imm8Gpr;
281
    fn imm8_to_imm8_gpr(&mut self, arg0: u8) -> Imm8Gpr;
282
    fn xmi_imm(&mut self, arg0: u32) -> XmmMemImm;
283
    fn type_register_class(&mut self, arg0: Type) -> Option<RegisterClass>;
284
    fn use_avx512vl(&mut self, ) -> bool;
285
    fn use_avx512dq(&mut self, ) -> bool;
286
    fn use_avx512f(&mut self, ) -> bool;
287
    fn use_avx512bitalg(&mut self, ) -> bool;
288
    fn use_avx512vbmi(&mut self, ) -> bool;
289
    fn use_lzcnt(&mut self, ) -> bool;
290
    fn use_bmi1(&mut self, ) -> bool;
291
    fn use_bmi2(&mut self, ) -> bool;
292
    fn use_popcnt(&mut self, ) -> bool;
293
    fn use_fma(&mut self, ) -> bool;
294
    fn use_ssse3(&mut self, ) -> bool;
295
    fn use_sse41(&mut self, ) -> bool;
296
    fn use_sse42(&mut self, ) -> bool;
297
    fn use_avx(&mut self, ) -> bool;
298
    fn use_avx2(&mut self, ) -> bool;
299
    fn imm8_from_value(&mut self, arg0: Value) -> Option<Imm8Reg>;
300
    fn const_to_type_masked_imm8(&mut self, arg0: u64, arg1: Type) -> Imm8Gpr;
301
    fn shift_mask(&mut self, arg0: Type) -> u8;
302
    fn shift_amount_masked(&mut self, arg0: Type, arg1: Imm64) -> u8;
303
    fn simm32_from_value(&mut self, arg0: Value) -> Option<GprMemImm>;
304
    fn simm32_from_imm64(&mut self, arg0: Imm64) -> Option<GprMemImm>;
305
    fn sinkable_load(&mut self, arg0: Value) -> Option<SinkableLoad>;
306
    fn sinkable_load_exact(&mut self, arg0: Value) -> Option<SinkableLoad>;
307
    fn sink_load(&mut self, arg0: &SinkableLoad) -> SyntheticAmode;
308
    fn ext_mode(&mut self, arg0: u16, arg1: u16) -> ExtMode;
309
    fn gen_call(&mut self, arg0: SigRef, arg1: ExternalName, arg2: RelocDistance, arg3: ValueSlice) -> InstOutput;
310
    fn gen_call_indirect(&mut self, arg0: SigRef, arg1: Value, arg2: ValueSlice) -> InstOutput;
311
    fn nonzero_u64_fits_in_u32(&mut self, arg0: u64) -> Option<u64>;
312
    fn ty_int_bool_or_ref(&mut self, arg0: Type) -> Option<()>;
313
    fn atomic_rmw_op_to_mach_atomic_rmw_op(&mut self, arg0: &AtomicRmwOp) -> MachAtomicRmwOp;
314
    fn shuffle_0_31_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
315
    fn shuffle_0_15_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
316
    fn shuffle_16_31_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
317
    fn perm_from_mask(&mut self, arg0: &VecMask) -> VCodeConstant;
318
    fn perm_from_mask_with_zeros(&mut self, arg0: &VecMask) -> Option<(VCodeConstant, VCodeConstant)>;
319
    fn const_to_synthetic_amode(&mut self, arg0: VCodeConstant) -> SyntheticAmode;
320
    fn preg_rbp(&mut self, ) -> PReg;
321
    fn preg_rsp(&mut self, ) -> PReg;
322
    fn preg_pinned(&mut self, ) -> PReg;
323
    fn libcall_1(&mut self, arg0: &LibCall, arg1: Reg) -> Reg;
324
    fn libcall_2(&mut self, arg0: &LibCall, arg1: Reg, arg2: Reg) -> Reg;
325
    fn libcall_3(&mut self, arg0: &LibCall, arg1: Reg, arg2: Reg, arg3: Reg) -> Reg;
326
    fn ishl_i8x16_mask_for_const(&mut self, arg0: u32) -> SyntheticAmode;
327
    fn ishl_i8x16_mask_table(&mut self, ) -> SyntheticAmode;
328
    fn ushr_i8x16_mask_for_const(&mut self, arg0: u32) -> SyntheticAmode;
329
    fn ushr_i8x16_mask_table(&mut self, ) -> SyntheticAmode;
330
    fn vconst_all_ones_or_all_zeros(&mut self, arg0: Constant) -> Option<()>;
331
    fn insert_i8x16_lane_hole(&mut self, arg0: u8) -> VCodeConstant;
332
    fn sse_insertps_lane_imm(&mut self, arg0: u8) -> u8;
333
    fn pblendw_imm(&mut self, arg0: Immediate) -> Option<u8>;
334
    fn palignr_imm_from_immediate(&mut self, arg0: Immediate) -> Option<u8>;
335
    fn pshuflw_lhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
336
    fn pshuflw_rhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
337
    fn pshufhw_lhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
338
    fn pshufhw_rhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
339
    fn pshufd_lhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
340
    fn pshufd_rhs_imm(&mut self, arg0: Immediate) -> Option<u8>;
341
    fn shufps_imm(&mut self, arg0: Immediate) -> Option<u8>;
342
    fn shufps_rev_imm(&mut self, arg0: Immediate) -> Option<u8>;
343
    fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value);
344
    fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2;
345
    fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value);
346
    fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3;
347
    fn unpack_block_array_2(&mut self, arg0: &BlockArray2) -> (BlockCall, BlockCall);
348
    fn pack_block_array_2(&mut self, arg0: BlockCall, arg1: BlockCall) -> BlockArray2;
349
}
350
351
pub trait ContextIter {
352
    type Context;
353
    type Output;
354
    fn next(&mut self, ctx: &mut Self::Context) -> Option<Self::Output>;
355
0
    fn size_hint(&self) -> (usize, Option<usize>) { (0, None) }
356
}
357
358
pub trait IntoContextIter {
359
    type Context;
360
    type Output;
361
    type IntoIter: ContextIter<Context = Self::Context, Output = Self::Output>;
362
    fn into_context_iter(self) -> Self::IntoIter;
363
}
364
365
pub trait Length {
366
    fn len(&self) -> usize;
367
}
368
369
impl<T> Length for std::vec::Vec<T> {
370
0
    fn len(&self) -> usize {
371
0
        std::vec::Vec::len(self)
372
0
    }
373
}
374
375
pub struct ContextIterWrapper<I, C> {
376
    iter: I,
377
    _ctx: std::marker::PhantomData<C>,
378
}
379
impl<I: Default, C> Default for ContextIterWrapper<I, C> {
380
0
    fn default() -> Self {
381
0
        ContextIterWrapper {
382
0
            iter: I::default(),
383
0
            _ctx: std::marker::PhantomData
384
0
        }
385
0
    }
386
}
387
impl<I, C> std::ops::Deref for ContextIterWrapper<I, C> {
388
    type Target = I;
389
0
    fn deref(&self) -> &I {
390
0
        &self.iter
391
0
    }
392
}
393
impl<I, C> std::ops::DerefMut for ContextIterWrapper<I, C> {
394
0
    fn deref_mut(&mut self) -> &mut I {
395
0
        &mut self.iter
396
0
    }
397
}
398
impl<I: Iterator, C: Context> From<I> for ContextIterWrapper<I, C> {
399
0
    fn from(iter: I) -> Self {
400
0
        Self { iter, _ctx: std::marker::PhantomData }
401
0
    }
402
}
403
impl<I: Iterator, C: Context> ContextIter for ContextIterWrapper<I, C> {
404
    type Context = C;
405
    type Output = I::Item;
406
0
    fn next(&mut self, _ctx: &mut Self::Context) -> Option<Self::Output> {
407
0
        self.iter.next()
408
0
    }
409
0
    fn size_hint(&self) -> (usize, Option<usize>) {
410
0
        self.iter.size_hint()
411
0
    }
412
}
413
impl<I: IntoIterator, C: Context> IntoContextIter for ContextIterWrapper<I, C> {
414
    type Context = C;
415
    type Output = I::Item;
416
    type IntoIter = ContextIterWrapper<I::IntoIter, C>;
417
0
    fn into_context_iter(self) -> Self::IntoIter {
418
0
        ContextIterWrapper {
419
0
            iter: self.iter.into_iter(),
420
0
            _ctx: std::marker::PhantomData
421
0
        }
422
0
    }
423
}
424
impl<T, E: Extend<T>, C> Extend<T> for ContextIterWrapper<E, C> {
425
0
    fn extend<I: IntoIterator<Item = T>>(&mut self, iter: I) {
426
0
        self.iter.extend(iter);
427
0
    }
428
}
429
impl<L: Length, C> Length for ContextIterWrapper<L, C> {
430
0
    fn len(&self) -> usize {
431
0
        self.iter.len()
432
0
    }
433
}
434
           
435
436
/// Internal type MultiReg: defined at src/prelude_lower.isle line 21.
437
#[derive(Clone, Debug)]
438
pub enum MultiReg {
439
    Empty,
440
    One {
441
        a: Reg,
442
    },
443
    Two {
444
        a: Reg,
445
        b: Reg,
446
    },
447
    Three {
448
        a: Reg,
449
        b: Reg,
450
        c: Reg,
451
    },
452
    Four {
453
        a: Reg,
454
        b: Reg,
455
        c: Reg,
456
        d: Reg,
457
    },
458
}
459
460
/// Internal type SideEffectNoResult: defined at src/prelude_lower.isle line 357.
461
#[derive(Clone, Debug)]
462
pub enum SideEffectNoResult {
463
    Inst {
464
        inst: MInst,
465
    },
466
    Inst2 {
467
        inst1: MInst,
468
        inst2: MInst,
469
    },
470
    Inst3 {
471
        inst1: MInst,
472
        inst2: MInst,
473
        inst3: MInst,
474
    },
475
}
476
477
/// Internal type ProducesFlags: defined at src/prelude_lower.isle line 399.
478
#[derive(Clone, Debug)]
479
pub enum ProducesFlags {
480
    AlreadyExistingFlags,
481
    ProducesFlagsSideEffect {
482
        inst: MInst,
483
    },
484
    ProducesFlagsTwiceSideEffect {
485
        inst1: MInst,
486
        inst2: MInst,
487
    },
488
    ProducesFlagsReturnsReg {
489
        inst: MInst,
490
        result: Reg,
491
    },
492
    ProducesFlagsReturnsResultWithConsumer {
493
        inst: MInst,
494
        result: Reg,
495
    },
496
}
497
498
/// Internal type ConsumesAndProducesFlags: defined at src/prelude_lower.isle line 418.
499
#[derive(Clone, Debug)]
500
pub enum ConsumesAndProducesFlags {
501
    SideEffect {
502
        inst: MInst,
503
    },
504
    ReturnsReg {
505
        inst: MInst,
506
        result: Reg,
507
    },
508
}
509
510
/// Internal type ConsumesFlags: defined at src/prelude_lower.isle line 426.
511
#[derive(Clone, Debug)]
512
pub enum ConsumesFlags {
513
    ConsumesFlagsSideEffect {
514
        inst: MInst,
515
    },
516
    ConsumesFlagsSideEffect2 {
517
        inst1: MInst,
518
        inst2: MInst,
519
    },
520
    ConsumesFlagsReturnsResultWithProducer {
521
        inst: MInst,
522
        result: Reg,
523
    },
524
    ConsumesFlagsReturnsReg {
525
        inst: MInst,
526
        result: Reg,
527
    },
528
    ConsumesFlagsTwiceReturnsValueRegs {
529
        inst1: MInst,
530
        inst2: MInst,
531
        result: ValueRegs,
532
    },
533
    ConsumesFlagsFourTimesReturnsValueRegs {
534
        inst1: MInst,
535
        inst2: MInst,
536
        inst3: MInst,
537
        inst4: MInst,
538
        result: ValueRegs,
539
    },
540
}
541
542
/// Internal type MInst: defined at src/isa/x64/inst.isle line 8.
543
#[derive(Clone)]
544
pub enum MInst {
545
    Nop {
546
        len: u8,
547
    },
548
    AluRmiR {
549
        size: OperandSize,
550
        op: AluRmiROpcode,
551
        src1: Gpr,
552
        src2: GprMemImm,
553
        dst: WritableGpr,
554
    },
555
    AluRM {
556
        size: OperandSize,
557
        op: AluRmiROpcode,
558
        src1_dst: SyntheticAmode,
559
        src2: Gpr,
560
    },
561
    AluRmRVex {
562
        size: OperandSize,
563
        op: AluRmROpcode,
564
        src1: Gpr,
565
        src2: GprMem,
566
        dst: WritableGpr,
567
    },
568
    AluConstOp {
569
        op: AluRmiROpcode,
570
        size: OperandSize,
571
        dst: WritableGpr,
572
    },
573
    UnaryRmR {
574
        size: OperandSize,
575
        op: UnaryRmROpcode,
576
        src: GprMem,
577
        dst: WritableGpr,
578
    },
579
    UnaryRmRVex {
580
        size: OperandSize,
581
        op: UnaryRmRVexOpcode,
582
        src: GprMem,
583
        dst: WritableGpr,
584
    },
585
    UnaryRmRImmVex {
586
        size: OperandSize,
587
        op: UnaryRmRImmVexOpcode,
588
        src: GprMem,
589
        dst: WritableGpr,
590
        imm: u8,
591
    },
592
    Not {
593
        size: OperandSize,
594
        src: Gpr,
595
        dst: WritableGpr,
596
    },
597
    Neg {
598
        size: OperandSize,
599
        src: Gpr,
600
        dst: WritableGpr,
601
    },
602
    Div {
603
        size: OperandSize,
604
        sign: DivSignedness,
605
        trap: TrapCode,
606
        divisor: GprMem,
607
        dividend_lo: Gpr,
608
        dividend_hi: Gpr,
609
        dst_quotient: WritableGpr,
610
        dst_remainder: WritableGpr,
611
    },
612
    Div8 {
613
        sign: DivSignedness,
614
        trap: TrapCode,
615
        divisor: GprMem,
616
        dividend: Gpr,
617
        dst: WritableGpr,
618
    },
619
    MulHi {
620
        size: OperandSize,
621
        signed: bool,
622
        src1: Gpr,
623
        src2: GprMem,
624
        dst_lo: WritableGpr,
625
        dst_hi: WritableGpr,
626
    },
627
    UMulLo {
628
        size: OperandSize,
629
        src1: Gpr,
630
        src2: GprMem,
631
        dst: WritableGpr,
632
    },
633
    CheckedSRemSeq {
634
        size: OperandSize,
635
        dividend_lo: Gpr,
636
        dividend_hi: Gpr,
637
        divisor: Gpr,
638
        dst_quotient: WritableGpr,
639
        dst_remainder: WritableGpr,
640
    },
641
    CheckedSRemSeq8 {
642
        dividend: Gpr,
643
        divisor: Gpr,
644
        dst: WritableGpr,
645
    },
646
    SignExtendData {
647
        size: OperandSize,
648
        src: Gpr,
649
        dst: WritableGpr,
650
    },
651
    Imm {
652
        dst_size: OperandSize,
653
        simm64: u64,
654
        dst: WritableGpr,
655
    },
656
    MovRR {
657
        size: OperandSize,
658
        src: Gpr,
659
        dst: WritableGpr,
660
    },
661
    MovFromPReg {
662
        src: PReg,
663
        dst: WritableGpr,
664
    },
665
    MovToPReg {
666
        src: Gpr,
667
        dst: PReg,
668
    },
669
    MovzxRmR {
670
        ext_mode: ExtMode,
671
        src: GprMem,
672
        dst: WritableGpr,
673
    },
674
    Mov64MR {
675
        src: SyntheticAmode,
676
        dst: WritableGpr,
677
    },
678
    LoadEffectiveAddress {
679
        addr: SyntheticAmode,
680
        dst: WritableGpr,
681
        size: OperandSize,
682
    },
683
    MovsxRmR {
684
        ext_mode: ExtMode,
685
        src: GprMem,
686
        dst: WritableGpr,
687
    },
688
    MovImmM {
689
        size: OperandSize,
690
        simm32: i32,
691
        dst: SyntheticAmode,
692
    },
693
    MovRM {
694
        size: OperandSize,
695
        src: Gpr,
696
        dst: SyntheticAmode,
697
    },
698
    ShiftR {
699
        size: OperandSize,
700
        kind: ShiftKind,
701
        src: Gpr,
702
        num_bits: Imm8Gpr,
703
        dst: WritableGpr,
704
    },
705
    XmmRmiReg {
706
        opcode: SseOpcode,
707
        src1: Xmm,
708
        src2: XmmMemAlignedImm,
709
        dst: WritableXmm,
710
    },
711
    CmpRmiR {
712
        size: OperandSize,
713
        opcode: CmpOpcode,
714
        src: GprMemImm,
715
        dst: Gpr,
716
    },
717
    Setcc {
718
        cc: CC,
719
        dst: WritableGpr,
720
    },
721
    Bswap {
722
        size: OperandSize,
723
        src: Gpr,
724
        dst: WritableGpr,
725
    },
726
    Cmove {
727
        size: OperandSize,
728
        cc: CC,
729
        consequent: GprMem,
730
        alternative: Gpr,
731
        dst: WritableGpr,
732
    },
733
    XmmCmove {
734
        ty: Type,
735
        cc: CC,
736
        consequent: XmmMemAligned,
737
        alternative: Xmm,
738
        dst: WritableXmm,
739
    },
740
    Push64 {
741
        src: GprMemImm,
742
    },
743
    Pop64 {
744
        dst: WritableGpr,
745
    },
746
    StackProbeLoop {
747
        tmp: WritableReg,
748
        frame_size: u32,
749
        guard_size: u32,
750
    },
751
    XmmRmR {
752
        op: SseOpcode,
753
        src1: Xmm,
754
        src2: XmmMemAligned,
755
        dst: WritableXmm,
756
    },
757
    XmmRmRUnaligned {
758
        op: SseOpcode,
759
        src1: Xmm,
760
        src2: XmmMem,
761
        dst: WritableXmm,
762
    },
763
    XmmRmRBlend {
764
        op: SseOpcode,
765
        src1: Xmm,
766
        src2: XmmMemAligned,
767
        mask: Xmm,
768
        dst: WritableXmm,
769
    },
770
    XmmRmiRVex {
771
        op: AvxOpcode,
772
        src1: Xmm,
773
        src2: XmmMemImm,
774
        dst: WritableXmm,
775
    },
776
    XmmRmRImmVex {
777
        op: AvxOpcode,
778
        src1: Xmm,
779
        src2: XmmMem,
780
        dst: WritableXmm,
781
        imm: u8,
782
    },
783
    XmmVexPinsr {
784
        op: AvxOpcode,
785
        src1: Xmm,
786
        src2: GprMem,
787
        dst: WritableXmm,
788
        imm: u8,
789
    },
790
    XmmRmRVex3 {
791
        op: AvxOpcode,
792
        src1: Xmm,
793
        src2: Xmm,
794
        src3: XmmMem,
795
        dst: WritableXmm,
796
    },
797
    XmmRmRBlendVex {
798
        op: AvxOpcode,
799
        src1: Xmm,
800
        src2: XmmMem,
801
        mask: Xmm,
802
        dst: WritableXmm,
803
    },
804
    XmmUnaryRmRVex {
805
        op: AvxOpcode,
806
        src: XmmMem,
807
        dst: WritableXmm,
808
    },
809
    XmmUnaryRmRImmVex {
810
        op: AvxOpcode,
811
        src: XmmMem,
812
        dst: WritableXmm,
813
        imm: u8,
814
    },
815
    XmmMovRMVex {
816
        op: AvxOpcode,
817
        src: Xmm,
818
        dst: SyntheticAmode,
819
    },
820
    XmmMovRMImmVex {
821
        op: AvxOpcode,
822
        src: Xmm,
823
        dst: SyntheticAmode,
824
        imm: u8,
825
    },
826
    XmmToGprImmVex {
827
        op: AvxOpcode,
828
        src: Xmm,
829
        dst: WritableGpr,
830
        imm: u8,
831
    },
832
    GprToXmmVex {
833
        op: AvxOpcode,
834
        src: GprMem,
835
        dst: WritableXmm,
836
        src_size: OperandSize,
837
    },
838
    XmmToGprVex {
839
        op: AvxOpcode,
840
        src: Xmm,
841
        dst: WritableGpr,
842
        dst_size: OperandSize,
843
    },
844
    XmmRmREvex {
845
        op: Avx512Opcode,
846
        src1: Xmm,
847
        src2: XmmMem,
848
        dst: WritableXmm,
849
    },
850
    XmmUnaryRmRImmEvex {
851
        op: Avx512Opcode,
852
        src: XmmMem,
853
        dst: WritableXmm,
854
        imm: u8,
855
    },
856
    XmmRmREvex3 {
857
        op: Avx512Opcode,
858
        src1: Xmm,
859
        src2: Xmm,
860
        src3: XmmMem,
861
        dst: WritableXmm,
862
    },
863
    XmmUnaryRmR {
864
        op: SseOpcode,
865
        src: XmmMemAligned,
866
        dst: WritableXmm,
867
    },
868
    XmmUnaryRmRUnaligned {
869
        op: SseOpcode,
870
        src: XmmMem,
871
        dst: WritableXmm,
872
    },
873
    XmmUnaryRmRImm {
874
        op: SseOpcode,
875
        src: XmmMemAligned,
876
        imm: u8,
877
        dst: WritableXmm,
878
    },
879
    XmmUnaryRmREvex {
880
        op: Avx512Opcode,
881
        src: XmmMem,
882
        dst: WritableXmm,
883
    },
884
    XmmMovRM {
885
        op: SseOpcode,
886
        src: Xmm,
887
        dst: SyntheticAmode,
888
    },
889
    XmmMovRMImm {
890
        op: SseOpcode,
891
        src: Xmm,
892
        dst: SyntheticAmode,
893
        imm: u8,
894
    },
895
    XmmToGpr {
896
        op: SseOpcode,
897
        src: Xmm,
898
        dst: WritableGpr,
899
        dst_size: OperandSize,
900
    },
901
    XmmToGprImm {
902
        op: SseOpcode,
903
        src: Xmm,
904
        dst: WritableGpr,
905
        imm: u8,
906
    },
907
    GprToXmm {
908
        op: SseOpcode,
909
        src: GprMem,
910
        dst: WritableXmm,
911
        src_size: OperandSize,
912
    },
913
    CvtIntToFloat {
914
        op: SseOpcode,
915
        src1: Xmm,
916
        src2: GprMem,
917
        dst: WritableXmm,
918
        src2_size: OperandSize,
919
    },
920
    CvtIntToFloatVex {
921
        op: AvxOpcode,
922
        src1: Xmm,
923
        src2: GprMem,
924
        dst: WritableXmm,
925
        src2_size: OperandSize,
926
    },
927
    CvtUint64ToFloatSeq {
928
        dst_size: OperandSize,
929
        src: Gpr,
930
        dst: WritableXmm,
931
        tmp_gpr1: WritableGpr,
932
        tmp_gpr2: WritableGpr,
933
    },
934
    CvtFloatToSintSeq {
935
        dst_size: OperandSize,
936
        src_size: OperandSize,
937
        is_saturating: bool,
938
        src: Xmm,
939
        dst: WritableGpr,
940
        tmp_gpr: WritableGpr,
941
        tmp_xmm: WritableXmm,
942
    },
943
    CvtFloatToUintSeq {
944
        dst_size: OperandSize,
945
        src_size: OperandSize,
946
        is_saturating: bool,
947
        src: Xmm,
948
        dst: WritableGpr,
949
        tmp_gpr: WritableGpr,
950
        tmp_xmm: WritableXmm,
951
        tmp_xmm2: WritableXmm,
952
    },
953
    XmmMinMaxSeq {
954
        size: OperandSize,
955
        is_min: bool,
956
        lhs: Xmm,
957
        rhs: Xmm,
958
        dst: WritableXmm,
959
    },
960
    XmmCmpRmR {
961
        op: SseOpcode,
962
        src: XmmMemAligned,
963
        dst: Xmm,
964
    },
965
    XmmRmRImm {
966
        op: SseOpcode,
967
        src1: Reg,
968
        src2: RegMem,
969
        dst: WritableReg,
970
        imm: u8,
971
        size: OperandSize,
972
    },
973
    CallKnown {
974
        dest: ExternalName,
975
        info: BoxCallInfo,
976
    },
977
    CallUnknown {
978
        dest: RegMem,
979
        info: BoxCallInfo,
980
    },
981
    ReturnCallKnown {
982
        callee: ExternalName,
983
        info: BoxReturnCallInfo,
984
    },
985
    ReturnCallUnknown {
986
        callee: RegMem,
987
        info: BoxReturnCallInfo,
988
    },
989
    Args {
990
        args: VecArgPair,
991
    },
992
    Rets {
993
        rets: VecRetPair,
994
    },
995
    Ret {
996
        stack_bytes_to_pop: u32,
997
    },
998
    JmpKnown {
999
        dst: MachLabel,
1000
    },
1001
    JmpIf {
1002
        cc: CC,
1003
        taken: MachLabel,
1004
    },
1005
    JmpCond {
1006
        cc: CC,
1007
        taken: MachLabel,
1008
        not_taken: MachLabel,
1009
    },
1010
    JmpTableSeq {
1011
        idx: Reg,
1012
        tmp1: WritableReg,
1013
        tmp2: WritableReg,
1014
        default_target: MachLabel,
1015
        targets: BoxVecMachLabel,
1016
    },
1017
    JmpUnknown {
1018
        target: RegMem,
1019
    },
1020
    TrapIf {
1021
        cc: CC,
1022
        trap_code: TrapCode,
1023
    },
1024
    TrapIfAnd {
1025
        cc1: CC,
1026
        cc2: CC,
1027
        trap_code: TrapCode,
1028
    },
1029
    TrapIfOr {
1030
        cc1: CC,
1031
        cc2: CC,
1032
        trap_code: TrapCode,
1033
    },
1034
    Hlt,
1035
    Ud2 {
1036
        trap_code: TrapCode,
1037
    },
1038
    LoadExtName {
1039
        dst: WritableReg,
1040
        name: BoxExternalName,
1041
        offset: i64,
1042
        distance: RelocDistance,
1043
    },
1044
    LockCmpxchg {
1045
        ty: Type,
1046
        replacement: Reg,
1047
        expected: Reg,
1048
        mem: SyntheticAmode,
1049
        dst_old: WritableReg,
1050
    },
1051
    AtomicRmwSeq {
1052
        ty: Type,
1053
        op: MachAtomicRmwOp,
1054
        mem: SyntheticAmode,
1055
        operand: Reg,
1056
        temp: WritableReg,
1057
        dst_old: WritableReg,
1058
    },
1059
    Fence {
1060
        kind: FenceKind,
1061
    },
1062
    VirtualSPOffsetAdj {
1063
        offset: i64,
1064
    },
1065
    XmmUninitializedValue {
1066
        dst: WritableXmm,
1067
    },
1068
    ElfTlsGetAddr {
1069
        symbol: ExternalName,
1070
        dst: WritableGpr,
1071
    },
1072
    MachOTlsGetAddr {
1073
        symbol: ExternalName,
1074
        dst: WritableGpr,
1075
    },
1076
    CoffTlsGetAddr {
1077
        symbol: ExternalName,
1078
        dst: WritableGpr,
1079
        tmp: WritableGpr,
1080
    },
1081
    Unwind {
1082
        inst: UnwindInst,
1083
    },
1084
    DummyUse {
1085
        reg: Reg,
1086
    },
1087
}
1088
1089
/// Internal type DivSignedness: defined at src/isa/x64/inst.isle line 719.
1090
#[derive(Copy, Clone, PartialEq, Eq, Debug)]
1091
pub enum DivSignedness {
1092
    Signed,
1093
    Unsigned,
1094
}
1095
1096
/// Internal type AluRmROpcode: defined at src/isa/x64/inst.isle line 756.
1097
#[derive(Copy, Clone, PartialEq, Eq, Debug)]
1098
pub enum AluRmROpcode {
1099
    Andn,
1100
    Sarx,
1101
    Shrx,
1102
    Shlx,
1103
    Bzhi,
1104
}
1105
1106
/// Internal type UnaryRmRVexOpcode: defined at src/isa/x64/inst.isle line 770.
1107
#[derive(Copy, Clone, PartialEq, Eq, Debug)]
1108
pub enum UnaryRmRVexOpcode {
1109
    Blsi,
1110
    Blsmsk,
1111
    Blsr,
1112
}
1113
1114
/// Internal type UnaryRmRImmVexOpcode: defined at src/isa/x64/inst.isle line 775.
1115
#[derive(Copy, Clone, PartialEq, Eq, Debug)]
1116
pub enum UnaryRmRImmVexOpcode {
1117
    Rorx,
1118
}
1119
1120
/// Internal type Amode: defined at src/isa/x64/inst.isle line 1021.
1121
#[derive(Clone, Debug)]
1122
pub enum Amode {
1123
    ImmReg {
1124
        simm32: i32,
1125
        base: Reg,
1126
        flags: MemFlags,
1127
    },
1128
    ImmRegRegShift {
1129
        simm32: i32,
1130
        base: Gpr,
1131
        index: Gpr,
1132
        shift: u8,
1133
        flags: MemFlags,
1134
    },
1135
    RipRelative {
1136
        target: MachLabel,
1137
    },
1138
}
1139
1140
/// Internal type AvxOpcode: defined at src/isa/x64/inst.isle line 1207.
1141
#[derive(Copy, Clone, PartialEq, Eq, Debug)]
1142
pub enum AvxOpcode {
1143
    Vfmadd213ss,
1144
    Vfmadd213sd,
1145
    Vfmadd213ps,
1146
    Vfmadd213pd,
1147
    Vfmadd132ss,
1148
    Vfmadd132sd,
1149
    Vfmadd132ps,
1150
    Vfmadd132pd,
1151
    Vfnmadd213ss,
1152
    Vfnmadd213sd,
1153
    Vfnmadd213ps,
1154
    Vfnmadd213pd,
1155
    Vfnmadd132ss,
1156
    Vfnmadd132sd,
1157
    Vfnmadd132ps,
1158
    Vfnmadd132pd,
1159
    Vcmpps,
1160
    Vcmppd,
1161
    Vpsrlw,
1162
    Vpsrld,
1163
    Vpsrlq,
1164
    Vpaddb,
1165
    Vpaddw,
1166
    Vpaddd,
1167
    Vpaddq,
1168
    Vpaddsb,
1169
    Vpaddsw,
1170
    Vpaddusb,
1171
    Vpaddusw,
1172
    Vpsubb,
1173
    Vpsubw,
1174
    Vpsubd,
1175
    Vpsubq,
1176
    Vpsubsb,
1177
    Vpsubsw,
1178
    Vpsubusb,
1179
    Vpsubusw,
1180
    Vpavgb,
1181
    Vpavgw,
1182
    Vpand,
1183
    Vandps,
1184
    Vandpd,
1185
    Vpor,
1186
    Vorps,
1187
    Vorpd,
1188
    Vpxor,
1189
    Vxorps,
1190
    Vxorpd,
1191
    Vpmullw,
1192
    Vpmulld,
1193
    Vpmulhw,
1194
    Vpmulhd,
1195
    Vpmulhrsw,
1196
    Vpmulhuw,
1197
    Vpmuldq,
1198
    Vpmuludq,
1199
    Vpunpckhwd,
1200
    Vpunpcklwd,
1201
    Vunpcklps,
1202
    Vunpckhps,
1203
    Vandnps,
1204
    Vandnpd,
1205
    Vpandn,
1206
    Vaddps,
1207
    Vaddpd,
1208
    Vsubps,
1209
    Vsubpd,
1210
    Vmulps,
1211
    Vmulpd,
1212
    Vdivps,
1213
    Vdivpd,
1214
    Vpcmpeqb,
1215
    Vpcmpeqw,
1216
    Vpcmpeqd,
1217
    Vpcmpeqq,
1218
    Vpcmpgtb,
1219
    Vpcmpgtw,
1220
    Vpcmpgtd,
1221
    Vpcmpgtq,
1222
    Vminps,
1223
    Vminpd,
1224
    Vmaxps,
1225
    Vmaxpd,
1226
    Vblendvpd,
1227
    Vblendvps,
1228
    Vpblendvb,
1229
    Vmovlhps,
1230
    Vpmaxsb,
1231
    Vpmaxsw,
1232
    Vpmaxsd,
1233
    Vpminsb,
1234
    Vpminsw,
1235
    Vpminsd,
1236
    Vpmaxub,
1237
    Vpmaxuw,
1238
    Vpmaxud,
1239
    Vpminub,
1240
    Vpminuw,
1241
    Vpminud,
1242
    Vpunpcklbw,
1243
    Vpunpckhbw,
1244
    Vpacksswb,
1245
    Vpackssdw,
1246
    Vpackuswb,
1247
    Vpackusdw,
1248
    Vpalignr,
1249
    Vpinsrb,
1250
    Vpinsrw,
1251
    Vpinsrd,
1252
    Vpinsrq,
1253
    Vpmaddwd,
1254
    Vpmaddubsw,
1255
    Vinsertps,
1256
    Vpshufb,
1257
    Vshufps,
1258
    Vpsllw,
1259
    Vpslld,
1260
    Vpsllq,
1261
    Vpsraw,
1262
    Vpsrad,
1263
    Vpmovsxbw,
1264
    Vpmovzxbw,
1265
    Vpmovsxwd,
1266
    Vpmovzxwd,
1267
    Vpmovsxdq,
1268
    Vpmovzxdq,
1269
    Vaddss,
1270
    Vaddsd,
1271
    Vmulss,
1272
    Vmulsd,
1273
    Vsubss,
1274
    Vsubsd,
1275
    Vdivss,
1276
    Vdivsd,
1277
    Vpabsb,
1278
    Vpabsw,
1279
    Vpabsd,
1280
    Vminss,
1281
    Vminsd,
1282
    Vmaxss,
1283
    Vmaxsd,
1284
    Vsqrtps,
1285
    Vsqrtpd,
1286
    Vroundps,
1287
    Vroundpd,
1288
    Vcvtdq2pd,
1289
    Vcvtdq2ps,
1290
    Vcvtpd2ps,
1291
    Vcvtps2pd,
1292
    Vcvttpd2dq,
1293
    Vcvttps2dq,
1294
    Vphaddw,
1295
    Vphaddd,
1296
    Vpunpckhdq,
1297
    Vpunpckldq,
1298
    Vpunpckhqdq,
1299
    Vpunpcklqdq,
1300
    Vpshuflw,
1301
    Vpshufhw,
1302
    Vpshufd,
1303
    Vmovss,
1304
    Vmovsd,
1305
    Vmovups,
1306
    Vmovupd,
1307
    Vmovdqu,
1308
    Vpextrb,
1309
    Vpextrw,
1310
    Vpextrd,
1311
    Vpextrq,
1312
    Vpblendw,
1313
    Vmovddup,
1314
    Vpbroadcastb,
1315
    Vpbroadcastw,
1316
    Vpbroadcastd,
1317
    Vbroadcastss,
1318
    Vmovd,
1319
    Vmovq,
1320
    Vmovmskps,
1321
    Vmovmskpd,
1322
    Vpmovmskb,
1323
    Vcvtsi2ss,
1324
    Vcvtsi2sd,
1325
    Vcvtss2sd,
1326
    Vcvtsd2ss,
1327
    Vsqrtss,
1328
    Vsqrtsd,
1329
    Vroundss,
1330
    Vroundsd,
1331
}
1332
1333
/// Internal type Avx512Opcode: defined at src/isa/x64/inst.isle line 1398.
1334
#[derive(Copy, Clone, PartialEq, Eq, Debug)]
1335
pub enum Avx512Opcode {
1336
    Vcvtudq2ps,
1337
    Vpabsq,
1338
    Vpermi2b,
1339
    Vpmullq,
1340
    Vpopcntb,
1341
    Vpsraq,
1342
    VpsraqImm,
1343
}
1344
1345
/// Internal type RegisterClass: defined at src/isa/x64/inst.isle line 1674.
1346
#[derive(Clone, Debug)]
1347
pub enum RegisterClass {
1348
    Gpr {
1349
        single_register: bool,
1350
    },
1351
    Xmm,
1352
}
1353
1354
/// Internal type ExtendKind: defined at src/isa/x64/inst.isle line 2144.
1355
#[derive(Copy, Clone, PartialEq, Eq, Debug)]
1356
pub enum ExtendKind {
1357
    Sign,
1358
    Zero,
1359
}
1360
1361
/// Internal type IcmpCondResult: defined at src/isa/x64/inst.isle line 4657.
1362
#[derive(Clone, Debug)]
1363
pub enum IcmpCondResult {
1364
    Condition {
1365
        producer: ProducesFlags,
1366
        cc: CC,
1367
    },
1368
}
1369
1370
/// Internal type FcmpCondResult: defined at src/isa/x64/inst.isle line 4770.
1371
#[derive(Clone, Debug)]
1372
pub enum FcmpCondResult {
1373
    Condition {
1374
        producer: ProducesFlags,
1375
        cc: CC,
1376
    },
1377
    AndCondition {
1378
        producer: ProducesFlags,
1379
        cc1: CC,
1380
        cc2: CC,
1381
    },
1382
    OrCondition {
1383
        producer: ProducesFlags,
1384
        cc1: CC,
1385
        cc2: CC,
1386
    },
1387
}
1388
1389
// Generated as internal constructor for term ty_shift_mask.
1390
0
pub fn constructor_ty_shift_mask<C: Context>(
1391
0
    ctx: &mut C,
1392
0
    arg0: Type,
1393
0
) -> u64 {
1394
0
    let v1 = C::lane_type(ctx, arg0);
1395
0
    let v2 = C::ty_bits(ctx, v1);
1396
0
    let v3 = C::u8_as_u64(ctx, v2);
1397
0
    let v5 = C::u64_sub(ctx, v3, 0x1);
1398
0
    // Rule at src/prelude.isle line 323.
1399
0
    return v5;
1400
0
}
1401
1402
// Generated as internal constructor for term output_reg.
1403
3.91M
pub fn constructor_output_reg<C: Context>(
1404
3.91M
    ctx: &mut C,
1405
3.91M
    arg0: Reg,
1406
3.91M
) -> InstOutput {
1407
3.91M
    let v1 = C::value_reg(ctx, arg0);
1408
3.91M
    let v2 = C::output(ctx, v1);
1409
3.91M
    // Rule at src/prelude_lower.isle line 73.
1410
3.91M
    return v2;
1411
3.91M
}
1412
1413
// Generated as internal constructor for term output_value.
1414
0
pub fn constructor_output_value<C: Context>(
1415
0
    ctx: &mut C,
1416
0
    arg0: Value,
1417
0
) -> InstOutput {
1418
0
    let v1 = C::put_in_regs(ctx, arg0);
1419
0
    let v2 = C::output(ctx, v1);
1420
0
    // Rule at src/prelude_lower.isle line 77.
1421
0
    return v2;
1422
0
}
1423
1424
// Generated as internal constructor for term temp_reg.
1425
0
pub fn constructor_temp_reg<C: Context>(
1426
0
    ctx: &mut C,
1427
0
    arg0: Type,
1428
0
) -> Reg {
1429
0
    let v1 = C::temp_writable_reg(ctx, arg0);
1430
0
    let v2 = C::writable_reg_to_reg(ctx, v1);
1431
0
    // Rule at src/prelude_lower.isle line 97.
1432
0
    return v2;
1433
0
}
1434
1435
// Generated as internal constructor for term value_regs_range.
1436
0
pub fn constructor_value_regs_range<C: Context>(
1437
0
    ctx: &mut C,
1438
0
    arg0: ValueRegs,
1439
0
) -> Range {
1440
0
    let v2 = C::value_regs_len(ctx, arg0);
1441
0
    let v3 = C::range(ctx, 0x0, v2);
1442
0
    // Rule at src/prelude_lower.isle line 146.
1443
0
    return v3;
1444
0
}
1445
1446
// Generated as internal constructor for term lo_reg.
1447
0
pub fn constructor_lo_reg<C: Context>(
1448
0
    ctx: &mut C,
1449
0
    arg0: Value,
1450
0
) -> Reg {
1451
0
    let v1 = C::put_in_regs(ctx, arg0);
1452
0
    let v3 = C::value_regs_get(ctx, v1, 0x0);
1453
0
    // Rule at src/prelude_lower.isle line 157.
1454
0
    return v3;
1455
0
}
1456
1457
// Generated as internal constructor for term multi_reg_to_pair_and_single.
1458
0
pub fn constructor_multi_reg_to_pair_and_single<C: Context>(
1459
0
    ctx: &mut C,
1460
0
    arg0: &MultiReg,
1461
0
) -> InstOutput {
1462
    if let &MultiReg::Three {
1463
0
        a: v1,
1464
0
        b: v2,
1465
0
        c: v3,
1466
0
    } = arg0 {
1467
0
        let v4 = C::value_regs(ctx, v1, v2);
1468
0
        let v5 = C::value_reg(ctx, v3);
1469
0
        let v6 = C::output_pair(ctx, v4, v5);
1470
0
        // Rule at src/prelude_lower.isle line 168.
1471
0
        return v6;
1472
0
    }
1473
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "multi_reg_to_pair_and_single", "src/prelude_lower.isle line 167")
1474
0
}
1475
1476
// Generated as internal constructor for term multi_reg_to_pair.
1477
0
pub fn constructor_multi_reg_to_pair<C: Context>(
1478
0
    ctx: &mut C,
1479
0
    arg0: &MultiReg,
1480
0
) -> InstOutput {
1481
    if let &MultiReg::Two {
1482
0
        a: v1,
1483
0
        b: v2,
1484
0
    } = arg0 {
1485
0
        let v3 = C::value_regs(ctx, v1, v2);
1486
0
        let v4 = C::output(ctx, v3);
1487
0
        // Rule at src/prelude_lower.isle line 173.
1488
0
        return v4;
1489
0
    }
1490
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "multi_reg_to_pair", "src/prelude_lower.isle line 172")
1491
0
}
1492
1493
// Generated as internal constructor for term multi_reg_to_single.
1494
0
pub fn constructor_multi_reg_to_single<C: Context>(
1495
0
    ctx: &mut C,
1496
0
    arg0: &MultiReg,
1497
0
) -> InstOutput {
1498
    if let &MultiReg::One {
1499
0
        a: v1,
1500
0
    } = arg0 {
1501
0
        let v2 = C::value_reg(ctx, v1);
1502
0
        let v3 = C::output(ctx, v2);
1503
0
        // Rule at src/prelude_lower.isle line 178.
1504
0
        return v3;
1505
0
    }
1506
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "multi_reg_to_single", "src/prelude_lower.isle line 177")
1507
0
}
1508
1509
// Generated as internal constructor for term emit_side_effect.
1510
1.81M
pub fn constructor_emit_side_effect<C: Context>(
1511
1.81M
    ctx: &mut C,
1512
1.81M
    arg0: &SideEffectNoResult,
1513
1.81M
) -> Unit {
1514
1.81M
    match arg0 {
1515
        &SideEffectNoResult::Inst {
1516
1.40M
            inst: ref v1,
1517
1.40M
        } => {
1518
1.40M
            let v2 = C::emit(ctx, v1);
1519
1.40M
            // Rule at src/prelude_lower.isle line 367.
1520
1.40M
            return v2;
1521
        }
1522
        &SideEffectNoResult::Inst2 {
1523
406k
            inst1: ref v3,
1524
406k
            inst2: ref v4,
1525
406k
        } => {
1526
406k
            let v5 = C::emit(ctx, v3);
1527
406k
            let v6 = C::emit(ctx, v4);
1528
406k
            // Rule at src/prelude_lower.isle line 369.
1529
406k
            return v6;
1530
        }
1531
        &SideEffectNoResult::Inst3 {
1532
0
            inst1: ref v7,
1533
0
            inst2: ref v8,
1534
0
            inst3: ref v9,
1535
0
        } => {
1536
0
            let v10 = C::emit(ctx, v7);
1537
0
            let v11 = C::emit(ctx, v8);
1538
0
            let v12 = C::emit(ctx, v9);
1539
0
            // Rule at src/prelude_lower.isle line 372.
1540
0
            return v12;
1541
        }
1542
0
        _ => {}
1543
0
    }
1544
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "emit_side_effect", "src/prelude_lower.isle line 366")
1545
1.81M
}
1546
1547
// Generated as internal constructor for term side_effect.
1548
1.08M
pub fn constructor_side_effect<C: Context>(
1549
1.08M
    ctx: &mut C,
1550
1.08M
    arg0: &SideEffectNoResult,
1551
1.08M
) -> InstOutput {
1552
1.08M
    let v1 = constructor_emit_side_effect(ctx, arg0);
1553
1.08M
    let v2 = C::output_none(ctx);
1554
1.08M
    // Rule at src/prelude_lower.isle line 380.
1555
1.08M
    return v2;
1556
1.08M
}
1557
1558
// Generated as internal constructor for term side_effect_concat.
1559
0
pub fn constructor_side_effect_concat<C: Context>(
1560
0
    ctx: &mut C,
1561
0
    arg0: &SideEffectNoResult,
1562
0
    arg1: &SideEffectNoResult,
1563
0
) -> SideEffectNoResult {
1564
0
    match arg0 {
1565
        &SideEffectNoResult::Inst {
1566
0
            inst: ref v1,
1567
0
        } => {
1568
0
            match arg1 {
1569
                &SideEffectNoResult::Inst {
1570
0
                    inst: ref v3,
1571
0
                } => {
1572
0
                    let v4 = SideEffectNoResult::Inst2 {
1573
0
                        inst1: v1.clone(),
1574
0
                        inst2: v3.clone(),
1575
0
                    };
1576
0
                    // Rule at src/prelude_lower.isle line 385.
1577
0
                    return v4;
1578
                }
1579
                &SideEffectNoResult::Inst2 {
1580
0
                    inst1: ref v5,
1581
0
                    inst2: ref v6,
1582
0
                } => {
1583
0
                    let v7 = SideEffectNoResult::Inst3 {
1584
0
                        inst1: v1.clone(),
1585
0
                        inst2: v5.clone(),
1586
0
                        inst3: v6.clone(),
1587
0
                    };
1588
0
                    // Rule at src/prelude_lower.isle line 387.
1589
0
                    return v7;
1590
                }
1591
0
                _ => {}
1592
            }
1593
        }
1594
        &SideEffectNoResult::Inst2 {
1595
0
            inst1: ref v8,
1596
0
            inst2: ref v9,
1597
        } => {
1598
            if let &SideEffectNoResult::Inst {
1599
0
                inst: ref v3,
1600
0
            } = arg1 {
1601
0
                let v10 = SideEffectNoResult::Inst3 {
1602
0
                    inst1: v8.clone(),
1603
0
                    inst2: v9.clone(),
1604
0
                    inst3: v3.clone(),
1605
0
                };
1606
0
                // Rule at src/prelude_lower.isle line 389.
1607
0
                return v10;
1608
0
            }
1609
        }
1610
0
        _ => {}
1611
    }
1612
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "side_effect_concat", "src/prelude_lower.isle line 384")
1613
0
}
1614
1615
// Generated as internal constructor for term produces_flags_concat.
1616
0
pub fn constructor_produces_flags_concat<C: Context>(
1617
0
    ctx: &mut C,
1618
0
    arg0: &ProducesFlags,
1619
0
    arg1: &ProducesFlags,
1620
0
) -> ProducesFlags {
1621
    if let &ProducesFlags::ProducesFlagsSideEffect {
1622
0
        inst: ref v1,
1623
0
    } = arg0 {
1624
        if let &ProducesFlags::ProducesFlagsSideEffect {
1625
0
            inst: ref v3,
1626
0
        } = arg1 {
1627
0
            let v4 = ProducesFlags::ProducesFlagsTwiceSideEffect {
1628
0
                inst1: v1.clone(),
1629
0
                inst2: v3.clone(),
1630
0
            };
1631
0
            // Rule at src/prelude_lower.isle line 414.
1632
0
            return v4;
1633
0
        }
1634
0
    }
1635
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "produces_flags_concat", "src/prelude_lower.isle line 413")
1636
0
}
1637
1638
// Generated as internal constructor for term produces_flags_get_reg.
1639
0
pub fn constructor_produces_flags_get_reg<C: Context>(
1640
0
    ctx: &mut C,
1641
0
    arg0: &ProducesFlags,
1642
0
) -> Reg {
1643
0
    match arg0 {
1644
        &ProducesFlags::ProducesFlagsReturnsReg {
1645
0
            inst: ref v1,
1646
0
            result: v2,
1647
0
        } => {
1648
0
            // Rule at src/prelude_lower.isle line 444.
1649
0
            return v2;
1650
        }
1651
        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
1652
0
            inst: ref v3,
1653
0
            result: v4,
1654
0
        } => {
1655
0
            // Rule at src/prelude_lower.isle line 445.
1656
0
            return v4;
1657
        }
1658
0
        _ => {}
1659
0
    }
1660
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "produces_flags_get_reg", "src/prelude_lower.isle line 443")
1661
0
}
1662
1663
// Generated as internal constructor for term produces_flags_ignore.
1664
0
pub fn constructor_produces_flags_ignore<C: Context>(
1665
0
    ctx: &mut C,
1666
0
    arg0: &ProducesFlags,
1667
0
) -> ProducesFlags {
1668
0
    match arg0 {
1669
        &ProducesFlags::ProducesFlagsReturnsReg {
1670
0
            inst: ref v1,
1671
0
            result: v2,
1672
0
        } => {
1673
0
            let v3 = ProducesFlags::ProducesFlagsSideEffect {
1674
0
                inst: v1.clone(),
1675
0
            };
1676
0
            // Rule at src/prelude_lower.isle line 450.
1677
0
            return v3;
1678
        }
1679
        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
1680
0
            inst: ref v4,
1681
0
            result: v5,
1682
0
        } => {
1683
0
            let v6 = ProducesFlags::ProducesFlagsSideEffect {
1684
0
                inst: v4.clone(),
1685
0
            };
1686
0
            // Rule at src/prelude_lower.isle line 452.
1687
0
            return v6;
1688
        }
1689
0
        _ => {}
1690
0
    }
1691
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "produces_flags_ignore", "src/prelude_lower.isle line 449")
1692
0
}
1693
1694
// Generated as internal constructor for term consumes_flags_concat.
1695
0
pub fn constructor_consumes_flags_concat<C: Context>(
1696
0
    ctx: &mut C,
1697
0
    arg0: &ConsumesFlags,
1698
0
    arg1: &ConsumesFlags,
1699
0
) -> ConsumesFlags {
1700
0
    match arg0 {
1701
        &ConsumesFlags::ConsumesFlagsSideEffect {
1702
0
            inst: ref v8,
1703
        } => {
1704
            if let &ConsumesFlags::ConsumesFlagsSideEffect {
1705
0
                inst: ref v9,
1706
0
            } = arg1 {
1707
0
                let v10 = ConsumesFlags::ConsumesFlagsSideEffect2 {
1708
0
                    inst1: v8.clone(),
1709
0
                    inst2: v9.clone(),
1710
0
                };
1711
0
                // Rule at src/prelude_lower.isle line 465.
1712
0
                return v10;
1713
0
            }
1714
        }
1715
        &ConsumesFlags::ConsumesFlagsReturnsReg {
1716
0
            inst: ref v1,
1717
0
            result: v2,
1718
        } => {
1719
            if let &ConsumesFlags::ConsumesFlagsReturnsReg {
1720
0
                inst: ref v4,
1721
0
                result: v5,
1722
0
            } = arg1 {
1723
0
                let v6 = C::value_regs(ctx, v2, v5);
1724
0
                let v7 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
1725
0
                    inst1: v1.clone(),
1726
0
                    inst2: v4.clone(),
1727
0
                    result: v6,
1728
0
                };
1729
0
                // Rule at src/prelude_lower.isle line 459.
1730
0
                return v7;
1731
0
            }
1732
        }
1733
0
        _ => {}
1734
    }
1735
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "consumes_flags_concat", "src/prelude_lower.isle line 458")
1736
0
}
1737
1738
// Generated as internal constructor for term with_flags.
1739
90.5k
pub fn constructor_with_flags<C: Context>(
1740
90.5k
    ctx: &mut C,
1741
90.5k
    arg0: &ProducesFlags,
1742
90.5k
    arg1: &ConsumesFlags,
1743
90.5k
) -> ValueRegs {
1744
90.5k
    match arg0 {
1745
        &ProducesFlags::ProducesFlagsSideEffect {
1746
90.5k
            inst: ref v12,
1747
90.5k
        } => {
1748
90.5k
            match arg1 {
1749
                &ConsumesFlags::ConsumesFlagsReturnsReg {
1750
90.5k
                    inst: ref v13,
1751
90.5k
                    result: v14,
1752
90.5k
                } => {
1753
90.5k
                    let v15 = C::emit(ctx, v12);
1754
90.5k
                    let v16 = C::emit(ctx, v13);
1755
90.5k
                    let v17 = C::value_reg(ctx, v14);
1756
90.5k
                    // Rule at src/prelude_lower.isle line 496.
1757
90.5k
                    return v17;
1758
                }
1759
                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
1760
0
                    inst1: ref v18,
1761
0
                    inst2: ref v19,
1762
0
                    result: v20,
1763
0
                } => {
1764
0
                    let v15 = C::emit(ctx, v12);
1765
0
                    let v21 = C::emit(ctx, v18);
1766
0
                    let v22 = C::emit(ctx, v19);
1767
0
                    // Rule at src/prelude_lower.isle line 502.
1768
0
                    return v20;
1769
                }
1770
                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
1771
0
                    inst1: ref v23,
1772
0
                    inst2: ref v24,
1773
0
                    inst3: ref v25,
1774
0
                    inst4: ref v26,
1775
0
                    result: v27,
1776
0
                } => {
1777
0
                    let v15 = C::emit(ctx, v12);
1778
0
                    let v28 = C::emit(ctx, v23);
1779
0
                    let v29 = C::emit(ctx, v24);
1780
0
                    let v30 = C::emit(ctx, v25);
1781
0
                    let v31 = C::emit(ctx, v26);
1782
0
                    // Rule at src/prelude_lower.isle line 514.
1783
0
                    return v27;
1784
                }
1785
0
                _ => {}
1786
            }
1787
        }
1788
        &ProducesFlags::ProducesFlagsTwiceSideEffect {
1789
0
            inst1: ref v32,
1790
0
            inst2: ref v33,
1791
0
        } => {
1792
0
            match arg1 {
1793
                &ConsumesFlags::ConsumesFlagsReturnsReg {
1794
0
                    inst: ref v13,
1795
0
                    result: v14,
1796
0
                } => {
1797
0
                    let v34 = C::emit(ctx, v32);
1798
0
                    let v35 = C::emit(ctx, v33);
1799
0
                    let v36 = C::emit(ctx, v13);
1800
0
                    let v37 = C::value_reg(ctx, v14);
1801
0
                    // Rule at src/prelude_lower.isle line 530.
1802
0
                    return v37;
1803
                }
1804
                &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
1805
0
                    inst1: ref v18,
1806
0
                    inst2: ref v19,
1807
0
                    result: v20,
1808
0
                } => {
1809
0
                    let v34 = C::emit(ctx, v32);
1810
0
                    let v35 = C::emit(ctx, v33);
1811
0
                    let v38 = C::emit(ctx, v18);
1812
0
                    let v39 = C::emit(ctx, v19);
1813
0
                    // Rule at src/prelude_lower.isle line 537.
1814
0
                    return v20;
1815
                }
1816
                &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
1817
0
                    inst1: ref v23,
1818
0
                    inst2: ref v24,
1819
0
                    inst3: ref v25,
1820
0
                    inst4: ref v26,
1821
0
                    result: v27,
1822
0
                } => {
1823
0
                    let v34 = C::emit(ctx, v32);
1824
0
                    let v35 = C::emit(ctx, v33);
1825
0
                    let v40 = C::emit(ctx, v23);
1826
0
                    let v41 = C::emit(ctx, v24);
1827
0
                    let v42 = C::emit(ctx, v25);
1828
0
                    let v43 = C::emit(ctx, v26);
1829
0
                    // Rule at src/prelude_lower.isle line 550.
1830
0
                    return v27;
1831
                }
1832
0
                _ => {}
1833
            }
1834
        }
1835
        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
1836
0
            inst: ref v1,
1837
0
            result: v2,
1838
0
        } => {
1839
0
            match arg1 {
1840
                &ConsumesFlags::ConsumesFlagsSideEffect {
1841
0
                    inst: ref v9,
1842
0
                } => {
1843
0
                    let v6 = C::emit(ctx, v1);
1844
0
                    let v10 = C::emit(ctx, v9);
1845
0
                    let v11 = C::value_reg(ctx, v2);
1846
0
                    // Rule at src/prelude_lower.isle line 490.
1847
0
                    return v11;
1848
                }
1849
                &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
1850
0
                    inst: ref v4,
1851
0
                    result: v5,
1852
0
                } => {
1853
0
                    let v6 = C::emit(ctx, v1);
1854
0
                    let v7 = C::emit(ctx, v4);
1855
0
                    let v8 = C::value_regs(ctx, v2, v5);
1856
0
                    // Rule at src/prelude_lower.isle line 482.
1857
0
                    return v8;
1858
                }
1859
0
                _ => {}
1860
            }
1861
        }
1862
0
        _ => {}
1863
    }
1864
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "with_flags", "src/prelude_lower.isle line 480")
1865
90.5k
}
1866
1867
// Generated as internal constructor for term with_flags_reg.
1868
19.6k
pub fn constructor_with_flags_reg<C: Context>(
1869
19.6k
    ctx: &mut C,
1870
19.6k
    arg0: &ProducesFlags,
1871
19.6k
    arg1: &ConsumesFlags,
1872
19.6k
) -> Reg {
1873
19.6k
    let v2 = constructor_with_flags(ctx, arg0, arg1);
1874
19.6k
    let v4 = C::value_regs_get(ctx, v2, 0x0);
1875
19.6k
    // Rule at src/prelude_lower.isle line 568.
1876
19.6k
    return v4;
1877
19.6k
}
1878
1879
// Generated as internal constructor for term flags_to_producesflags.
1880
0
pub fn constructor_flags_to_producesflags<C: Context>(
1881
0
    ctx: &mut C,
1882
0
    arg0: Value,
1883
0
) -> ProducesFlags {
1884
0
    let v1 = C::mark_value_used(ctx, arg0);
1885
0
    // Rule at src/prelude_lower.isle line 575.
1886
0
    return ProducesFlags::AlreadyExistingFlags;
1887
0
}
1888
1889
// Generated as internal constructor for term with_flags_side_effect.
1890
406k
pub fn constructor_with_flags_side_effect<C: Context>(
1891
406k
    ctx: &mut C,
1892
406k
    arg0: &ProducesFlags,
1893
406k
    arg1: &ConsumesFlags,
1894
406k
) -> SideEffectNoResult {
1895
406k
    match arg0 {
1896
        &ProducesFlags::AlreadyExistingFlags => {
1897
0
            match arg1 {
1898
                &ConsumesFlags::ConsumesFlagsSideEffect {
1899
0
                    inst: ref v2,
1900
0
                } => {
1901
0
                    let v3 = SideEffectNoResult::Inst {
1902
0
                        inst: v2.clone(),
1903
0
                    };
1904
0
                    // Rule at src/prelude_lower.isle line 586.
1905
0
                    return v3;
1906
                }
1907
                &ConsumesFlags::ConsumesFlagsSideEffect2 {
1908
0
                    inst1: ref v4,
1909
0
                    inst2: ref v5,
1910
0
                } => {
1911
0
                    let v6 = SideEffectNoResult::Inst2 {
1912
0
                        inst1: v4.clone(),
1913
0
                        inst2: v5.clone(),
1914
0
                    };
1915
0
                    // Rule at src/prelude_lower.isle line 591.
1916
0
                    return v6;
1917
                }
1918
0
                _ => {}
1919
            }
1920
        }
1921
        &ProducesFlags::ProducesFlagsSideEffect {
1922
406k
            inst: ref v7,
1923
406k
        } => {
1924
406k
            match arg1 {
1925
                &ConsumesFlags::ConsumesFlagsSideEffect {
1926
406k
                    inst: ref v2,
1927
406k
                } => {
1928
406k
                    let v8 = SideEffectNoResult::Inst2 {
1929
406k
                        inst1: v7.clone(),
1930
406k
                        inst2: v2.clone(),
1931
406k
                    };
1932
406k
                    // Rule at src/prelude_lower.isle line 596.
1933
406k
                    return v8;
1934
                }
1935
                &ConsumesFlags::ConsumesFlagsSideEffect2 {
1936
0
                    inst1: ref v4,
1937
0
                    inst2: ref v5,
1938
0
                } => {
1939
0
                    let v9 = SideEffectNoResult::Inst3 {
1940
0
                        inst1: v7.clone(),
1941
0
                        inst2: v4.clone(),
1942
0
                        inst3: v5.clone(),
1943
0
                    };
1944
0
                    // Rule at src/prelude_lower.isle line 601.
1945
0
                    return v9;
1946
                }
1947
0
                _ => {}
1948
            }
1949
        }
1950
        &ProducesFlags::ProducesFlagsTwiceSideEffect {
1951
0
            inst1: ref v10,
1952
0
            inst2: ref v11,
1953
        } => {
1954
            if let &ConsumesFlags::ConsumesFlagsSideEffect {
1955
0
                inst: ref v2,
1956
0
            } = arg1 {
1957
0
                let v12 = SideEffectNoResult::Inst3 {
1958
0
                    inst1: v10.clone(),
1959
0
                    inst2: v11.clone(),
1960
0
                    inst3: v2.clone(),
1961
0
                };
1962
0
                // Rule at src/prelude_lower.isle line 606.
1963
0
                return v12;
1964
0
            }
1965
        }
1966
0
        _ => {}
1967
    }
1968
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "with_flags_side_effect", "src/prelude_lower.isle line 584")
1969
406k
}
1970
1971
// Generated as internal constructor for term with_flags_chained.
1972
0
pub fn constructor_with_flags_chained<C: Context>(
1973
0
    ctx: &mut C,
1974
0
    arg0: &ProducesFlags,
1975
0
    arg1: &ConsumesAndProducesFlags,
1976
0
    arg2: &ConsumesFlags,
1977
0
) -> MultiReg {
1978
0
    match arg0 {
1979
        &ProducesFlags::ProducesFlagsSideEffect {
1980
0
            inst: ref v1,
1981
0
        } => {
1982
0
            match arg1 {
1983
                &ConsumesAndProducesFlags::SideEffect {
1984
0
                    inst: ref v3,
1985
0
                } => {
1986
0
                    match arg2 {
1987
                        &ConsumesFlags::ConsumesFlagsSideEffect {
1988
0
                            inst: ref v5,
1989
0
                        } => {
1990
0
                            let v6 = C::emit(ctx, v1);
1991
0
                            let v7 = C::emit(ctx, v3);
1992
0
                            let v8 = C::emit(ctx, v5);
1993
0
                            // Rule at src/prelude_lower.isle line 615.
1994
0
                            return MultiReg::Empty;
1995
                        }
1996
                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
1997
0
                            inst1: ref v10,
1998
0
                            inst2: ref v11,
1999
0
                        } => {
2000
0
                            let v6 = C::emit(ctx, v1);
2001
0
                            let v7 = C::emit(ctx, v3);
2002
0
                            let v12 = C::emit(ctx, v10);
2003
0
                            let v13 = C::emit(ctx, v11);
2004
0
                            // Rule at src/prelude_lower.isle line 623.
2005
0
                            return MultiReg::Empty;
2006
                        }
2007
                        &ConsumesFlags::ConsumesFlagsReturnsReg {
2008
0
                            inst: ref v14,
2009
0
                            result: v15,
2010
0
                        } => {
2011
0
                            let v6 = C::emit(ctx, v1);
2012
0
                            let v7 = C::emit(ctx, v3);
2013
0
                            let v16 = C::emit(ctx, v14);
2014
0
                            let v17 = MultiReg::One {
2015
0
                                a: v15,
2016
0
                            };
2017
0
                            // Rule at src/prelude_lower.isle line 632.
2018
0
                            return v17;
2019
                        }
2020
                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
2021
0
                            inst1: ref v18,
2022
0
                            inst2: ref v19,
2023
0
                            result: v20,
2024
0
                        } => {
2025
0
                            let v6 = C::emit(ctx, v1);
2026
0
                            let v7 = C::emit(ctx, v3);
2027
0
                            let v21 = C::emit(ctx, v18);
2028
0
                            let v22 = C::emit(ctx, v19);
2029
0
                            let v24 = C::value_regs_get(ctx, v20, 0x0);
2030
0
                            let v26 = C::value_regs_get(ctx, v20, 0x1);
2031
0
                            let v27 = MultiReg::Two {
2032
0
                                a: v24,
2033
0
                                b: v26,
2034
0
                            };
2035
0
                            // Rule at src/prelude_lower.isle line 640.
2036
0
                            return v27;
2037
                        }
2038
                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
2039
0
                            inst1: ref v28,
2040
0
                            inst2: ref v29,
2041
0
                            inst3: ref v30,
2042
0
                            inst4: ref v31,
2043
0
                            result: v32,
2044
0
                        } => {
2045
0
                            let v6 = C::emit(ctx, v1);
2046
0
                            let v7 = C::emit(ctx, v3);
2047
0
                            let v33 = C::emit(ctx, v28);
2048
0
                            let v34 = C::emit(ctx, v29);
2049
0
                            let v35 = C::emit(ctx, v30);
2050
0
                            let v36 = C::emit(ctx, v31);
2051
0
                            let v37 = C::value_regs_get(ctx, v32, 0x0);
2052
0
                            let v38 = C::value_regs_get(ctx, v32, 0x1);
2053
0
                            let v39 = MultiReg::Two {
2054
0
                                a: v37,
2055
0
                                b: v38,
2056
0
                            };
2057
0
                            // Rule at src/prelude_lower.isle line 649.
2058
0
                            return v39;
2059
                        }
2060
0
                        _ => {}
2061
                    }
2062
                }
2063
                &ConsumesAndProducesFlags::ReturnsReg {
2064
0
                    inst: ref v47,
2065
0
                    result: v48,
2066
0
                } => {
2067
0
                    match arg2 {
2068
                        &ConsumesFlags::ConsumesFlagsSideEffect {
2069
0
                            inst: ref v5,
2070
0
                        } => {
2071
0
                            let v6 = C::emit(ctx, v1);
2072
0
                            let v49 = C::emit(ctx, v47);
2073
0
                            let v8 = C::emit(ctx, v5);
2074
0
                            let v50 = MultiReg::One {
2075
0
                                a: v48,
2076
0
                            };
2077
0
                            // Rule at src/prelude_lower.isle line 709.
2078
0
                            return v50;
2079
                        }
2080
                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
2081
0
                            inst1: ref v10,
2082
0
                            inst2: ref v11,
2083
0
                        } => {
2084
0
                            let v6 = C::emit(ctx, v1);
2085
0
                            let v49 = C::emit(ctx, v47);
2086
0
                            let v12 = C::emit(ctx, v10);
2087
0
                            let v13 = C::emit(ctx, v11);
2088
0
                            let v50 = MultiReg::One {
2089
0
                                a: v48,
2090
0
                            };
2091
0
                            // Rule at src/prelude_lower.isle line 717.
2092
0
                            return v50;
2093
                        }
2094
                        &ConsumesFlags::ConsumesFlagsReturnsReg {
2095
0
                            inst: ref v14,
2096
0
                            result: v15,
2097
0
                        } => {
2098
0
                            let v6 = C::emit(ctx, v1);
2099
0
                            let v49 = C::emit(ctx, v47);
2100
0
                            let v16 = C::emit(ctx, v14);
2101
0
                            let v51 = MultiReg::Two {
2102
0
                                a: v48,
2103
0
                                b: v15,
2104
0
                            };
2105
0
                            // Rule at src/prelude_lower.isle line 726.
2106
0
                            return v51;
2107
                        }
2108
                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
2109
0
                            inst1: ref v18,
2110
0
                            inst2: ref v19,
2111
0
                            result: v20,
2112
0
                        } => {
2113
0
                            let v6 = C::emit(ctx, v1);
2114
0
                            let v49 = C::emit(ctx, v47);
2115
0
                            let v21 = C::emit(ctx, v18);
2116
0
                            let v22 = C::emit(ctx, v19);
2117
0
                            let v24 = C::value_regs_get(ctx, v20, 0x0);
2118
0
                            let v26 = C::value_regs_get(ctx, v20, 0x1);
2119
0
                            let v52 = MultiReg::Three {
2120
0
                                a: v48,
2121
0
                                b: v24,
2122
0
                                c: v26,
2123
0
                            };
2124
0
                            // Rule at src/prelude_lower.isle line 734.
2125
0
                            return v52;
2126
                        }
2127
                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
2128
0
                            inst1: ref v28,
2129
0
                            inst2: ref v29,
2130
0
                            inst3: ref v30,
2131
0
                            inst4: ref v31,
2132
0
                            result: v32,
2133
0
                        } => {
2134
0
                            let v6 = C::emit(ctx, v1);
2135
0
                            let v49 = C::emit(ctx, v47);
2136
0
                            let v33 = C::emit(ctx, v28);
2137
0
                            let v34 = C::emit(ctx, v29);
2138
0
                            let v35 = C::emit(ctx, v30);
2139
0
                            let v36 = C::emit(ctx, v31);
2140
0
                            let v37 = C::value_regs_get(ctx, v32, 0x0);
2141
0
                            let v38 = C::value_regs_get(ctx, v32, 0x1);
2142
0
                            let v53 = MultiReg::Three {
2143
0
                                a: v48,
2144
0
                                b: v37,
2145
0
                                c: v38,
2146
0
                            };
2147
0
                            // Rule at src/prelude_lower.isle line 743.
2148
0
                            return v53;
2149
                        }
2150
0
                        _ => {}
2151
                    }
2152
                }
2153
0
                _ => {}
2154
            }
2155
        }
2156
        &ProducesFlags::ProducesFlagsReturnsReg {
2157
0
            inst: ref v40,
2158
0
            result: v41,
2159
0
        } => {
2160
0
            match arg1 {
2161
                &ConsumesAndProducesFlags::SideEffect {
2162
0
                    inst: ref v3,
2163
0
                } => {
2164
0
                    match arg2 {
2165
                        &ConsumesFlags::ConsumesFlagsSideEffect {
2166
0
                            inst: ref v5,
2167
0
                        } => {
2168
0
                            let v42 = C::emit(ctx, v40);
2169
0
                            let v7 = C::emit(ctx, v3);
2170
0
                            let v8 = C::emit(ctx, v5);
2171
0
                            let v43 = MultiReg::One {
2172
0
                                a: v41,
2173
0
                            };
2174
0
                            // Rule at src/prelude_lower.isle line 662.
2175
0
                            return v43;
2176
                        }
2177
                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
2178
0
                            inst1: ref v10,
2179
0
                            inst2: ref v11,
2180
0
                        } => {
2181
0
                            let v42 = C::emit(ctx, v40);
2182
0
                            let v7 = C::emit(ctx, v3);
2183
0
                            let v12 = C::emit(ctx, v10);
2184
0
                            let v13 = C::emit(ctx, v11);
2185
0
                            let v43 = MultiReg::One {
2186
0
                                a: v41,
2187
0
                            };
2188
0
                            // Rule at src/prelude_lower.isle line 670.
2189
0
                            return v43;
2190
                        }
2191
                        &ConsumesFlags::ConsumesFlagsReturnsReg {
2192
0
                            inst: ref v14,
2193
0
                            result: v15,
2194
0
                        } => {
2195
0
                            let v42 = C::emit(ctx, v40);
2196
0
                            let v7 = C::emit(ctx, v3);
2197
0
                            let v16 = C::emit(ctx, v14);
2198
0
                            let v44 = MultiReg::Two {
2199
0
                                a: v41,
2200
0
                                b: v15,
2201
0
                            };
2202
0
                            // Rule at src/prelude_lower.isle line 679.
2203
0
                            return v44;
2204
                        }
2205
                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
2206
0
                            inst1: ref v18,
2207
0
                            inst2: ref v19,
2208
0
                            result: v20,
2209
0
                        } => {
2210
0
                            let v42 = C::emit(ctx, v40);
2211
0
                            let v7 = C::emit(ctx, v3);
2212
0
                            let v21 = C::emit(ctx, v18);
2213
0
                            let v22 = C::emit(ctx, v19);
2214
0
                            let v24 = C::value_regs_get(ctx, v20, 0x0);
2215
0
                            let v26 = C::value_regs_get(ctx, v20, 0x1);
2216
0
                            let v45 = MultiReg::Three {
2217
0
                                a: v41,
2218
0
                                b: v24,
2219
0
                                c: v26,
2220
0
                            };
2221
0
                            // Rule at src/prelude_lower.isle line 687.
2222
0
                            return v45;
2223
                        }
2224
                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
2225
0
                            inst1: ref v28,
2226
0
                            inst2: ref v29,
2227
0
                            inst3: ref v30,
2228
0
                            inst4: ref v31,
2229
0
                            result: v32,
2230
0
                        } => {
2231
0
                            let v42 = C::emit(ctx, v40);
2232
0
                            let v7 = C::emit(ctx, v3);
2233
0
                            let v33 = C::emit(ctx, v28);
2234
0
                            let v34 = C::emit(ctx, v29);
2235
0
                            let v35 = C::emit(ctx, v30);
2236
0
                            let v36 = C::emit(ctx, v31);
2237
0
                            let v37 = C::value_regs_get(ctx, v32, 0x0);
2238
0
                            let v38 = C::value_regs_get(ctx, v32, 0x1);
2239
0
                            let v46 = MultiReg::Three {
2240
0
                                a: v41,
2241
0
                                b: v37,
2242
0
                                c: v38,
2243
0
                            };
2244
0
                            // Rule at src/prelude_lower.isle line 696.
2245
0
                            return v46;
2246
                        }
2247
0
                        _ => {}
2248
                    }
2249
                }
2250
                &ConsumesAndProducesFlags::ReturnsReg {
2251
0
                    inst: ref v47,
2252
0
                    result: v48,
2253
0
                } => {
2254
0
                    match arg2 {
2255
                        &ConsumesFlags::ConsumesFlagsSideEffect {
2256
0
                            inst: ref v5,
2257
0
                        } => {
2258
0
                            let v42 = C::emit(ctx, v40);
2259
0
                            let v49 = C::emit(ctx, v47);
2260
0
                            let v8 = C::emit(ctx, v5);
2261
0
                            let v54 = MultiReg::Two {
2262
0
                                a: v41,
2263
0
                                b: v48,
2264
0
                            };
2265
0
                            // Rule at src/prelude_lower.isle line 756.
2266
0
                            return v54;
2267
                        }
2268
                        &ConsumesFlags::ConsumesFlagsSideEffect2 {
2269
0
                            inst1: ref v10,
2270
0
                            inst2: ref v11,
2271
0
                        } => {
2272
0
                            let v42 = C::emit(ctx, v40);
2273
0
                            let v49 = C::emit(ctx, v47);
2274
0
                            let v12 = C::emit(ctx, v10);
2275
0
                            let v13 = C::emit(ctx, v11);
2276
0
                            let v54 = MultiReg::Two {
2277
0
                                a: v41,
2278
0
                                b: v48,
2279
0
                            };
2280
0
                            // Rule at src/prelude_lower.isle line 764.
2281
0
                            return v54;
2282
                        }
2283
                        &ConsumesFlags::ConsumesFlagsReturnsReg {
2284
0
                            inst: ref v14,
2285
0
                            result: v15,
2286
0
                        } => {
2287
0
                            let v42 = C::emit(ctx, v40);
2288
0
                            let v49 = C::emit(ctx, v47);
2289
0
                            let v16 = C::emit(ctx, v14);
2290
0
                            let v55 = MultiReg::Three {
2291
0
                                a: v41,
2292
0
                                b: v48,
2293
0
                                c: v15,
2294
0
                            };
2295
0
                            // Rule at src/prelude_lower.isle line 773.
2296
0
                            return v55;
2297
                        }
2298
                        &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
2299
0
                            inst1: ref v18,
2300
0
                            inst2: ref v19,
2301
0
                            result: v20,
2302
0
                        } => {
2303
0
                            let v42 = C::emit(ctx, v40);
2304
0
                            let v49 = C::emit(ctx, v47);
2305
0
                            let v21 = C::emit(ctx, v18);
2306
0
                            let v22 = C::emit(ctx, v19);
2307
0
                            let v24 = C::value_regs_get(ctx, v20, 0x0);
2308
0
                            let v26 = C::value_regs_get(ctx, v20, 0x1);
2309
0
                            let v56 = MultiReg::Four {
2310
0
                                a: v41,
2311
0
                                b: v48,
2312
0
                                c: v24,
2313
0
                                d: v26,
2314
0
                            };
2315
0
                            // Rule at src/prelude_lower.isle line 781.
2316
0
                            return v56;
2317
                        }
2318
                        &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
2319
0
                            inst1: ref v28,
2320
0
                            inst2: ref v29,
2321
0
                            inst3: ref v30,
2322
0
                            inst4: ref v31,
2323
0
                            result: v32,
2324
0
                        } => {
2325
0
                            let v42 = C::emit(ctx, v40);
2326
0
                            let v49 = C::emit(ctx, v47);
2327
0
                            let v33 = C::emit(ctx, v28);
2328
0
                            let v34 = C::emit(ctx, v29);
2329
0
                            let v35 = C::emit(ctx, v30);
2330
0
                            let v36 = C::emit(ctx, v31);
2331
0
                            let v37 = C::value_regs_get(ctx, v32, 0x0);
2332
0
                            let v38 = C::value_regs_get(ctx, v32, 0x1);
2333
0
                            let v57 = MultiReg::Four {
2334
0
                                a: v41,
2335
0
                                b: v48,
2336
0
                                c: v37,
2337
0
                                d: v38,
2338
0
                            };
2339
0
                            // Rule at src/prelude_lower.isle line 790.
2340
0
                            return v57;
2341
                        }
2342
0
                        _ => {}
2343
                    }
2344
                }
2345
0
                _ => {}
2346
            }
2347
        }
2348
        &ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
2349
0
            inst: ref v58,
2350
0
            result: v59,
2351
        } => {
2352
            if let &ConsumesAndProducesFlags::ReturnsReg {
2353
0
                inst: ref v47,
2354
0
                result: v48,
2355
0
            } = arg1 {
2356
0
                match arg2 {
2357
                    &ConsumesFlags::ConsumesFlagsSideEffect {
2358
0
                        inst: ref v5,
2359
0
                    } => {
2360
0
                        let v60 = C::emit(ctx, v58);
2361
0
                        let v49 = C::emit(ctx, v47);
2362
0
                        let v8 = C::emit(ctx, v5);
2363
0
                        let v61 = MultiReg::Two {
2364
0
                            a: v59,
2365
0
                            b: v48,
2366
0
                        };
2367
0
                        // Rule at src/prelude_lower.isle line 802.
2368
0
                        return v61;
2369
                    }
2370
                    &ConsumesFlags::ConsumesFlagsSideEffect2 {
2371
0
                        inst1: ref v10,
2372
0
                        inst2: ref v11,
2373
0
                    } => {
2374
0
                        let v60 = C::emit(ctx, v58);
2375
0
                        let v49 = C::emit(ctx, v47);
2376
0
                        let v12 = C::emit(ctx, v10);
2377
0
                        let v13 = C::emit(ctx, v11);
2378
0
                        let v61 = MultiReg::Two {
2379
0
                            a: v59,
2380
0
                            b: v48,
2381
0
                        };
2382
0
                        // Rule at src/prelude_lower.isle line 810.
2383
0
                        return v61;
2384
                    }
2385
                    &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
2386
0
                        inst: ref v63,
2387
0
                        result: v64,
2388
0
                    } => {
2389
0
                        let v60 = C::emit(ctx, v58);
2390
0
                        let v49 = C::emit(ctx, v47);
2391
0
                        let v65 = C::emit(ctx, v63);
2392
0
                        let v66 = MultiReg::Three {
2393
0
                            a: v59,
2394
0
                            b: v48,
2395
0
                            c: v64,
2396
0
                        };
2397
0
                        // Rule at src/prelude_lower.isle line 827.
2398
0
                        return v66;
2399
                    }
2400
                    &ConsumesFlags::ConsumesFlagsReturnsReg {
2401
0
                        inst: ref v14,
2402
0
                        result: v15,
2403
0
                    } => {
2404
0
                        let v60 = C::emit(ctx, v58);
2405
0
                        let v49 = C::emit(ctx, v47);
2406
0
                        let v16 = C::emit(ctx, v14);
2407
0
                        let v62 = MultiReg::Three {
2408
0
                            a: v59,
2409
0
                            b: v48,
2410
0
                            c: v15,
2411
0
                        };
2412
0
                        // Rule at src/prelude_lower.isle line 819.
2413
0
                        return v62;
2414
                    }
2415
                    &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
2416
0
                        inst1: ref v18,
2417
0
                        inst2: ref v19,
2418
0
                        result: v20,
2419
0
                    } => {
2420
0
                        let v60 = C::emit(ctx, v58);
2421
0
                        let v49 = C::emit(ctx, v47);
2422
0
                        let v21 = C::emit(ctx, v18);
2423
0
                        let v22 = C::emit(ctx, v19);
2424
0
                        let v24 = C::value_regs_get(ctx, v20, 0x0);
2425
0
                        let v26 = C::value_regs_get(ctx, v20, 0x1);
2426
0
                        let v67 = MultiReg::Four {
2427
0
                            a: v59,
2428
0
                            b: v48,
2429
0
                            c: v24,
2430
0
                            d: v26,
2431
0
                        };
2432
0
                        // Rule at src/prelude_lower.isle line 835.
2433
0
                        return v67;
2434
                    }
2435
                    &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
2436
0
                        inst1: ref v28,
2437
0
                        inst2: ref v29,
2438
0
                        inst3: ref v30,
2439
0
                        inst4: ref v31,
2440
0
                        result: v32,
2441
0
                    } => {
2442
0
                        let v60 = C::emit(ctx, v58);
2443
0
                        let v49 = C::emit(ctx, v47);
2444
0
                        let v33 = C::emit(ctx, v28);
2445
0
                        let v34 = C::emit(ctx, v29);
2446
0
                        let v35 = C::emit(ctx, v30);
2447
0
                        let v36 = C::emit(ctx, v31);
2448
0
                        let v37 = C::value_regs_get(ctx, v32, 0x0);
2449
0
                        let v38 = C::value_regs_get(ctx, v32, 0x1);
2450
0
                        let v68 = MultiReg::Four {
2451
0
                            a: v59,
2452
0
                            b: v48,
2453
0
                            c: v37,
2454
0
                            d: v38,
2455
0
                        };
2456
0
                        // Rule at src/prelude_lower.isle line 844.
2457
0
                        return v68;
2458
                    }
2459
0
                    _ => {}
2460
                }
2461
0
            }
2462
        }
2463
0
        _ => {}
2464
    }
2465
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "with_flags_chained", "src/prelude_lower.isle line 612")
2466
0
}
2467
2468
// Generated as internal constructor for term lower_return.
2469
48.7k
pub fn constructor_lower_return<C: Context>(
2470
48.7k
    ctx: &mut C,
2471
48.7k
    arg0: ValueSlice,
2472
48.7k
) -> InstOutput {
2473
48.7k
    let v1 = C::gen_return(ctx, arg0);
2474
48.7k
    let v2 = C::output_none(ctx);
2475
48.7k
    // Rule at src/prelude_lower.isle line 1044.
2476
48.7k
    return v2;
2477
48.7k
}
2478
2479
// Generated as internal constructor for term operand_size_bits.
2480
182k
pub fn constructor_operand_size_bits<C: Context>(
2481
182k
    ctx: &mut C,
2482
182k
    arg0: &OperandSize,
2483
182k
) -> u16 {
2484
182k
    match arg0 {
2485
        &OperandSize::Size8 => {
2486
            // Rule at src/isa/x64/inst.isle line 741.
2487
0
            return 0x8;
2488
        }
2489
        &OperandSize::Size16 => {
2490
            // Rule at src/isa/x64/inst.isle line 742.
2491
0
            return 0x10;
2492
        }
2493
        &OperandSize::Size32 => {
2494
            // Rule at src/isa/x64/inst.isle line 743.
2495
12.1k
            return 0x20;
2496
        }
2497
        &OperandSize::Size64 => {
2498
            // Rule at src/isa/x64/inst.isle line 744.
2499
170k
            return 0x40;
2500
        }
2501
0
        _ => {}
2502
0
    }
2503
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "operand_size_bits", "src/isa/x64/inst.isle line 740")
2504
182k
}
2505
2506
// Generated as internal constructor for term reg_mem_to_reg_mem_imm.
2507
0
pub fn constructor_reg_mem_to_reg_mem_imm<C: Context>(
2508
0
    ctx: &mut C,
2509
0
    arg0: &RegMem,
2510
0
) -> RegMemImm {
2511
0
    match arg0 {
2512
        &RegMem::Reg {
2513
0
            reg: v1,
2514
0
        } => {
2515
0
            let v2 = RegMemImm::Reg {
2516
0
                reg: v1,
2517
0
            };
2518
0
            // Rule at src/isa/x64/inst.isle line 995.
2519
0
            return v2;
2520
        }
2521
        &RegMem::Mem {
2522
0
            addr: ref v3,
2523
0
        } => {
2524
0
            let v4 = RegMemImm::Mem {
2525
0
                addr: v3.clone(),
2526
0
            };
2527
0
            // Rule at src/isa/x64/inst.isle line 997.
2528
0
            return v4;
2529
        }
2530
0
        _ => {}
2531
0
    }
2532
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "reg_mem_to_reg_mem_imm", "src/isa/x64/inst.isle line 994")
2533
0
}
2534
2535
// Generated as internal constructor for term to_amode.
2536
2.14M
pub fn constructor_to_amode<C: Context>(
2537
2.14M
    ctx: &mut C,
2538
2.14M
    arg0: MemFlags,
2539
2.14M
    arg1: Value,
2540
2.14M
    arg2: Offset32,
2541
2.14M
) -> Amode {
2542
2.14M
    let v4 = C::def_inst(ctx, arg1);
2543
2.14M
    if let Some(
v51.83M
) = v4 {
2544
1.83M
        let v6 = &C::inst_data(ctx, v5);
2545
        if let &InstructionData::Binary {
2546
1.69M
            opcode: ref v7,
2547
1.69M
            args: ref v8,
2548
1.83M
        } = v6 {
2549
1.69M
            if let &Opcode::Iadd = v7 {
2550
1.69M
                let v9 = C::unpack_value_array_2(ctx, v8);
2551
1.69M
                let v12 = &constructor_to_amode_add(ctx, arg0, v9.0, v9.1, arg2);
2552
1.69M
                // Rule at src/isa/x64/inst.isle line 1083.
2553
1.69M
                return v12.clone();
2554
0
            }
2555
131k
        }
2556
310k
    }
2557
442k
    let v3 = &constructor_amode_imm_reg(ctx, arg0, arg1, arg2);
2558
442k
    // Rule at src/isa/x64/inst.isle line 1081.
2559
442k
    return v3.clone();
2560
2.14M
}
2561
2562
// Generated as internal constructor for term to_amode_add.
2563
2.68M
pub fn constructor_to_amode_add<C: Context>(
2564
2.68M
    ctx: &mut C,
2565
2.68M
    arg0: MemFlags,
2566
2.68M
    arg1: Value,
2567
2.68M
    arg2: Value,
2568
2.68M
    arg3: Offset32,
2569
2.68M
) -> Amode {
2570
2.68M
    let v5 = C::def_inst(ctx, arg2);
2571
2.68M
    if let Some(
v62.67M
) = v5 {
2572
2.67M
        let v7 = &C::inst_data(ctx, v6);
2573
        if let &InstructionData::Binary {
2574
89.8k
            opcode: ref v55,
2575
89.8k
            args: ref v56,
2576
2.67M
        } = v7 {
2577
89.8k
            if let &Opcode::Iadd = v55 {
2578
5.25k
                let v57 = C::unpack_value_array_2(ctx, v56);
2579
5.25k
                let v71 = C::def_inst(ctx, v57.0);
2580
5.25k
                if let Some(
v724.33k
) = v71 {
2581
4.33k
                    let v73 = &C::inst_data(ctx, v72);
2582
                    if let &InstructionData::UnaryImm {
2583
0
                        opcode: ref v74,
2584
0
                        imm: v75,
2585
4.33k
                    } = v73 {
2586
0
                        if let &Opcode::Iconst = v74 {
2587
0
                            let v76 = C::simm32(ctx, v75);
2588
0
                            if let Some(v77) = v76 {
2589
0
                                let v12 = C::offset32_to_i32(ctx, arg3);
2590
0
                                let v78 = C::s32_add_fallible(ctx, v12, v77);
2591
0
                                if let Some(v79) = v78 {
2592
0
                                    let v80 = C::i32_to_offset32(ctx, v79);
2593
0
                                    let v81 = &constructor_amode_imm_reg_reg_shift(ctx, arg0, arg1, v57.1, v80);
2594
0
                                    // Rule at src/isa/x64/inst.isle line 1116.
2595
0
                                    return v81.clone();
2596
0
                                }
2597
0
                            }
2598
0
                        }
2599
4.33k
                    }
2600
925
                }
2601
5.25k
                let v60 = C::def_inst(ctx, v57.1);
2602
5.25k
                if let Some(
v615.06k
) = v60 {
2603
5.06k
                    let v62 = &C::inst_data(ctx, v61);
2604
                    if let &InstructionData::UnaryImm {
2605
1.44k
                        opcode: ref v63,
2606
1.44k
                        imm: v64,
2607
5.06k
                    } = v62 {
2608
1.44k
                        if let &Opcode::Iconst = v63 {
2609
1.44k
                            let v65 = C::simm32(ctx, v64);
2610
1.44k
                            if let Some(
v661.02k
) = v65 {
2611
1.02k
                                let v12 = C::offset32_to_i32(ctx, arg3);
2612
1.02k
                                let v67 = C::s32_add_fallible(ctx, v12, v66);
2613
1.02k
                                if let Some(v68) = v67 {
2614
1.02k
                                    let v69 = C::i32_to_offset32(ctx, v68);
2615
1.02k
                                    let v70 = &constructor_amode_imm_reg_reg_shift(ctx, arg0, arg1, v57.0, v69);
2616
1.02k
                                    // Rule at src/isa/x64/inst.isle line 1113.
2617
1.02k
                                    return v70.clone();
2618
0
                                }
2619
421
                            }
2620
0
                        }
2621
3.62k
                    }
2622
188
                }
2623
84.6k
            }
2624
2.58M
        }
2625
13.0k
    }
2626
2.68M
    let v17 = C::def_inst(ctx, arg1);
2627
2.68M
    if let Some(
v182.38M
) = v17 {
2628
2.38M
        let v19 = &C::inst_data(ctx, v18);
2629
2.38M
        match v19 {
2630
            &InstructionData::Binary {
2631
939k
                opcode: ref v28,
2632
939k
                args: ref v29,
2633
939k
            } => {
2634
939k
                if let &Opcode::Iadd = v28 {
2635
921k
                    let v30 = C::unpack_value_array_2(ctx, v29);
2636
921k
                    let v44 = C::def_inst(ctx, v30.0);
2637
921k
                    if let Some(
v45894k
) = v44 {
2638
894k
                        let v46 = &C::inst_data(ctx, v45);
2639
                        if let &InstructionData::UnaryImm {
2640
0
                            opcode: ref v47,
2641
0
                            imm: v48,
2642
894k
                        } = v46 {
2643
0
                            if let &Opcode::Iconst = v47 {
2644
0
                                let v49 = C::simm32(ctx, v48);
2645
0
                                if let Some(v50) = v49 {
2646
0
                                    let v12 = C::offset32_to_i32(ctx, arg3);
2647
0
                                    let v51 = C::s32_add_fallible(ctx, v12, v50);
2648
0
                                    if let Some(v52) = v51 {
2649
0
                                        let v53 = C::i32_to_offset32(ctx, v52);
2650
0
                                        let v54 = &constructor_amode_imm_reg_reg_shift(ctx, arg0, v30.1, arg2, v53);
2651
0
                                        // Rule at src/isa/x64/inst.isle line 1110.
2652
0
                                        return v54.clone();
2653
0
                                    }
2654
0
                                }
2655
0
                            }
2656
894k
                        }
2657
27.0k
                    }
2658
921k
                    let v33 = C::def_inst(ctx, v30.1);
2659
921k
                    if let Some(
v34901k
) = v33 {
2660
901k
                        let v35 = &C::inst_data(ctx, v34);
2661
                        if let &InstructionData::UnaryImm {
2662
4.71k
                            opcode: ref v36,
2663
4.71k
                            imm: v37,
2664
901k
                        } = v35 {
2665
4.71k
                            if let &Opcode::Iconst = v36 {
2666
4.71k
                                let v38 = C::simm32(ctx, v37);
2667
4.71k
                                if let Some(
v393.79k
) = v38 {
2668
3.79k
                                    let v12 = C::offset32_to_i32(ctx, arg3);
2669
3.79k
                                    let v40 = C::s32_add_fallible(ctx, v12, v39);
2670
3.79k
                                    if let Some(v41) = v40 {
2671
3.79k
                                        let v42 = C::i32_to_offset32(ctx, v41);
2672
3.79k
                                        let v43 = &constructor_amode_imm_reg_reg_shift(ctx, arg0, v30.0, arg2, v42);
2673
3.79k
                                        // Rule at src/isa/x64/inst.isle line 1107.
2674
3.79k
                                        return v43.clone();
2675
0
                                    }
2676
921
                                }
2677
0
                            }
2678
896k
                        }
2679
19.4k
                    }
2680
18.4k
                }
2681
            }
2682
            &InstructionData::UnaryImm {
2683
0
                opcode: ref v20,
2684
0
                imm: v21,
2685
0
            } => {
2686
0
                if let &Opcode::Iconst = v20 {
2687
0
                    let v22 = C::simm32(ctx, v21);
2688
0
                    if let Some(v23) = v22 {
2689
0
                        let v12 = C::offset32_to_i32(ctx, arg3);
2690
0
                        let v24 = C::s32_add_fallible(ctx, v12, v23);
2691
0
                        if let Some(v25) = v24 {
2692
0
                            let v26 = C::i32_to_offset32(ctx, v25);
2693
0
                            let v27 = &constructor_amode_imm_reg(ctx, arg0, arg2, v26);
2694
0
                            // Rule at src/isa/x64/inst.isle line 1104.
2695
0
                            return v27.clone();
2696
0
                        }
2697
0
                    }
2698
0
                }
2699
            }
2700
1.44M
            _ => {}
2701
        }
2702
301k
    }
2703
2.68M
    if let Some(
v62.66M
) = v5 {
2704
2.66M
        let v7 = &C::inst_data(ctx, v6);
2705
        if let &InstructionData::UnaryImm {
2706
1.69M
            opcode: ref v8,
2707
1.69M
            imm: v9,
2708
2.66M
        } = v7 {
2709
1.69M
            if let &Opcode::Iconst = v8 {
2710
1.69M
                let v10 = C::simm32(ctx, v9);
2711
1.69M
                if let Some(
v111.30M
) = v10 {
2712
1.30M
                    let v12 = C::offset32_to_i32(ctx, arg3);
2713
1.30M
                    let v13 = C::s32_add_fallible(ctx, v12, v11);
2714
1.30M
                    if let Some(v14) = v13 {
2715
1.30M
                        let v15 = C::i32_to_offset32(ctx, v14);
2716
1.30M
                        let v16 = &constructor_amode_imm_reg(ctx, arg0, arg1, v15);
2717
1.30M
                        // Rule at src/isa/x64/inst.isle line 1101.
2718
1.30M
                        return v16.clone();
2719
0
                    }
2720
385k
                }
2721
0
            }
2722
977k
        }
2723
12.9k
    }
2724
1.37M
    let v4 = &constructor_amode_imm_reg_reg_shift(ctx, arg0, arg1, arg2, arg3);
2725
1.37M
    // Rule at src/isa/x64/inst.isle line 1099.
2726
1.37M
    return v4.clone();
2727
2.68M
}
2728
2729
// Generated as internal constructor for term amode_imm_reg.
2730
1.74M
pub fn constructor_amode_imm_reg<C: Context>(
2731
1.74M
    ctx: &mut C,
2732
1.74M
    arg0: MemFlags,
2733
1.74M
    arg1: Value,
2734
1.74M
    arg2: Offset32,
2735
1.74M
) -> Amode {
2736
1.74M
    let v6 = C::def_inst(ctx, arg1);
2737
1.74M
    if let Some(
v71.18M
) = v6 {
2738
1.18M
        let v8 = &C::inst_data(ctx, v7);
2739
        if let &InstructionData::Binary {
2740
916k
            opcode: ref v9,
2741
916k
            args: ref v10,
2742
1.18M
        } = v8 {
2743
916k
            if let &Opcode::Iadd = v9 {
2744
903k
                let v11 = C::unpack_value_array_2(ctx, v10);
2745
903k
                let v14 = &constructor_amode_imm_reg_reg_shift(ctx, arg0, v11.0, v11.1, arg2);
2746
903k
                // Rule at src/isa/x64/inst.isle line 1126.
2747
903k
                return v14.clone();
2748
12.6k
            }
2749
265k
        }
2750
565k
    }
2751
844k
    let v4 = C::put_in_reg(ctx, arg1);
2752
844k
    let v3 = C::offset32_to_i32(ctx, arg2);
2753
844k
    let v5 = Amode::ImmReg {
2754
844k
        simm32: v3,
2755
844k
        base: v4,
2756
844k
        flags: arg0,
2757
844k
    };
2758
844k
    // Rule at src/isa/x64/inst.isle line 1124.
2759
844k
    return v5;
2760
1.74M
}
2761
2762
// Generated as internal constructor for term amode_imm_reg_reg_shift.
2763
2.28M
pub fn constructor_amode_imm_reg_reg_shift<C: Context>(
2764
2.28M
    ctx: &mut C,
2765
2.28M
    arg0: MemFlags,
2766
2.28M
    arg1: Value,
2767
2.28M
    arg2: Value,
2768
2.28M
    arg3: Offset32,
2769
2.28M
) -> Amode {
2770
2.28M
    let v30 = C::def_inst(ctx, arg1);
2771
2.28M
    if let Some(
v312.21M
) = v30 {
2772
2.21M
        let v32 = &C::inst_data(ctx, v31);
2773
        if let &InstructionData::Binary {
2774
22.1k
            opcode: ref v33,
2775
22.1k
            args: ref v34,
2776
2.21M
        } = v32 {
2777
22.1k
            if let &Opcode::Ishl = v33 {
2778
1.38k
                let v35 = C::unpack_value_array_2(ctx, v34);
2779
1.38k
                let v38 = C::def_inst(ctx, v35.1);
2780
1.38k
                if let Some(v39) = v38 {
2781
1.38k
                    let v40 = &C::inst_data(ctx, v39);
2782
                    if let &InstructionData::UnaryImm {
2783
1.37k
                        opcode: ref v41,
2784
1.37k
                        imm: v42,
2785
1.38k
                    } = v40 {
2786
1.37k
                        if let &Opcode::Iconst = v41 {
2787
1.37k
                            let v43 = C::uimm8(ctx, v42);
2788
1.37k
                            if let Some(v44) = v43 {
2789
1.37k
                                let v45 = C::u8_as_u32(ctx, v44);
2790
1.37k
                                let v46 = C::u32_lteq(ctx, v45, 0x3);
2791
1.37k
                                if let Some(
v471.16k
) = v46 {
2792
1.16k
                                    let v48 = constructor_put_in_gpr(ctx, arg2);
2793
1.16k
                                    let v49 = constructor_put_in_gpr(ctx, v35.0);
2794
1.16k
                                    let v4 = C::offset32_to_i32(ctx, arg3);
2795
1.16k
                                    let v50 = Amode::ImmRegRegShift {
2796
1.16k
                                        simm32: v4,
2797
1.16k
                                        base: v48,
2798
1.16k
                                        index: v49,
2799
1.16k
                                        shift: v44,
2800
1.16k
                                        flags: arg0,
2801
1.16k
                                    };
2802
1.16k
                                    // Rule at src/isa/x64/inst.isle line 1135.
2803
1.16k
                                    return v50;
2804
207
                                }
2805
0
                            }
2806
0
                        }
2807
18
                    }
2808
0
                }
2809
20.7k
            }
2810
2.19M
        }
2811
71.5k
    }
2812
2.28M
    let v9 = C::def_inst(ctx, arg2);
2813
2.28M
    if let Some(
v102.25M
) = v9 {
2814
2.25M
        let v11 = &C::inst_data(ctx, v10);
2815
        if let &InstructionData::Binary {
2816
195k
            opcode: ref v12,
2817
195k
            args: ref v13,
2818
2.25M
        } = v11 {
2819
195k
            if let &Opcode::Ishl = v12 {
2820
45.8k
                let v14 = C::unpack_value_array_2(ctx, v13);
2821
45.8k
                let v17 = C::def_inst(ctx, v14.1);
2822
45.8k
                if let Some(v18) = v17 {
2823
45.8k
                    let v19 = &C::inst_data(ctx, v18);
2824
                    if let &InstructionData::UnaryImm {
2825
45.8k
                        opcode: ref v20,
2826
45.8k
                        imm: v21,
2827
45.8k
                    } = v19 {
2828
45.8k
                        if let &Opcode::Iconst = v20 {
2829
45.8k
                            let v22 = C::uimm8(ctx, v21);
2830
45.8k
                            if let Some(v23) = v22 {
2831
45.8k
                                let v24 = C::u8_as_u32(ctx, v23);
2832
45.8k
                                let v26 = C::u32_lteq(ctx, v24, 0x3);
2833
45.8k
                                if let Some(
v2739.8k
) = v26 {
2834
39.8k
                                    let v5 = constructor_put_in_gpr(ctx, arg1);
2835
39.8k
                                    let v28 = constructor_put_in_gpr(ctx, v14.0);
2836
39.8k
                                    let v4 = C::offset32_to_i32(ctx, arg3);
2837
39.8k
                                    let v29 = Amode::ImmRegRegShift {
2838
39.8k
                                        simm32: v4,
2839
39.8k
                                        base: v5,
2840
39.8k
                                        index: v28,
2841
39.8k
                                        shift: v23,
2842
39.8k
                                        flags: arg0,
2843
39.8k
                                    };
2844
39.8k
                                    // Rule at src/isa/x64/inst.isle line 1132.
2845
39.8k
                                    return v29;
2846
5.96k
                                }
2847
0
                            }
2848
0
                        }
2849
6
                    }
2850
0
                }
2851
149k
            }
2852
2.05M
        }
2853
30.4k
    }
2854
2.24M
    let v5 = constructor_put_in_gpr(ctx, arg1);
2855
2.24M
    let v6 = constructor_put_in_gpr(ctx, arg2);
2856
2.24M
    let v4 = C::offset32_to_i32(ctx, arg3);
2857
2.24M
    let v8 = Amode::ImmRegRegShift {
2858
2.24M
        simm32: v4,
2859
2.24M
        base: v5,
2860
2.24M
        index: v6,
2861
2.24M
        shift: 0x0,
2862
2.24M
        flags: arg0,
2863
2.24M
    };
2864
2.24M
    // Rule at src/isa/x64/inst.isle line 1130.
2865
2.24M
    return v8;
2866
2.28M
}
2867
2868
// Generated as internal constructor for term put_masked_in_imm8_gpr.
2869
40.1k
pub fn constructor_put_masked_in_imm8_gpr<C: Context>(
2870
40.1k
    ctx: &mut C,
2871
40.1k
    arg0: Value,
2872
40.1k
    arg1: Type,
2873
40.1k
) -> Imm8Gpr {
2874
40.1k
    let v1 = C::def_inst(ctx, arg0);
2875
40.1k
    if let Some(
v240.0k
) = v1 {
2876
40.0k
        let v3 = &C::inst_data(ctx, v2);
2877
        if let &InstructionData::UnaryImm {
2878
39.0k
            opcode: ref v4,
2879
39.0k
            imm: v5,
2880
40.0k
        } = v3 {
2881
39.0k
            if let &Opcode::Iconst = v4 {
2882
39.0k
                let v6 = C::u64_from_imm64(ctx, v5);
2883
39.0k
                let v8 = &C::const_to_type_masked_imm8(ctx, v6, arg1);
2884
39.0k
                // Rule at src/isa/x64/inst.isle line 1171.
2885
39.0k
                return v8.clone();
2886
0
            }
2887
1.02k
        }
2888
14
    }
2889
1.03k
    let v9 = C::fits_in_16(ctx, arg1);
2890
1.03k
    if let Some(
v100
) = v9 {
2891
0
        let v12 = C::put_in_regs(ctx, arg0);
2892
0
        let v14 = constructor_value_regs_get_gpr(ctx, v12, 0x0);
2893
0
        let v15 = C::shift_mask(ctx, v10);
2894
0
        let v16 = C::u8_as_u32(ctx, v15);
2895
0
        let v17 = RegMemImm::Imm {
2896
0
            simm32: v16,
2897
0
        };
2898
0
        let v18 = &C::gpr_mem_imm_new(ctx, &v17);
2899
0
        let v19 = constructor_x64_and(ctx, I64, v14, v18);
2900
0
        let v20 = &C::gpr_to_imm8_gpr(ctx, v19);
2901
0
        // Rule at src/isa/x64/inst.isle line 1173.
2902
0
        return v20.clone();
2903
1.03k
    }
2904
1.03k
    let v12 = C::put_in_regs(ctx, arg0);
2905
1.03k
    let v14 = constructor_value_regs_get_gpr(ctx, v12, 0x0);
2906
1.03k
    let v21 = &C::gpr_to_imm8_gpr(ctx, v14);
2907
1.03k
    // Rule at src/isa/x64/inst.isle line 1175.
2908
1.03k
    return v21.clone();
2909
40.1k
}
2910
2911
// Generated as internal constructor for term reg_to_gpr_mem_imm.
2912
19.6k
pub fn constructor_reg_to_gpr_mem_imm<C: Context>(
2913
19.6k
    ctx: &mut C,
2914
19.6k
    arg0: Reg,
2915
19.6k
) -> GprMemImm {
2916
19.6k
    let v1 = C::gpr_new(ctx, arg0);
2917
19.6k
    let v2 = &C::gpr_to_gpr_mem_imm(ctx, v1);
2918
19.6k
    // Rule at src/isa/x64/inst.isle line 1591.
2919
19.6k
    return v2.clone();
2920
19.6k
}
2921
2922
// Generated as internal constructor for term put_in_gpr.
2923
6.00M
pub fn constructor_put_in_gpr<C: Context>(
2924
6.00M
    ctx: &mut C,
2925
6.00M
    arg0: Value,
2926
6.00M
) -> Gpr {
2927
6.00M
    let v1 = C::put_in_reg(ctx, arg0);
2928
6.00M
    let v2 = C::gpr_new(ctx, v1);
2929
6.00M
    // Rule at src/isa/x64/inst.isle line 1598.
2930
6.00M
    return v2;
2931
6.00M
}
2932
2933
// Generated as internal constructor for term put_in_gpr_mem.
2934
206k
pub fn constructor_put_in_gpr_mem<C: Context>(
2935
206k
    ctx: &mut C,
2936
206k
    arg0: Value,
2937
206k
) -> GprMem {
2938
206k
    let v1 = &C::put_in_reg_mem(ctx, arg0);
2939
206k
    let v2 = &C::reg_mem_to_gpr_mem(ctx, v1);
2940
206k
    // Rule at src/isa/x64/inst.isle line 1605.
2941
206k
    return v2.clone();
2942
206k
}
2943
2944
// Generated as internal constructor for term put_in_gpr_mem_imm.
2945
455k
pub fn constructor_put_in_gpr_mem_imm<C: Context>(
2946
455k
    ctx: &mut C,
2947
455k
    arg0: Value,
2948
455k
) -> GprMemImm {
2949
455k
    let v1 = &C::put_in_reg_mem_imm(ctx, arg0);
2950
455k
    let v2 = &C::gpr_mem_imm_new(ctx, v1);
2951
455k
    // Rule at src/isa/x64/inst.isle line 1612.
2952
455k
    return v2.clone();
2953
455k
}
2954
2955
// Generated as internal constructor for term put_in_xmm.
2956
1
pub fn constructor_put_in_xmm<C: Context>(
2957
1
    ctx: &mut C,
2958
1
    arg0: Value,
2959
1
) -> Xmm {
2960
1
    let v1 = C::put_in_reg(ctx, arg0);
2961
1
    let v2 = C::xmm_new(ctx, v1);
2962
1
    // Rule at src/isa/x64/inst.isle line 1619.
2963
1
    return v2;
2964
1
}
2965
2966
// Generated as internal constructor for term output_gpr.
2967
2.70M
pub fn constructor_output_gpr<C: Context>(
2968
2.70M
    ctx: &mut C,
2969
2.70M
    arg0: Gpr,
2970
2.70M
) -> InstOutput {
2971
2.70M
    let v1 = C::gpr_to_reg(ctx, arg0);
2972
2.70M
    let v2 = constructor_output_reg(ctx, v1);
2973
2.70M
    // Rule at src/isa/x64/inst.isle line 1636.
2974
2.70M
    return v2;
2975
2.70M
}
2976
2977
// Generated as internal constructor for term value_gprs.
2978
0
pub fn constructor_value_gprs<C: Context>(
2979
0
    ctx: &mut C,
2980
0
    arg0: Gpr,
2981
0
    arg1: Gpr,
2982
0
) -> ValueRegs {
2983
0
    let v2 = C::gpr_to_reg(ctx, arg0);
2984
0
    let v3 = C::gpr_to_reg(ctx, arg1);
2985
0
    let v4 = C::value_regs(ctx, v2, v3);
2986
0
    // Rule at src/isa/x64/inst.isle line 1641.
2987
0
    return v4;
2988
0
}
2989
2990
// Generated as internal constructor for term output_xmm.
2991
0
pub fn constructor_output_xmm<C: Context>(
2992
0
    ctx: &mut C,
2993
0
    arg0: Xmm,
2994
0
) -> InstOutput {
2995
0
    let v1 = C::xmm_to_reg(ctx, arg0);
2996
0
    let v2 = constructor_output_reg(ctx, v1);
2997
0
    // Rule at src/isa/x64/inst.isle line 1646.
2998
0
    return v2;
2999
0
}
3000
3001
// Generated as internal constructor for term value_regs_get_gpr.
3002
13.8k
pub fn constructor_value_regs_get_gpr<C: Context>(
3003
13.8k
    ctx: &mut C,
3004
13.8k
    arg0: ValueRegs,
3005
13.8k
    arg1: usize,
3006
13.8k
) -> Gpr {
3007
13.8k
    let v2 = C::value_regs_get(ctx, arg0, arg1);
3008
13.8k
    let v3 = C::gpr_new(ctx, v2);
3009
13.8k
    // Rule at src/isa/x64/inst.isle line 1653.
3010
13.8k
    return v3;
3011
13.8k
}
3012
3013
// Generated as internal constructor for term lo_gpr.
3014
0
pub fn constructor_lo_gpr<C: Context>(
3015
0
    ctx: &mut C,
3016
0
    arg0: Value,
3017
0
) -> Gpr {
3018
0
    let v1 = constructor_lo_reg(ctx, arg0);
3019
0
    let v2 = C::gpr_new(ctx, v1);
3020
0
    // Rule at src/isa/x64/inst.isle line 1666.
3021
0
    return v2;
3022
0
}
3023
3024
// Generated as internal constructor for term sink_load_to_gpr_mem_imm.
3025
17.4k
pub fn constructor_sink_load_to_gpr_mem_imm<C: Context>(
3026
17.4k
    ctx: &mut C,
3027
17.4k
    arg0: &SinkableLoad,
3028
17.4k
) -> GprMemImm {
3029
17.4k
    let v1 = &constructor_sink_load_to_reg_mem_imm(ctx, arg0);
3030
17.4k
    let v2 = &C::gpr_mem_imm_new(ctx, v1);
3031
17.4k
    // Rule at src/isa/x64/inst.isle line 1801.
3032
17.4k
    return v2.clone();
3033
17.4k
}
3034
3035
// Generated as internal constructor for term sink_load_to_xmm_mem.
3036
0
pub fn constructor_sink_load_to_xmm_mem<C: Context>(
3037
0
    ctx: &mut C,
3038
0
    arg0: &SinkableLoad,
3039
0
) -> XmmMem {
3040
0
    let v1 = &constructor_sink_load_to_reg_mem(ctx, arg0);
3041
0
    let v2 = &C::reg_mem_to_xmm_mem(ctx, v1);
3042
0
    // Rule at src/isa/x64/inst.isle line 1805.
3043
0
    return v2.clone();
3044
0
}
3045
3046
// Generated as internal constructor for term sink_load_to_reg_mem.
3047
0
pub fn constructor_sink_load_to_reg_mem<C: Context>(
3048
0
    ctx: &mut C,
3049
0
    arg0: &SinkableLoad,
3050
0
) -> RegMem {
3051
0
    let v1 = &C::sink_load(ctx, arg0);
3052
0
    let v2 = RegMem::Mem {
3053
0
        addr: v1.clone(),
3054
0
    };
3055
0
    // Rule at src/isa/x64/inst.isle line 1809.
3056
0
    return v2;
3057
0
}
3058
3059
// Generated as internal constructor for term sink_load_to_gpr_mem.
3060
0
pub fn constructor_sink_load_to_gpr_mem<C: Context>(
3061
0
    ctx: &mut C,
3062
0
    arg0: &SinkableLoad,
3063
0
) -> GprMem {
3064
0
    let v1 = &C::sink_load(ctx, arg0);
3065
0
    let v2 = RegMem::Mem {
3066
0
        addr: v1.clone(),
3067
0
    };
3068
0
    let v3 = &C::reg_mem_to_gpr_mem(ctx, &v2);
3069
0
    // Rule at src/isa/x64/inst.isle line 1812.
3070
0
    return v3.clone();
3071
0
}
3072
3073
// Generated as internal constructor for term sink_load_to_reg_mem_imm.
3074
19.2k
pub fn constructor_sink_load_to_reg_mem_imm<C: Context>(
3075
19.2k
    ctx: &mut C,
3076
19.2k
    arg0: &SinkableLoad,
3077
19.2k
) -> RegMemImm {
3078
19.2k
    let v1 = &C::sink_load(ctx, arg0);
3079
19.2k
    let v2 = RegMemImm::Mem {
3080
19.2k
        addr: v1.clone(),
3081
19.2k
    };
3082
19.2k
    // Rule at src/isa/x64/inst.isle line 1815.
3083
19.2k
    return v2;
3084
19.2k
}
3085
3086
// Generated as internal constructor for term xmm_uninit_value.
3087
0
pub fn constructor_xmm_uninit_value<C: Context>(
3088
0
    ctx: &mut C,
3089
0
) -> Xmm {
3090
0
    let v0 = C::temp_writable_xmm(ctx);
3091
0
    let v1 = MInst::XmmUninitializedValue {
3092
0
        dst: v0,
3093
0
    };
3094
0
    let v2 = C::emit(ctx, &v1);
3095
0
    let v3 = C::writable_xmm_to_xmm(ctx, v0);
3096
0
    // Rule at src/isa/x64/inst.isle line 1827.
3097
0
    return v3;
3098
0
}
3099
3100
// Generated as internal constructor for term load_ext_name.
3101
0
pub fn constructor_load_ext_name<C: Context>(
3102
0
    ctx: &mut C,
3103
0
    arg0: ExternalName,
3104
0
    arg1: i64,
3105
0
    arg2: RelocDistance,
3106
0
) -> Reg {
3107
0
    let v3 = C::temp_writable_gpr(ctx);
3108
0
    let v4 = C::writable_gpr_to_reg(ctx, v3);
3109
0
    let v5 = C::box_external_name(ctx, arg0);
3110
0
    let v6 = MInst::LoadExtName {
3111
0
        dst: v4,
3112
0
        name: v5,
3113
0
        offset: arg1,
3114
0
        distance: arg2,
3115
0
    };
3116
0
    let v7 = C::emit(ctx, &v6);
3117
0
    let v8 = constructor_writable_gpr_to_r_reg(ctx, v3);
3118
0
    // Rule at src/isa/x64/inst.isle line 1834.
3119
0
    return v8;
3120
0
}
3121
3122
// Generated as internal constructor for term mov64_mr.
3123
523k
pub fn constructor_mov64_mr<C: Context>(
3124
523k
    ctx: &mut C,
3125
523k
    arg0: &SyntheticAmode,
3126
523k
) -> Reg {
3127
523k
    let v1 = C::temp_writable_gpr(ctx);
3128
523k
    let v2 = MInst::Mov64MR {
3129
523k
        src: arg0.clone(),
3130
523k
        dst: v1,
3131
523k
    };
3132
523k
    let v3 = C::emit(ctx, &v2);
3133
523k
    let v4 = constructor_writable_gpr_to_r_reg(ctx, v1);
3134
523k
    // Rule at src/isa/x64/inst.isle line 1841.
3135
523k
    return v4;
3136
523k
}
3137
3138
// Generated as internal constructor for term alu_rmi_r.
3139
226k
pub fn constructor_alu_rmi_r<C: Context>(
3140
226k
    ctx: &mut C,
3141
226k
    arg0: Type,
3142
226k
    arg1: &AluRmiROpcode,
3143
226k
    arg2: Gpr,
3144
226k
    arg3: &GprMemImm,
3145
226k
) -> Gpr {
3146
226k
    let v4 = C::temp_writable_gpr(ctx);
3147
226k
    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
3148
226k
    let v6 = MInst::AluRmiR {
3149
226k
        size: v5.clone(),
3150
226k
        op: arg1.clone(),
3151
226k
        src1: arg2,
3152
226k
        src2: arg3.clone(),
3153
226k
        dst: v4,
3154
226k
    };
3155
226k
    let v7 = C::emit(ctx, &v6);
3156
226k
    let v8 = C::writable_gpr_to_gpr(ctx, v4);
3157
226k
    // Rule at src/isa/x64/inst.isle line 1848.
3158
226k
    return v8;
3159
226k
}
3160
3161
// Generated as internal constructor for term alu_rm_r_vex.
3162
1.23k
pub fn constructor_alu_rm_r_vex<C: Context>(
3163
1.23k
    ctx: &mut C,
3164
1.23k
    arg0: Type,
3165
1.23k
    arg1: &AluRmROpcode,
3166
1.23k
    arg2: Gpr,
3167
1.23k
    arg3: &GprMem,
3168
1.23k
) -> Gpr {
3169
1.23k
    let v4 = C::temp_writable_gpr(ctx);
3170
1.23k
    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
3171
1.23k
    let v6 = MInst::AluRmRVex {
3172
1.23k
        size: v5.clone(),
3173
1.23k
        op: arg1.clone(),
3174
1.23k
        src1: arg2,
3175
1.23k
        src2: arg3.clone(),
3176
1.23k
        dst: v4,
3177
1.23k
    };
3178
1.23k
    let v7 = C::emit(ctx, &v6);
3179
1.23k
    let v8 = C::writable_gpr_to_gpr(ctx, v4);
3180
1.23k
    // Rule at src/isa/x64/inst.isle line 1856.
3181
1.23k
    return v8;
3182
1.23k
}
3183
3184
// Generated as internal constructor for term xmm_rm_r.
3185
0
pub fn constructor_xmm_rm_r<C: Context>(
3186
0
    ctx: &mut C,
3187
0
    arg0: &SseOpcode,
3188
0
    arg1: Xmm,
3189
0
    arg2: &XmmMemAligned,
3190
0
) -> Xmm {
3191
0
    let v3 = C::temp_writable_xmm(ctx);
3192
0
    let v4 = MInst::XmmRmR {
3193
0
        op: arg0.clone(),
3194
0
        src1: arg1,
3195
0
        src2: arg2.clone(),
3196
0
        dst: v3,
3197
0
    };
3198
0
    let v5 = C::emit(ctx, &v4);
3199
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3200
0
    // Rule at src/isa/x64/inst.isle line 1864.
3201
0
    return v6;
3202
0
}
3203
3204
// Generated as internal constructor for term xmm_rm_r_unaligned.
3205
0
pub fn constructor_xmm_rm_r_unaligned<C: Context>(
3206
0
    ctx: &mut C,
3207
0
    arg0: &SseOpcode,
3208
0
    arg1: Xmm,
3209
0
    arg2: &XmmMem,
3210
0
) -> Xmm {
3211
0
    let v3 = C::temp_writable_xmm(ctx);
3212
0
    let v4 = MInst::XmmRmRUnaligned {
3213
0
        op: arg0.clone(),
3214
0
        src1: arg1,
3215
0
        src2: arg2.clone(),
3216
0
        dst: v3,
3217
0
    };
3218
0
    let v5 = C::emit(ctx, &v4);
3219
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3220
0
    // Rule at src/isa/x64/inst.isle line 1871.
3221
0
    return v6;
3222
0
}
3223
3224
// Generated as internal constructor for term xmm_rm_r_blend.
3225
0
pub fn constructor_xmm_rm_r_blend<C: Context>(
3226
0
    ctx: &mut C,
3227
0
    arg0: &SseOpcode,
3228
0
    arg1: Xmm,
3229
0
    arg2: &XmmMemAligned,
3230
0
    arg3: Xmm,
3231
0
) -> Xmm {
3232
0
    let v4 = C::temp_writable_xmm(ctx);
3233
0
    let v5 = MInst::XmmRmRBlend {
3234
0
        op: arg0.clone(),
3235
0
        src1: arg1,
3236
0
        src2: arg2.clone(),
3237
0
        mask: arg3,
3238
0
        dst: v4,
3239
0
    };
3240
0
    let v6 = C::emit(ctx, &v5);
3241
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
3242
0
    // Rule at src/isa/x64/inst.isle line 1878.
3243
0
    return v7;
3244
0
}
3245
3246
// Generated as internal constructor for term xmm_rmr_blend_vex.
3247
0
pub fn constructor_xmm_rmr_blend_vex<C: Context>(
3248
0
    ctx: &mut C,
3249
0
    arg0: &AvxOpcode,
3250
0
    arg1: Xmm,
3251
0
    arg2: &XmmMem,
3252
0
    arg3: Xmm,
3253
0
) -> Xmm {
3254
0
    let v4 = C::temp_writable_xmm(ctx);
3255
0
    let v5 = MInst::XmmRmRBlendVex {
3256
0
        op: arg0.clone(),
3257
0
        src1: arg1,
3258
0
        src2: arg2.clone(),
3259
0
        mask: arg3,
3260
0
        dst: v4,
3261
0
    };
3262
0
    let v6 = C::emit(ctx, &v5);
3263
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
3264
0
    // Rule at src/isa/x64/inst.isle line 1885.
3265
0
    return v7;
3266
0
}
3267
3268
// Generated as internal constructor for term xmm_unary_rm_r_vex.
3269
0
pub fn constructor_xmm_unary_rm_r_vex<C: Context>(
3270
0
    ctx: &mut C,
3271
0
    arg0: &AvxOpcode,
3272
0
    arg1: &XmmMem,
3273
0
) -> Xmm {
3274
0
    let v2 = C::temp_writable_xmm(ctx);
3275
0
    let v3 = MInst::XmmUnaryRmRVex {
3276
0
        op: arg0.clone(),
3277
0
        src: arg1.clone(),
3278
0
        dst: v2,
3279
0
    };
3280
0
    let v4 = C::emit(ctx, &v3);
3281
0
    let v5 = C::writable_xmm_to_xmm(ctx, v2);
3282
0
    // Rule at src/isa/x64/inst.isle line 1892.
3283
0
    return v5;
3284
0
}
3285
3286
// Generated as internal constructor for term xmm_unary_rm_r_imm_vex.
3287
0
pub fn constructor_xmm_unary_rm_r_imm_vex<C: Context>(
3288
0
    ctx: &mut C,
3289
0
    arg0: &AvxOpcode,
3290
0
    arg1: &XmmMem,
3291
0
    arg2: u8,
3292
0
) -> Xmm {
3293
0
    let v3 = C::temp_writable_xmm(ctx);
3294
0
    let v4 = MInst::XmmUnaryRmRImmVex {
3295
0
        op: arg0.clone(),
3296
0
        src: arg1.clone(),
3297
0
        dst: v3,
3298
0
        imm: arg2,
3299
0
    };
3300
0
    let v5 = C::emit(ctx, &v4);
3301
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3302
0
    // Rule at src/isa/x64/inst.isle line 1899.
3303
0
    return v6;
3304
0
}
3305
3306
// Generated as internal constructor for term xmm_rm_r_imm.
3307
0
pub fn constructor_xmm_rm_r_imm<C: Context>(
3308
0
    ctx: &mut C,
3309
0
    arg0: &SseOpcode,
3310
0
    arg1: Reg,
3311
0
    arg2: &RegMem,
3312
0
    arg3: u8,
3313
0
    arg4: &OperandSize,
3314
0
) -> Xmm {
3315
0
    let v5 = C::temp_writable_xmm(ctx);
3316
0
    let v6 = C::writable_xmm_to_reg(ctx, v5);
3317
0
    let v7 = MInst::XmmRmRImm {
3318
0
        op: arg0.clone(),
3319
0
        src1: arg1,
3320
0
        src2: arg2.clone(),
3321
0
        dst: v6,
3322
0
        imm: arg3,
3323
0
        size: arg4.clone(),
3324
0
    };
3325
0
    let v8 = C::emit(ctx, &v7);
3326
0
    let v9 = C::writable_xmm_to_xmm(ctx, v5);
3327
0
    // Rule at src/isa/x64/inst.isle line 1906.
3328
0
    return v9;
3329
0
}
3330
3331
// Generated as internal constructor for term xmm_vex_pinsr.
3332
0
pub fn constructor_xmm_vex_pinsr<C: Context>(
3333
0
    ctx: &mut C,
3334
0
    arg0: &AvxOpcode,
3335
0
    arg1: Xmm,
3336
0
    arg2: &GprMem,
3337
0
    arg3: u8,
3338
0
) -> Xmm {
3339
0
    let v4 = C::temp_writable_xmm(ctx);
3340
0
    let v5 = MInst::XmmVexPinsr {
3341
0
        op: arg0.clone(),
3342
0
        src1: arg1,
3343
0
        src2: arg2.clone(),
3344
0
        dst: v4,
3345
0
        imm: arg3,
3346
0
    };
3347
0
    let v6 = C::emit(ctx, &v5);
3348
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
3349
0
    // Rule at src/isa/x64/inst.isle line 1918.
3350
0
    return v7;
3351
0
}
3352
3353
// Generated as internal constructor for term xmm_unary_rm_r_imm.
3354
0
pub fn constructor_xmm_unary_rm_r_imm<C: Context>(
3355
0
    ctx: &mut C,
3356
0
    arg0: &SseOpcode,
3357
0
    arg1: &XmmMemAligned,
3358
0
    arg2: u8,
3359
0
) -> Xmm {
3360
0
    let v3 = C::temp_writable_xmm(ctx);
3361
0
    let v4 = MInst::XmmUnaryRmRImm {
3362
0
        op: arg0.clone(),
3363
0
        src: arg1.clone(),
3364
0
        imm: arg2,
3365
0
        dst: v3,
3366
0
    };
3367
0
    let v5 = C::emit(ctx, &v4);
3368
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3369
0
    // Rule at src/isa/x64/inst.isle line 1925.
3370
0
    return v6;
3371
0
}
3372
3373
// Generated as internal constructor for term xmm_unary_rm_r.
3374
0
pub fn constructor_xmm_unary_rm_r<C: Context>(
3375
0
    ctx: &mut C,
3376
0
    arg0: &SseOpcode,
3377
0
    arg1: &XmmMemAligned,
3378
0
) -> Xmm {
3379
0
    let v2 = C::temp_writable_xmm(ctx);
3380
0
    let v3 = MInst::XmmUnaryRmR {
3381
0
        op: arg0.clone(),
3382
0
        src: arg1.clone(),
3383
0
        dst: v2,
3384
0
    };
3385
0
    let v4 = C::emit(ctx, &v3);
3386
0
    let v5 = C::writable_xmm_to_xmm(ctx, v2);
3387
0
    // Rule at src/isa/x64/inst.isle line 1932.
3388
0
    return v5;
3389
0
}
3390
3391
// Generated as internal constructor for term xmm_unary_rm_r_unaligned.
3392
0
pub fn constructor_xmm_unary_rm_r_unaligned<C: Context>(
3393
0
    ctx: &mut C,
3394
0
    arg0: &SseOpcode,
3395
0
    arg1: &XmmMem,
3396
0
) -> Xmm {
3397
0
    let v2 = C::temp_writable_xmm(ctx);
3398
0
    let v3 = MInst::XmmUnaryRmRUnaligned {
3399
0
        op: arg0.clone(),
3400
0
        src: arg1.clone(),
3401
0
        dst: v2,
3402
0
    };
3403
0
    let v4 = C::emit(ctx, &v3);
3404
0
    let v5 = C::writable_xmm_to_xmm(ctx, v2);
3405
0
    // Rule at src/isa/x64/inst.isle line 1939.
3406
0
    return v5;
3407
0
}
3408
3409
// Generated as internal constructor for term xmm_unary_rm_r_evex.
3410
0
pub fn constructor_xmm_unary_rm_r_evex<C: Context>(
3411
0
    ctx: &mut C,
3412
0
    arg0: &Avx512Opcode,
3413
0
    arg1: &XmmMem,
3414
0
) -> Xmm {
3415
0
    let v2 = C::temp_writable_xmm(ctx);
3416
0
    let v3 = MInst::XmmUnaryRmREvex {
3417
0
        op: arg0.clone(),
3418
0
        src: arg1.clone(),
3419
0
        dst: v2,
3420
0
    };
3421
0
    let v4 = C::emit(ctx, &v3);
3422
0
    let v5 = C::writable_xmm_to_xmm(ctx, v2);
3423
0
    // Rule at src/isa/x64/inst.isle line 1946.
3424
0
    return v5;
3425
0
}
3426
3427
// Generated as internal constructor for term xmm_rm_r_evex.
3428
0
pub fn constructor_xmm_rm_r_evex<C: Context>(
3429
0
    ctx: &mut C,
3430
0
    arg0: &Avx512Opcode,
3431
0
    arg1: Xmm,
3432
0
    arg2: &XmmMem,
3433
0
) -> Xmm {
3434
0
    let v3 = C::temp_writable_xmm(ctx);
3435
0
    let v4 = MInst::XmmRmREvex {
3436
0
        op: arg0.clone(),
3437
0
        src1: arg1,
3438
0
        src2: arg2.clone(),
3439
0
        dst: v3,
3440
0
    };
3441
0
    let v5 = C::emit(ctx, &v4);
3442
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3443
0
    // Rule at src/isa/x64/inst.isle line 1953.
3444
0
    return v6;
3445
0
}
3446
3447
// Generated as internal constructor for term xmm_unary_rm_r_imm_evex.
3448
0
pub fn constructor_xmm_unary_rm_r_imm_evex<C: Context>(
3449
0
    ctx: &mut C,
3450
0
    arg0: &Avx512Opcode,
3451
0
    arg1: &XmmMem,
3452
0
    arg2: u8,
3453
0
) -> Xmm {
3454
0
    let v3 = C::temp_writable_xmm(ctx);
3455
0
    let v4 = MInst::XmmUnaryRmRImmEvex {
3456
0
        op: arg0.clone(),
3457
0
        src: arg1.clone(),
3458
0
        dst: v3,
3459
0
        imm: arg2,
3460
0
    };
3461
0
    let v5 = C::emit(ctx, &v4);
3462
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3463
0
    // Rule at src/isa/x64/inst.isle line 1963.
3464
0
    return v6;
3465
0
}
3466
3467
// Generated as internal constructor for term xmm_rmi_xmm.
3468
0
pub fn constructor_xmm_rmi_xmm<C: Context>(
3469
0
    ctx: &mut C,
3470
0
    arg0: &SseOpcode,
3471
0
    arg1: Xmm,
3472
0
    arg2: &XmmMemAlignedImm,
3473
0
) -> Xmm {
3474
0
    let v3 = C::temp_writable_xmm(ctx);
3475
0
    let v4 = MInst::XmmRmiReg {
3476
0
        opcode: arg0.clone(),
3477
0
        src1: arg1,
3478
0
        src2: arg2.clone(),
3479
0
        dst: v3,
3480
0
    };
3481
0
    let v5 = C::emit(ctx, &v4);
3482
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3483
0
    // Rule at src/isa/x64/inst.isle line 1970.
3484
0
    return v6;
3485
0
}
3486
3487
// Generated as internal constructor for term xmm_to_gpr_imm.
3488
0
pub fn constructor_xmm_to_gpr_imm<C: Context>(
3489
0
    ctx: &mut C,
3490
0
    arg0: &SseOpcode,
3491
0
    arg1: Xmm,
3492
0
    arg2: u8,
3493
0
) -> Gpr {
3494
0
    let v3 = C::temp_writable_gpr(ctx);
3495
0
    let v4 = MInst::XmmToGprImm {
3496
0
        op: arg0.clone(),
3497
0
        src: arg1,
3498
0
        dst: v3,
3499
0
        imm: arg2,
3500
0
    };
3501
0
    let v5 = C::emit(ctx, &v4);
3502
0
    let v6 = C::writable_gpr_to_gpr(ctx, v3);
3503
0
    // Rule at src/isa/x64/inst.isle line 1980.
3504
0
    return v6;
3505
0
}
3506
3507
// Generated as internal constructor for term xmm_to_gpr_imm_vex.
3508
0
pub fn constructor_xmm_to_gpr_imm_vex<C: Context>(
3509
0
    ctx: &mut C,
3510
0
    arg0: &AvxOpcode,
3511
0
    arg1: Xmm,
3512
0
    arg2: u8,
3513
0
) -> Gpr {
3514
0
    let v3 = C::temp_writable_gpr(ctx);
3515
0
    let v4 = MInst::XmmToGprImmVex {
3516
0
        op: arg0.clone(),
3517
0
        src: arg1,
3518
0
        dst: v3,
3519
0
        imm: arg2,
3520
0
    };
3521
0
    let v5 = C::emit(ctx, &v4);
3522
0
    let v6 = C::writable_gpr_to_gpr(ctx, v3);
3523
0
    // Rule at src/isa/x64/inst.isle line 1987.
3524
0
    return v6;
3525
0
}
3526
3527
// Generated as internal constructor for term gpr_to_xmm.
3528
0
pub fn constructor_gpr_to_xmm<C: Context>(
3529
0
    ctx: &mut C,
3530
0
    arg0: &SseOpcode,
3531
0
    arg1: &GprMem,
3532
0
    arg2: &OperandSize,
3533
0
) -> Xmm {
3534
0
    let v3 = C::temp_writable_xmm(ctx);
3535
0
    let v4 = MInst::GprToXmm {
3536
0
        op: arg0.clone(),
3537
0
        src: arg1.clone(),
3538
0
        dst: v3,
3539
0
        src_size: arg2.clone(),
3540
0
    };
3541
0
    let v5 = C::emit(ctx, &v4);
3542
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3543
0
    // Rule at src/isa/x64/inst.isle line 1994.
3544
0
    return v6;
3545
0
}
3546
3547
// Generated as internal constructor for term gpr_to_xmm_vex.
3548
0
pub fn constructor_gpr_to_xmm_vex<C: Context>(
3549
0
    ctx: &mut C,
3550
0
    arg0: &AvxOpcode,
3551
0
    arg1: &GprMem,
3552
0
    arg2: &OperandSize,
3553
0
) -> Xmm {
3554
0
    let v3 = C::temp_writable_xmm(ctx);
3555
0
    let v4 = MInst::GprToXmmVex {
3556
0
        op: arg0.clone(),
3557
0
        src: arg1.clone(),
3558
0
        dst: v3,
3559
0
        src_size: arg2.clone(),
3560
0
    };
3561
0
    let v5 = C::emit(ctx, &v4);
3562
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3563
0
    // Rule at src/isa/x64/inst.isle line 2001.
3564
0
    return v6;
3565
0
}
3566
3567
// Generated as internal constructor for term xmm_to_gpr.
3568
0
pub fn constructor_xmm_to_gpr<C: Context>(
3569
0
    ctx: &mut C,
3570
0
    arg0: &SseOpcode,
3571
0
    arg1: Xmm,
3572
0
    arg2: &OperandSize,
3573
0
) -> Gpr {
3574
0
    let v3 = C::temp_writable_gpr(ctx);
3575
0
    let v4 = MInst::XmmToGpr {
3576
0
        op: arg0.clone(),
3577
0
        src: arg1,
3578
0
        dst: v3,
3579
0
        dst_size: arg2.clone(),
3580
0
    };
3581
0
    let v5 = C::emit(ctx, &v4);
3582
0
    let v6 = C::writable_gpr_to_gpr(ctx, v3);
3583
0
    // Rule at src/isa/x64/inst.isle line 2008.
3584
0
    return v6;
3585
0
}
3586
3587
// Generated as internal constructor for term xmm_to_gpr_vex.
3588
0
pub fn constructor_xmm_to_gpr_vex<C: Context>(
3589
0
    ctx: &mut C,
3590
0
    arg0: &AvxOpcode,
3591
0
    arg1: Xmm,
3592
0
    arg2: &OperandSize,
3593
0
) -> Gpr {
3594
0
    let v3 = C::temp_writable_gpr(ctx);
3595
0
    let v4 = MInst::XmmToGprVex {
3596
0
        op: arg0.clone(),
3597
0
        src: arg1,
3598
0
        dst: v3,
3599
0
        dst_size: arg2.clone(),
3600
0
    };
3601
0
    let v5 = C::emit(ctx, &v4);
3602
0
    let v6 = C::writable_gpr_to_gpr(ctx, v3);
3603
0
    // Rule at src/isa/x64/inst.isle line 2015.
3604
0
    return v6;
3605
0
}
3606
3607
// Generated as internal constructor for term xmm_min_max_seq.
3608
0
pub fn constructor_xmm_min_max_seq<C: Context>(
3609
0
    ctx: &mut C,
3610
0
    arg0: Type,
3611
0
    arg1: bool,
3612
0
    arg2: Xmm,
3613
0
    arg3: Xmm,
3614
0
) -> Xmm {
3615
0
    let v4 = C::temp_writable_xmm(ctx);
3616
0
    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
3617
0
    let v6 = MInst::XmmMinMaxSeq {
3618
0
        size: v5.clone(),
3619
0
        is_min: arg1,
3620
0
        lhs: arg2,
3621
0
        rhs: arg3,
3622
0
        dst: v4,
3623
0
    };
3624
0
    let v7 = C::emit(ctx, &v6);
3625
0
    let v8 = C::writable_xmm_to_xmm(ctx, v4);
3626
0
    // Rule at src/isa/x64/inst.isle line 2022.
3627
0
    return v8;
3628
0
}
3629
3630
// Generated as internal constructor for term xmm_rmir_vex.
3631
0
pub fn constructor_xmm_rmir_vex<C: Context>(
3632
0
    ctx: &mut C,
3633
0
    arg0: &AvxOpcode,
3634
0
    arg1: Xmm,
3635
0
    arg2: &XmmMemImm,
3636
0
) -> Xmm {
3637
0
    let v3 = C::temp_writable_xmm(ctx);
3638
0
    let v4 = MInst::XmmRmiRVex {
3639
0
        op: arg0.clone(),
3640
0
        src1: arg1,
3641
0
        src2: arg2.clone(),
3642
0
        dst: v3,
3643
0
    };
3644
0
    let v5 = C::emit(ctx, &v4);
3645
0
    let v6 = C::writable_xmm_to_xmm(ctx, v3);
3646
0
    // Rule at src/isa/x64/inst.isle line 2030.
3647
0
    return v6;
3648
0
}
3649
3650
// Generated as internal constructor for term xmm_rmr_imm_vex.
3651
0
pub fn constructor_xmm_rmr_imm_vex<C: Context>(
3652
0
    ctx: &mut C,
3653
0
    arg0: &AvxOpcode,
3654
0
    arg1: Xmm,
3655
0
    arg2: &XmmMem,
3656
0
    arg3: u8,
3657
0
) -> Xmm {
3658
0
    let v4 = C::temp_writable_xmm(ctx);
3659
0
    let v5 = MInst::XmmRmRImmVex {
3660
0
        op: arg0.clone(),
3661
0
        src1: arg1,
3662
0
        src2: arg2.clone(),
3663
0
        dst: v4,
3664
0
        imm: arg3,
3665
0
    };
3666
0
    let v6 = C::emit(ctx, &v5);
3667
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
3668
0
    // Rule at src/isa/x64/inst.isle line 2037.
3669
0
    return v7;
3670
0
}
3671
3672
// Generated as internal constructor for term xmm_rmr_vex3.
3673
0
pub fn constructor_xmm_rmr_vex3<C: Context>(
3674
0
    ctx: &mut C,
3675
0
    arg0: &AvxOpcode,
3676
0
    arg1: Xmm,
3677
0
    arg2: Xmm,
3678
0
    arg3: &XmmMem,
3679
0
) -> Xmm {
3680
0
    let v4 = C::temp_writable_xmm(ctx);
3681
0
    let v5 = MInst::XmmRmRVex3 {
3682
0
        op: arg0.clone(),
3683
0
        src1: arg1,
3684
0
        src2: arg2,
3685
0
        src3: arg3.clone(),
3686
0
        dst: v4,
3687
0
    };
3688
0
    let v6 = C::emit(ctx, &v5);
3689
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
3690
0
    // Rule at src/isa/x64/inst.isle line 2044.
3691
0
    return v7;
3692
0
}
3693
3694
// Generated as internal constructor for term mul_hi.
3695
0
pub fn constructor_mul_hi<C: Context>(
3696
0
    ctx: &mut C,
3697
0
    arg0: Type,
3698
0
    arg1: bool,
3699
0
    arg2: Gpr,
3700
0
    arg3: &GprMem,
3701
0
) -> ValueRegs {
3702
0
    let v4 = C::temp_writable_gpr(ctx);
3703
0
    let v5 = C::temp_writable_gpr(ctx);
3704
0
    let v6 = &C::raw_operand_size_of_type(ctx, arg0);
3705
0
    let v7 = MInst::MulHi {
3706
0
        size: v6.clone(),
3707
0
        signed: arg1,
3708
0
        src1: arg2,
3709
0
        src2: arg3.clone(),
3710
0
        dst_lo: v4,
3711
0
        dst_hi: v5,
3712
0
    };
3713
0
    let v8 = C::emit(ctx, &v7);
3714
0
    let v9 = C::writable_gpr_to_gpr(ctx, v4);
3715
0
    let v10 = C::writable_gpr_to_gpr(ctx, v5);
3716
0
    let v11 = constructor_value_gprs(ctx, v9, v10);
3717
0
    // Rule at src/isa/x64/inst.isle line 2053.
3718
0
    return v11;
3719
0
}
3720
3721
// Generated as internal constructor for term unary_rm_r.
3722
615
pub fn constructor_unary_rm_r<C: Context>(
3723
615
    ctx: &mut C,
3724
615
    arg0: &UnaryRmROpcode,
3725
615
    arg1: Gpr,
3726
615
    arg2: &OperandSize,
3727
615
) -> Gpr {
3728
615
    let v3 = C::temp_writable_gpr(ctx);
3729
615
    let v4 = &C::gpr_to_gpr_mem(ctx, arg1);
3730
615
    let v5 = MInst::UnaryRmR {
3731
615
        size: arg2.clone(),
3732
615
        op: arg0.clone(),
3733
615
        src: v4.clone(),
3734
615
        dst: v3,
3735
615
    };
3736
615
    let v6 = C::emit(ctx, &v5);
3737
615
    let v7 = C::writable_gpr_to_gpr(ctx, v3);
3738
615
    // Rule at src/isa/x64/inst.isle line 2067.
3739
615
    return v7;
3740
615
}
3741
3742
// Generated as internal constructor for term unary_rm_r_vex.
3743
58
pub fn constructor_unary_rm_r_vex<C: Context>(
3744
58
    ctx: &mut C,
3745
58
    arg0: &UnaryRmRVexOpcode,
3746
58
    arg1: &GprMem,
3747
58
    arg2: &OperandSize,
3748
58
) -> Gpr {
3749
58
    let v3 = C::temp_writable_gpr(ctx);
3750
58
    let v4 = MInst::UnaryRmRVex {
3751
58
        size: arg2.clone(),
3752
58
        op: arg0.clone(),
3753
58
        src: arg1.clone(),
3754
58
        dst: v3,
3755
58
    };
3756
58
    let v5 = C::emit(ctx, &v4);
3757
58
    let v6 = C::writable_gpr_to_gpr(ctx, v3);
3758
58
    // Rule at src/isa/x64/inst.isle line 2074.
3759
58
    return v6;
3760
58
}
3761
3762
// Generated as internal constructor for term unary_rm_r_imm_vex.
3763
955
pub fn constructor_unary_rm_r_imm_vex<C: Context>(
3764
955
    ctx: &mut C,
3765
955
    arg0: &UnaryRmRImmVexOpcode,
3766
955
    arg1: &GprMem,
3767
955
    arg2: &OperandSize,
3768
955
    arg3: u8,
3769
955
) -> Gpr {
3770
955
    let v4 = C::temp_writable_gpr(ctx);
3771
955
    let v5 = MInst::UnaryRmRImmVex {
3772
955
        size: arg2.clone(),
3773
955
        op: arg0.clone(),
3774
955
        src: arg1.clone(),
3775
955
        dst: v4,
3776
955
        imm: arg3,
3777
955
    };
3778
955
    let v6 = C::emit(ctx, &v5);
3779
955
    let v7 = C::writable_gpr_to_gpr(ctx, v4);
3780
955
    // Rule at src/isa/x64/inst.isle line 2081.
3781
955
    return v7;
3782
955
}
3783
3784
// Generated as internal constructor for term cvt_int_to_float.
3785
0
pub fn constructor_cvt_int_to_float<C: Context>(
3786
0
    ctx: &mut C,
3787
0
    arg0: &SseOpcode,
3788
0
    arg1: Xmm,
3789
0
    arg2: &GprMem,
3790
0
    arg3: &OperandSize,
3791
0
) -> Xmm {
3792
0
    let v4 = C::temp_writable_xmm(ctx);
3793
0
    let v5 = MInst::CvtIntToFloat {
3794
0
        op: arg0.clone(),
3795
0
        src1: arg1,
3796
0
        src2: arg2.clone(),
3797
0
        dst: v4,
3798
0
        src2_size: arg3.clone(),
3799
0
    };
3800
0
    let v6 = C::emit(ctx, &v5);
3801
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
3802
0
    // Rule at src/isa/x64/inst.isle line 2087.
3803
0
    return v7;
3804
0
}
3805
3806
// Generated as internal constructor for term cvt_int_to_float_vex.
3807
0
pub fn constructor_cvt_int_to_float_vex<C: Context>(
3808
0
    ctx: &mut C,
3809
0
    arg0: &AvxOpcode,
3810
0
    arg1: Xmm,
3811
0
    arg2: &GprMem,
3812
0
    arg3: &OperandSize,
3813
0
) -> Xmm {
3814
0
    let v4 = C::temp_writable_xmm(ctx);
3815
0
    let v5 = MInst::CvtIntToFloatVex {
3816
0
        op: arg0.clone(),
3817
0
        src1: arg1,
3818
0
        src2: arg2.clone(),
3819
0
        dst: v4,
3820
0
        src2_size: arg3.clone(),
3821
0
    };
3822
0
    let v6 = C::emit(ctx, &v5);
3823
0
    let v7 = C::writable_xmm_to_xmm(ctx, v4);
3824
0
    // Rule at src/isa/x64/inst.isle line 2093.
3825
0
    return v7;
3826
0
}
3827
3828
// Generated as internal constructor for term cvt_u64_to_float_seq.
3829
0
pub fn constructor_cvt_u64_to_float_seq<C: Context>(
3830
0
    ctx: &mut C,
3831
0
    arg0: Type,
3832
0
    arg1: Gpr,
3833
0
) -> Xmm {
3834
0
    let v2 = &C::raw_operand_size_of_type(ctx, arg0);
3835
0
    let v3 = C::temp_writable_xmm(ctx);
3836
0
    let v4 = C::temp_writable_gpr(ctx);
3837
0
    let v5 = C::temp_writable_gpr(ctx);
3838
0
    let v6 = MInst::CvtUint64ToFloatSeq {
3839
0
        dst_size: v2.clone(),
3840
0
        src: arg1,
3841
0
        dst: v3,
3842
0
        tmp_gpr1: v4,
3843
0
        tmp_gpr2: v5,
3844
0
    };
3845
0
    let v7 = C::emit(ctx, &v6);
3846
0
    let v8 = C::writable_xmm_to_xmm(ctx, v3);
3847
0
    // Rule at src/isa/x64/inst.isle line 2099.
3848
0
    return v8;
3849
0
}
3850
3851
// Generated as internal constructor for term cvt_float_to_uint_seq.
3852
0
pub fn constructor_cvt_float_to_uint_seq<C: Context>(
3853
0
    ctx: &mut C,
3854
0
    arg0: Type,
3855
0
    arg1: Value,
3856
0
    arg2: bool,
3857
0
) -> Gpr {
3858
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
3859
0
    let v2 = C::value_type(ctx, arg1);
3860
0
    let v5 = &C::raw_operand_size_of_type(ctx, v2);
3861
0
    let v6 = C::temp_writable_gpr(ctx);
3862
0
    let v7 = C::temp_writable_xmm(ctx);
3863
0
    let v8 = C::temp_writable_xmm(ctx);
3864
0
    let v9 = C::temp_writable_gpr(ctx);
3865
0
    let v10 = constructor_put_in_xmm(ctx, arg1);
3866
0
    let v11 = MInst::CvtFloatToUintSeq {
3867
0
        dst_size: v4.clone(),
3868
0
        src_size: v5.clone(),
3869
0
        is_saturating: arg2,
3870
0
        src: v10,
3871
0
        dst: v6,
3872
0
        tmp_gpr: v9,
3873
0
        tmp_xmm: v7,
3874
0
        tmp_xmm2: v8,
3875
0
    };
3876
0
    let v12 = C::emit(ctx, &v11);
3877
0
    let v13 = C::writable_gpr_to_gpr(ctx, v6);
3878
0
    // Rule at src/isa/x64/inst.isle line 2108.
3879
0
    return v13;
3880
0
}
3881
3882
// Generated as internal constructor for term cvt_float_to_sint_seq.
3883
0
pub fn constructor_cvt_float_to_sint_seq<C: Context>(
3884
0
    ctx: &mut C,
3885
0
    arg0: Type,
3886
0
    arg1: Value,
3887
0
    arg2: bool,
3888
0
) -> Gpr {
3889
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
3890
0
    let v2 = C::value_type(ctx, arg1);
3891
0
    let v5 = &C::raw_operand_size_of_type(ctx, v2);
3892
0
    let v6 = C::temp_writable_gpr(ctx);
3893
0
    let v7 = C::temp_writable_xmm(ctx);
3894
0
    let v8 = C::temp_writable_gpr(ctx);
3895
0
    let v9 = constructor_put_in_xmm(ctx, arg1);
3896
0
    let v10 = MInst::CvtFloatToSintSeq {
3897
0
        dst_size: v4.clone(),
3898
0
        src_size: v5.clone(),
3899
0
        is_saturating: arg2,
3900
0
        src: v9,
3901
0
        dst: v6,
3902
0
        tmp_gpr: v8,
3903
0
        tmp_xmm: v7,
3904
0
    };
3905
0
    let v11 = C::emit(ctx, &v10);
3906
0
    let v12 = C::writable_gpr_to_gpr(ctx, v6);
3907
0
    // Rule at src/isa/x64/inst.isle line 2120.
3908
0
    return v12;
3909
0
}
3910
3911
// Generated as internal constructor for term mov_from_preg.
3912
20.3k
pub fn constructor_mov_from_preg<C: Context>(
3913
20.3k
    ctx: &mut C,
3914
20.3k
    arg0: PReg,
3915
20.3k
) -> Reg {
3916
20.3k
    let v1 = C::temp_writable_gpr(ctx);
3917
20.3k
    let v2 = MInst::MovFromPReg {
3918
20.3k
        src: arg0,
3919
20.3k
        dst: v1,
3920
20.3k
    };
3921
20.3k
    let v3 = C::emit(ctx, &v2);
3922
20.3k
    let v4 = constructor_writable_gpr_to_r_reg(ctx, v1);
3923
20.3k
    // Rule at src/isa/x64/inst.isle line 2132.
3924
20.3k
    return v4;
3925
20.3k
}
3926
3927
// Generated as internal constructor for term extend_to_gpr.
3928
810k
pub fn constructor_extend_to_gpr<C: Context>(
3929
810k
    ctx: &mut C,
3930
810k
    arg0: Value,
3931
810k
    arg1: Type,
3932
810k
    arg2: &ExtendKind,
3933
810k
) -> Gpr {
3934
810k
    let v1 = C::value_type(ctx, arg0);
3935
810k
    if v1 == arg1 {
3936
15.3k
        let v4 = constructor_put_in_gpr(ctx, arg0);
3937
15.3k
        // Rule at src/isa/x64/inst.isle line 2156.
3938
15.3k
        return v4;
3939
794k
    }
3940
794k
    if v1 == I32 {
3941
778k
        if arg1 == I64 {
3942
778k
            if let &ExtendKind::Zero = arg2 {
3943
778k
                let v5 = constructor_value32_zeros_upper32(ctx, arg0);
3944
778k
                if v5 == true {
3945
612k
                    let v6 = C::put_in_reg(ctx, arg0);
3946
612k
                    let v10 = C::add_range_fact(ctx, v6, 0x40, 0x0, 0xFFFFFFFF);
3947
612k
                    let v11 = C::gpr_new(ctx, v10);
3948
612k
                    // Rule at src/isa/x64/inst.isle line 2164.
3949
612k
                    return v11;
3950
166k
                }
3951
6
            }
3952
0
        }
3953
16.5k
    }
3954
182k
    let v13 = &C::operand_size_of_type_32_64(ctx, arg1);
3955
182k
    let v14 = constructor_operand_size_bits(ctx, v13);
3956
182k
    let v12 = C::ty_bits_u16(ctx, v1);
3957
182k
    let v15 = &C::ext_mode(ctx, v12, v14);
3958
182k
    let v16 = &constructor_put_in_gpr_mem(ctx, arg0);
3959
182k
    let v17 = constructor_extend(ctx, arg2, arg1, v15, v16);
3960
182k
    // Rule at src/isa/x64/inst.isle line 2168.
3961
182k
    return v17;
3962
810k
}
3963
3964
// Generated as internal constructor for term extend.
3965
182k
pub fn constructor_extend<C: Context>(
3966
182k
    ctx: &mut C,
3967
182k
    arg0: &ExtendKind,
3968
182k
    arg1: Type,
3969
182k
    arg2: &ExtMode,
3970
182k
    arg3: &GprMem,
3971
182k
) -> Gpr {
3972
182k
    match arg0 {
3973
        &ExtendKind::Sign => {
3974
484
            let v5 = constructor_x64_movsx(ctx, arg2, arg3);
3975
484
            // Rule at src/isa/x64/inst.isle line 2188.
3976
484
            return v5;
3977
        }
3978
        &ExtendKind::Zero => {
3979
182k
            let v4 = constructor_x64_movzx(ctx, arg2, arg3);
3980
182k
            // Rule at src/isa/x64/inst.isle line 2184.
3981
182k
            return v4;
3982
        }
3983
0
        _ => {}
3984
0
    }
3985
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "extend", "src/isa/x64/inst.isle line 2181")
3986
182k
}
3987
3988
// Generated as internal constructor for term value32_zeros_upper32.
3989
778k
pub fn constructor_value32_zeros_upper32<C: Context>(
3990
778k
    ctx: &mut C,
3991
778k
    arg0: Value,
3992
778k
) -> bool {
3993
778k
    let v1 = C::def_inst(ctx, arg0);
3994
778k
    if let Some(
v2706k
) = v1 {
3995
706k
        let v3 = &C::inst_data(ctx, v2);
3996
706k
        match v3 {
3997
            &InstructionData::Binary {
3998
613k
                opcode: ref v4,
3999
613k
                args: ref v5,
4000
613k
            } => {
4001
613k
                match v4 {
4002
                    &Opcode::Iadd => {
4003
                        // Rule at src/isa/x64/inst.isle line 2195.
4004
585k
                        return true;
4005
                    }
4006
                    &Opcode::Isub => {
4007
                        // Rule at src/isa/x64/inst.isle line 2196.
4008
24.5k
                        return true;
4009
                    }
4010
                    &Opcode::Imul => {
4011
                        // Rule at src/isa/x64/inst.isle line 2197.
4012
3
                        return true;
4013
                    }
4014
                    &Opcode::Band => {
4015
                        // Rule at src/isa/x64/inst.isle line 2198.
4016
1.07k
                        return true;
4017
                    }
4018
                    &Opcode::Bor => {
4019
                        // Rule at src/isa/x64/inst.isle line 2199.
4020
705
                        return true;
4021
                    }
4022
                    &Opcode::Bxor => {
4023
                        // Rule at src/isa/x64/inst.isle line 2200.
4024
125
                        return true;
4025
                    }
4026
                    &Opcode::Ishl => {
4027
                        // Rule at src/isa/x64/inst.isle line 2201.
4028
15
                        return true;
4029
                    }
4030
                    &Opcode::Ushr => {
4031
                        // Rule at src/isa/x64/inst.isle line 2202.
4032
310
                        return true;
4033
                    }
4034
1.39k
                    _ => {}
4035
                }
4036
            }
4037
            &InstructionData::Load {
4038
71.4k
                opcode: ref v10,
4039
71.4k
                arg: v11,
4040
71.4k
                flags: v12,
4041
71.4k
                offset: v13,
4042
71.4k
            } => {
4043
71.4k
                if let &Opcode::Uload32 = v10 {
4044
                    // Rule at src/isa/x64/inst.isle line 2203.
4045
0
                    return true;
4046
71.4k
                }
4047
            }
4048
21.2k
            _ => {}
4049
        }
4050
72.0k
    }
4051
    // Rule at src/isa/x64/inst.isle line 2204.
4052
166k
    return false;
4053
778k
}
4054
4055
// Generated as internal constructor for term vec_int_type.
4056
0
pub fn constructor_vec_int_type<C: Context>(
4057
0
    ctx: &mut C,
4058
0
    arg0: Type,
4059
0
) -> Type {
4060
0
    let v1 = C::multi_lane(ctx, arg0);
4061
0
    if let Some(v2) = v1 {
4062
0
        match v2.0 {
4063
            0x8 => {
4064
0
                if v2.1 == 0x10 {
4065
                    // Rule at src/isa/x64/inst.isle line 2210.
4066
0
                    return I8X16;
4067
0
                }
4068
            }
4069
            0x10 => {
4070
0
                if v2.1 == 0x8 {
4071
                    // Rule at src/isa/x64/inst.isle line 2211.
4072
0
                    return I16X8;
4073
0
                }
4074
            }
4075
            0x20 => {
4076
0
                if v2.1 == 0x4 {
4077
                    // Rule at src/isa/x64/inst.isle line 2212.
4078
0
                    return I32X4;
4079
0
                }
4080
            }
4081
            0x40 => {
4082
0
                if v2.1 == 0x2 {
4083
                    // Rule at src/isa/x64/inst.isle line 2213.
4084
0
                    return I64X2;
4085
0
                }
4086
            }
4087
0
            _ => {}
4088
        }
4089
0
    }
4090
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "vec_int_type", "src/isa/x64/inst.isle line 2209")
4091
0
}
4092
4093
// Generated as internal constructor for term x64_xor_vector.
4094
0
pub fn constructor_x64_xor_vector<C: Context>(
4095
0
    ctx: &mut C,
4096
0
    arg0: Type,
4097
0
    arg1: Xmm,
4098
0
    arg2: &XmmMem,
4099
0
) -> Xmm {
4100
0
    match arg0 {
4101
        F32 => {
4102
0
            let v3 = constructor_x64_xorps(ctx, arg1, arg2);
4103
0
            // Rule at src/isa/x64/inst.isle line 2217.
4104
0
            return v3;
4105
        }
4106
        F64 => {
4107
0
            let v4 = constructor_x64_xorpd(ctx, arg1, arg2);
4108
0
            // Rule at src/isa/x64/inst.isle line 2218.
4109
0
            return v4;
4110
        }
4111
        F32X4 => {
4112
0
            let v3 = constructor_x64_xorps(ctx, arg1, arg2);
4113
0
            // Rule at src/isa/x64/inst.isle line 2219.
4114
0
            return v3;
4115
        }
4116
        F64X2 => {
4117
0
            let v4 = constructor_x64_xorpd(ctx, arg1, arg2);
4118
0
            // Rule at src/isa/x64/inst.isle line 2220.
4119
0
            return v4;
4120
        }
4121
0
        _ => {}
4122
0
    }
4123
0
    let v5 = C::multi_lane(ctx, arg0);
4124
0
    if let Some(v6) = v5 {
4125
0
        let v9 = constructor_x64_pxor(ctx, arg1, arg2);
4126
0
        // Rule at src/isa/x64/inst.isle line 2221.
4127
0
        return v9;
4128
0
    }
4129
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_xor_vector", "src/isa/x64/inst.isle line 2216")
4130
0
}
4131
4132
// Generated as internal constructor for term vector_all_ones.
4133
0
pub fn constructor_vector_all_ones<C: Context>(
4134
0
    ctx: &mut C,
4135
0
) -> Xmm {
4136
0
    let v0 = constructor_xmm_uninit_value(ctx);
4137
0
    let v1 = &C::xmm_to_xmm_mem(ctx, v0);
4138
0
    let v2 = constructor_x64_pcmpeqd(ctx, v0, v1);
4139
0
    // Rule at src/isa/x64/inst.isle line 2233.
4140
0
    return v2;
4141
0
}
4142
4143
// Generated as internal constructor for term mov_rmi_to_xmm.
4144
0
pub fn constructor_mov_rmi_to_xmm<C: Context>(
4145
0
    ctx: &mut C,
4146
0
    arg0: &RegMemImm,
4147
0
) -> XmmMemImm {
4148
0
    match arg0 {
4149
        &RegMemImm::Reg {
4150
0
            reg: v4,
4151
0
        } => {
4152
0
            let v5 = &C::reg_to_gpr_mem(ctx, v4);
4153
0
            let v6 = constructor_x64_movd_to_xmm(ctx, v5);
4154
0
            let v7 = &C::xmm_to_xmm_mem_imm(ctx, v6);
4155
0
            // Rule at src/isa/x64/inst.isle line 2241.
4156
0
            return v7.clone();
4157
        }
4158
        &RegMemImm::Mem {
4159
0
            addr: ref v1,
4160
0
        } => {
4161
0
            let v2 = &C::xmm_mem_imm_new(ctx, arg0);
4162
0
            // Rule at src/isa/x64/inst.isle line 2239.
4163
0
            return v2.clone();
4164
        }
4165
        &RegMemImm::Imm {
4166
0
            simm32: v3,
4167
0
        } => {
4168
0
            let v2 = &C::xmm_mem_imm_new(ctx, arg0);
4169
0
            // Rule at src/isa/x64/inst.isle line 2240.
4170
0
            return v2.clone();
4171
        }
4172
0
        _ => {}
4173
0
    }
4174
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "mov_rmi_to_xmm", "src/isa/x64/inst.isle line 2238")
4175
0
}
4176
4177
// Generated as internal constructor for term x64_load.
4178
2.18k
pub fn constructor_x64_load<C: Context>(
4179
2.18k
    ctx: &mut C,
4180
2.18k
    arg0: Type,
4181
2.18k
    arg1: &SyntheticAmode,
4182
2.18k
    arg2: &ExtKind,
4183
2.18k
) -> Reg {
4184
2.18k
    match arg0 {
4185
        I64 => {
4186
2.18k
            let v11 = constructor_mov64_mr(ctx, arg1);
4187
2.18k
            // Rule at src/isa/x64/inst.isle line 2260.
4188
2.18k
            return v11;
4189
        }
4190
        F32 => {
4191
0
            let v12 = constructor_x64_movss_load(ctx, arg1);
4192
0
            let v13 = C::xmm_to_reg(ctx, v12);
4193
0
            // Rule at src/isa/x64/inst.isle line 2263.
4194
0
            return v13;
4195
        }
4196
        F64 => {
4197
0
            let v14 = constructor_x64_movsd_load(ctx, arg1);
4198
0
            let v15 = C::xmm_to_reg(ctx, v14);
4199
0
            // Rule at src/isa/x64/inst.isle line 2266.
4200
0
            return v15;
4201
        }
4202
        F32X4 => {
4203
0
            let v16 = constructor_x64_movups_load(ctx, arg1);
4204
0
            let v17 = C::xmm_to_reg(ctx, v16);
4205
0
            // Rule at src/isa/x64/inst.isle line 2269.
4206
0
            return v17;
4207
        }
4208
        F64X2 => {
4209
0
            let v18 = constructor_x64_movupd_load(ctx, arg1);
4210
0
            let v19 = C::xmm_to_reg(ctx, v18);
4211
0
            // Rule at src/isa/x64/inst.isle line 2272.
4212
0
            return v19;
4213
        }
4214
0
        _ => {}
4215
0
    }
4216
0
    let v1 = C::fits_in_32(ctx, arg0);
4217
0
    if let Some(v2) = v1 {
4218
0
        if let &ExtKind::SignExtend = arg2 {
4219
0
            let v5 = C::ty_bytes(ctx, v2);
4220
0
            let v7 = &C::ext_mode(ctx, v5, 0x8);
4221
0
            let v8 = &constructor_synthetic_amode_to_gpr_mem(ctx, arg1);
4222
0
            let v9 = constructor_x64_movsx(ctx, v7, v8);
4223
0
            let v10 = C::gpr_to_reg(ctx, v9);
4224
0
            // Rule at src/isa/x64/inst.isle line 2256.
4225
0
            return v10;
4226
0
        }
4227
0
    }
4228
0
    let v20 = C::multi_lane(ctx, arg0);
4229
0
    if let Some(v21) = v20 {
4230
0
        let v24 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg1);
4231
0
        let v25 = constructor_x64_movdqu_load(ctx, v24);
4232
0
        let v26 = C::xmm_to_reg(ctx, v25);
4233
0
        // Rule at src/isa/x64/inst.isle line 2275.
4234
0
        return v26;
4235
0
    }
4236
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_load", "src/isa/x64/inst.isle line 2254")
4237
2.18k
}
4238
4239
// Generated as internal constructor for term x64_mov.
4240
521k
pub fn constructor_x64_mov<C: Context>(
4241
521k
    ctx: &mut C,
4242
521k
    arg0: &Amode,
4243
521k
) -> Reg {
4244
521k
    let v1 = &C::amode_to_synthetic_amode(ctx, arg0);
4245
521k
    let v2 = constructor_mov64_mr(ctx, v1);
4246
521k
    // Rule at src/isa/x64/inst.isle line 2279.
4247
521k
    return v2;
4248
521k
}
4249
4250
// Generated as internal constructor for term x64_movzx.
4251
830k
pub fn constructor_x64_movzx<C: Context>(
4252
830k
    ctx: &mut C,
4253
830k
    arg0: &ExtMode,
4254
830k
    arg1: &GprMem,
4255
830k
) -> Gpr {
4256
830k
    let v2 = C::temp_writable_gpr(ctx);
4257
830k
    let v3 = MInst::MovzxRmR {
4258
830k
        ext_mode: arg0.clone(),
4259
830k
        src: arg1.clone(),
4260
830k
        dst: v2,
4261
830k
    };
4262
830k
    let v4 = C::emit(ctx, &v3);
4263
830k
    let v5 = C::writable_gpr_to_gpr(ctx, v2);
4264
830k
    // Rule at src/isa/x64/inst.isle line 2283.
4265
830k
    return v5;
4266
830k
}
4267
4268
// Generated as internal constructor for term x64_movsx.
4269
1.21k
pub fn constructor_x64_movsx<C: Context>(
4270
1.21k
    ctx: &mut C,
4271
1.21k
    arg0: &ExtMode,
4272
1.21k
    arg1: &GprMem,
4273
1.21k
) -> Gpr {
4274
1.21k
    let v2 = C::temp_writable_gpr(ctx);
4275
1.21k
    let v3 = MInst::MovsxRmR {
4276
1.21k
        ext_mode: arg0.clone(),
4277
1.21k
        src: arg1.clone(),
4278
1.21k
        dst: v2,
4279
1.21k
    };
4280
1.21k
    let v4 = C::emit(ctx, &v3);
4281
1.21k
    let v5 = C::writable_gpr_to_gpr(ctx, v2);
4282
1.21k
    // Rule at src/isa/x64/inst.isle line 2289.
4283
1.21k
    return v5;
4284
1.21k
}
4285
4286
// Generated as internal constructor for term x64_movss_load.
4287
0
pub fn constructor_x64_movss_load<C: Context>(
4288
0
    ctx: &mut C,
4289
0
    arg0: &SyntheticAmode,
4290
0
) -> Xmm {
4291
0
    let v4 = C::use_avx(ctx);
4292
0
    if v4 == true {
4293
0
        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4294
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovss, v2);
4295
0
        // Rule at src/isa/x64/inst.isle line 2297.
4296
0
        return v6;
4297
0
    }
4298
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4299
0
    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movss, v2);
4300
0
    // Rule at src/isa/x64/inst.isle line 2295.
4301
0
    return v3;
4302
0
}
4303
4304
// Generated as internal constructor for term x64_movss_store.
4305
0
pub fn constructor_x64_movss_store<C: Context>(
4306
0
    ctx: &mut C,
4307
0
    arg0: &SyntheticAmode,
4308
0
    arg1: Xmm,
4309
0
) -> SideEffectNoResult {
4310
0
    let v4 = C::use_avx(ctx);
4311
0
    if v4 == true {
4312
0
        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovss, arg0, arg1);
4313
0
        // Rule at src/isa/x64/inst.isle line 2304.
4314
0
        return v6.clone();
4315
0
    }
4316
0
    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movss, arg0, arg1);
4317
0
    // Rule at src/isa/x64/inst.isle line 2302.
4318
0
    return v3.clone();
4319
0
}
4320
4321
// Generated as internal constructor for term x64_movsd_load.
4322
0
pub fn constructor_x64_movsd_load<C: Context>(
4323
0
    ctx: &mut C,
4324
0
    arg0: &SyntheticAmode,
4325
0
) -> Xmm {
4326
0
    let v4 = C::use_avx(ctx);
4327
0
    if v4 == true {
4328
0
        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4329
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovsd, v2);
4330
0
        // Rule at src/isa/x64/inst.isle line 2311.
4331
0
        return v6;
4332
0
    }
4333
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4334
0
    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movsd, v2);
4335
0
    // Rule at src/isa/x64/inst.isle line 2309.
4336
0
    return v3;
4337
0
}
4338
4339
// Generated as internal constructor for term x64_movsd_store.
4340
1
pub fn constructor_x64_movsd_store<C: Context>(
4341
1
    ctx: &mut C,
4342
1
    arg0: &SyntheticAmode,
4343
1
    arg1: Xmm,
4344
1
) -> SideEffectNoResult {
4345
1
    let v4 = C::use_avx(ctx);
4346
1
    if v4 == true {
4347
1
        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovsd, arg0, arg1);
4348
1
        // Rule at src/isa/x64/inst.isle line 2318.
4349
1
        return v6.clone();
4350
0
    }
4351
0
    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movsd, arg0, arg1);
4352
0
    // Rule at src/isa/x64/inst.isle line 2316.
4353
0
    return v3.clone();
4354
1
}
4355
4356
// Generated as internal constructor for term x64_movups_load.
4357
0
pub fn constructor_x64_movups_load<C: Context>(
4358
0
    ctx: &mut C,
4359
0
    arg0: &SyntheticAmode,
4360
0
) -> Xmm {
4361
0
    let v4 = C::use_avx(ctx);
4362
0
    if v4 == true {
4363
0
        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4364
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovups, v2);
4365
0
        // Rule at src/isa/x64/inst.isle line 2325.
4366
0
        return v6;
4367
0
    }
4368
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4369
0
    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movups, v2);
4370
0
    // Rule at src/isa/x64/inst.isle line 2323.
4371
0
    return v3;
4372
0
}
4373
4374
// Generated as internal constructor for term x64_movups_store.
4375
0
pub fn constructor_x64_movups_store<C: Context>(
4376
0
    ctx: &mut C,
4377
0
    arg0: &SyntheticAmode,
4378
0
    arg1: Xmm,
4379
0
) -> SideEffectNoResult {
4380
0
    let v4 = C::use_avx(ctx);
4381
0
    if v4 == true {
4382
0
        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovups, arg0, arg1);
4383
0
        // Rule at src/isa/x64/inst.isle line 2332.
4384
0
        return v6.clone();
4385
0
    }
4386
0
    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movups, arg0, arg1);
4387
0
    // Rule at src/isa/x64/inst.isle line 2330.
4388
0
    return v3.clone();
4389
0
}
4390
4391
// Generated as internal constructor for term x64_movupd_load.
4392
0
pub fn constructor_x64_movupd_load<C: Context>(
4393
0
    ctx: &mut C,
4394
0
    arg0: &SyntheticAmode,
4395
0
) -> Xmm {
4396
0
    let v4 = C::use_avx(ctx);
4397
0
    if v4 == true {
4398
0
        let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4399
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovupd, v2);
4400
0
        // Rule at src/isa/x64/inst.isle line 2339.
4401
0
        return v6;
4402
0
    }
4403
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
4404
0
    let v3 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movupd, v2);
4405
0
    // Rule at src/isa/x64/inst.isle line 2337.
4406
0
    return v3;
4407
0
}
4408
4409
// Generated as internal constructor for term x64_movupd_store.
4410
0
pub fn constructor_x64_movupd_store<C: Context>(
4411
0
    ctx: &mut C,
4412
0
    arg0: &SyntheticAmode,
4413
0
    arg1: Xmm,
4414
0
) -> SideEffectNoResult {
4415
0
    let v4 = C::use_avx(ctx);
4416
0
    if v4 == true {
4417
0
        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovupd, arg0, arg1);
4418
0
        // Rule at src/isa/x64/inst.isle line 2346.
4419
0
        return v6.clone();
4420
0
    }
4421
0
    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movupd, arg0, arg1);
4422
0
    // Rule at src/isa/x64/inst.isle line 2344.
4423
0
    return v3.clone();
4424
0
}
4425
4426
// Generated as internal constructor for term x64_movd_to_gpr.
4427
0
pub fn constructor_x64_movd_to_gpr<C: Context>(
4428
0
    ctx: &mut C,
4429
0
    arg0: Xmm,
4430
0
) -> Gpr {
4431
0
    let v4 = C::use_avx(ctx);
4432
0
    if v4 == true {
4433
0
        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovd, arg0, &OperandSize::Size32);
4434
0
        // Rule at src/isa/x64/inst.isle line 2354.
4435
0
        return v6;
4436
0
    }
4437
0
    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movd, arg0, &OperandSize::Size32);
4438
0
    // Rule at src/isa/x64/inst.isle line 2352.
4439
0
    return v3;
4440
0
}
4441
4442
// Generated as internal constructor for term x64_movd_to_xmm.
4443
0
pub fn constructor_x64_movd_to_xmm<C: Context>(
4444
0
    ctx: &mut C,
4445
0
    arg0: &GprMem,
4446
0
) -> Xmm {
4447
0
    let v4 = C::use_avx(ctx);
4448
0
    if v4 == true {
4449
0
        let v6 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vmovd, arg0, &OperandSize::Size32);
4450
0
        // Rule at src/isa/x64/inst.isle line 2362.
4451
0
        return v6;
4452
0
    }
4453
0
    let v3 = constructor_gpr_to_xmm(ctx, &SseOpcode::Movd, arg0, &OperandSize::Size32);
4454
0
    // Rule at src/isa/x64/inst.isle line 2360.
4455
0
    return v3;
4456
0
}
4457
4458
// Generated as internal constructor for term x64_movq_to_xmm.
4459
0
pub fn constructor_x64_movq_to_xmm<C: Context>(
4460
0
    ctx: &mut C,
4461
0
    arg0: &GprMem,
4462
0
) -> Xmm {
4463
0
    let v4 = C::use_avx(ctx);
4464
0
    if v4 == true {
4465
0
        let v6 = constructor_gpr_to_xmm_vex(ctx, &AvxOpcode::Vmovq, arg0, &OperandSize::Size64);
4466
0
        // Rule at src/isa/x64/inst.isle line 2370.
4467
0
        return v6;
4468
0
    }
4469
0
    let v3 = constructor_gpr_to_xmm(ctx, &SseOpcode::Movq, arg0, &OperandSize::Size64);
4470
0
    // Rule at src/isa/x64/inst.isle line 2368.
4471
0
    return v3;
4472
0
}
4473
4474
// Generated as internal constructor for term x64_movq_to_gpr.
4475
0
pub fn constructor_x64_movq_to_gpr<C: Context>(
4476
0
    ctx: &mut C,
4477
0
    arg0: Xmm,
4478
0
) -> Gpr {
4479
0
    let v4 = C::use_avx(ctx);
4480
0
    if v4 == true {
4481
0
        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovq, arg0, &OperandSize::Size64);
4482
0
        // Rule at src/isa/x64/inst.isle line 2378.
4483
0
        return v6;
4484
0
    }
4485
0
    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movq, arg0, &OperandSize::Size64);
4486
0
    // Rule at src/isa/x64/inst.isle line 2376.
4487
0
    return v3;
4488
0
}
4489
4490
// Generated as internal constructor for term x64_movdqu_load.
4491
0
pub fn constructor_x64_movdqu_load<C: Context>(
4492
0
    ctx: &mut C,
4493
0
    arg0: &XmmMem,
4494
0
) -> Xmm {
4495
0
    let v3 = C::use_avx(ctx);
4496
0
    if v3 == true {
4497
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovdqu, arg0);
4498
0
        // Rule at src/isa/x64/inst.isle line 2385.
4499
0
        return v5;
4500
0
    }
4501
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movdqu, arg0);
4502
0
    // Rule at src/isa/x64/inst.isle line 2383.
4503
0
    return v2;
4504
0
}
4505
4506
// Generated as internal constructor for term x64_movdqu_store.
4507
0
pub fn constructor_x64_movdqu_store<C: Context>(
4508
0
    ctx: &mut C,
4509
0
    arg0: &SyntheticAmode,
4510
0
    arg1: Xmm,
4511
0
) -> SideEffectNoResult {
4512
0
    let v4 = C::use_avx(ctx);
4513
0
    if v4 == true {
4514
0
        let v6 = &constructor_xmm_movrm_vex(ctx, &AvxOpcode::Vmovdqu, arg0, arg1);
4515
0
        // Rule at src/isa/x64/inst.isle line 2392.
4516
0
        return v6.clone();
4517
0
    }
4518
0
    let v3 = &constructor_xmm_movrm(ctx, &SseOpcode::Movdqu, arg0, arg1);
4519
0
    // Rule at src/isa/x64/inst.isle line 2390.
4520
0
    return v3.clone();
4521
0
}
4522
4523
// Generated as internal constructor for term x64_pmovsxbw.
4524
0
pub fn constructor_x64_pmovsxbw<C: Context>(
4525
0
    ctx: &mut C,
4526
0
    arg0: &XmmMem,
4527
0
) -> Xmm {
4528
0
    let v3 = C::use_avx(ctx);
4529
0
    if v3 == true {
4530
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovsxbw, arg0);
4531
0
        // Rule at src/isa/x64/inst.isle line 2399.
4532
0
        return v5;
4533
0
    }
4534
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovsxbw, arg0);
4535
0
    // Rule at src/isa/x64/inst.isle line 2397.
4536
0
    return v2;
4537
0
}
4538
4539
// Generated as internal constructor for term x64_pmovzxbw.
4540
0
pub fn constructor_x64_pmovzxbw<C: Context>(
4541
0
    ctx: &mut C,
4542
0
    arg0: &XmmMem,
4543
0
) -> Xmm {
4544
0
    let v3 = C::use_avx(ctx);
4545
0
    if v3 == true {
4546
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovzxbw, arg0);
4547
0
        // Rule at src/isa/x64/inst.isle line 2406.
4548
0
        return v5;
4549
0
    }
4550
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovzxbw, arg0);
4551
0
    // Rule at src/isa/x64/inst.isle line 2404.
4552
0
    return v2;
4553
0
}
4554
4555
// Generated as internal constructor for term x64_pmovsxwd.
4556
0
pub fn constructor_x64_pmovsxwd<C: Context>(
4557
0
    ctx: &mut C,
4558
0
    arg0: &XmmMem,
4559
0
) -> Xmm {
4560
0
    let v3 = C::use_avx(ctx);
4561
0
    if v3 == true {
4562
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovsxwd, arg0);
4563
0
        // Rule at src/isa/x64/inst.isle line 2413.
4564
0
        return v5;
4565
0
    }
4566
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovsxwd, arg0);
4567
0
    // Rule at src/isa/x64/inst.isle line 2411.
4568
0
    return v2;
4569
0
}
4570
4571
// Generated as internal constructor for term x64_pmovzxwd.
4572
0
pub fn constructor_x64_pmovzxwd<C: Context>(
4573
0
    ctx: &mut C,
4574
0
    arg0: &XmmMem,
4575
0
) -> Xmm {
4576
0
    let v3 = C::use_avx(ctx);
4577
0
    if v3 == true {
4578
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovzxwd, arg0);
4579
0
        // Rule at src/isa/x64/inst.isle line 2420.
4580
0
        return v5;
4581
0
    }
4582
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovzxwd, arg0);
4583
0
    // Rule at src/isa/x64/inst.isle line 2418.
4584
0
    return v2;
4585
0
}
4586
4587
// Generated as internal constructor for term x64_pmovsxdq.
4588
0
pub fn constructor_x64_pmovsxdq<C: Context>(
4589
0
    ctx: &mut C,
4590
0
    arg0: &XmmMem,
4591
0
) -> Xmm {
4592
0
    let v3 = C::use_avx(ctx);
4593
0
    if v3 == true {
4594
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovsxdq, arg0);
4595
0
        // Rule at src/isa/x64/inst.isle line 2427.
4596
0
        return v5;
4597
0
    }
4598
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovsxdq, arg0);
4599
0
    // Rule at src/isa/x64/inst.isle line 2425.
4600
0
    return v2;
4601
0
}
4602
4603
// Generated as internal constructor for term x64_pmovzxdq.
4604
0
pub fn constructor_x64_pmovzxdq<C: Context>(
4605
0
    ctx: &mut C,
4606
0
    arg0: &XmmMem,
4607
0
) -> Xmm {
4608
0
    let v3 = C::use_avx(ctx);
4609
0
    if v3 == true {
4610
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpmovzxdq, arg0);
4611
0
        // Rule at src/isa/x64/inst.isle line 2434.
4612
0
        return v5;
4613
0
    }
4614
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Pmovzxdq, arg0);
4615
0
    // Rule at src/isa/x64/inst.isle line 2432.
4616
0
    return v2;
4617
0
}
4618
4619
// Generated as internal constructor for term x64_movrm.
4620
715k
pub fn constructor_x64_movrm<C: Context>(
4621
715k
    ctx: &mut C,
4622
715k
    arg0: Type,
4623
715k
    arg1: &SyntheticAmode,
4624
715k
    arg2: Gpr,
4625
715k
) -> SideEffectNoResult {
4626
715k
    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
4627
715k
    let v4 = MInst::MovRM {
4628
715k
        size: v3.clone(),
4629
715k
        src: arg2,
4630
715k
        dst: arg1.clone(),
4631
715k
    };
4632
715k
    let v5 = SideEffectNoResult::Inst {
4633
715k
        inst: v4,
4634
715k
    };
4635
715k
    // Rule at src/isa/x64/inst.isle line 2439.
4636
715k
    return v5;
4637
715k
}
4638
4639
// Generated as internal constructor for term x64_movimm_m.
4640
253k
pub fn constructor_x64_movimm_m<C: Context>(
4641
253k
    ctx: &mut C,
4642
253k
    arg0: Type,
4643
253k
    arg1: &SyntheticAmode,
4644
253k
    arg2: i32,
4645
253k
) -> SideEffectNoResult {
4646
253k
    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
4647
253k
    let v4 = MInst::MovImmM {
4648
253k
        size: v3.clone(),
4649
253k
        simm32: arg2,
4650
253k
        dst: arg1.clone(),
4651
253k
    };
4652
253k
    let v5 = SideEffectNoResult::Inst {
4653
253k
        inst: v4,
4654
253k
    };
4655
253k
    // Rule at src/isa/x64/inst.isle line 2444.
4656
253k
    return v5;
4657
253k
}
4658
4659
// Generated as internal constructor for term xmm_movrm.
4660
0
pub fn constructor_xmm_movrm<C: Context>(
4661
0
    ctx: &mut C,
4662
0
    arg0: &SseOpcode,
4663
0
    arg1: &SyntheticAmode,
4664
0
    arg2: Xmm,
4665
0
) -> SideEffectNoResult {
4666
0
    let v3 = MInst::XmmMovRM {
4667
0
        op: arg0.clone(),
4668
0
        src: arg2,
4669
0
        dst: arg1.clone(),
4670
0
    };
4671
0
    let v4 = SideEffectNoResult::Inst {
4672
0
        inst: v3,
4673
0
    };
4674
0
    // Rule at src/isa/x64/inst.isle line 2449.
4675
0
    return v4;
4676
0
}
4677
4678
// Generated as internal constructor for term xmm_movrm_imm.
4679
0
pub fn constructor_xmm_movrm_imm<C: Context>(
4680
0
    ctx: &mut C,
4681
0
    arg0: &SseOpcode,
4682
0
    arg1: &SyntheticAmode,
4683
0
    arg2: Xmm,
4684
0
    arg3: u8,
4685
0
) -> SideEffectNoResult {
4686
0
    let v4 = MInst::XmmMovRMImm {
4687
0
        op: arg0.clone(),
4688
0
        src: arg2,
4689
0
        dst: arg1.clone(),
4690
0
        imm: arg3,
4691
0
    };
4692
0
    let v5 = SideEffectNoResult::Inst {
4693
0
        inst: v4,
4694
0
    };
4695
0
    // Rule at src/isa/x64/inst.isle line 2453.
4696
0
    return v5;
4697
0
}
4698
4699
// Generated as internal constructor for term xmm_movrm_vex.
4700
1
pub fn constructor_xmm_movrm_vex<C: Context>(
4701
1
    ctx: &mut C,
4702
1
    arg0: &AvxOpcode,
4703
1
    arg1: &SyntheticAmode,
4704
1
    arg2: Xmm,
4705
1
) -> SideEffectNoResult {
4706
1
    let v3 = MInst::XmmMovRMVex {
4707
1
        op: arg0.clone(),
4708
1
        src: arg2,
4709
1
        dst: arg1.clone(),
4710
1
    };
4711
1
    let v4 = SideEffectNoResult::Inst {
4712
1
        inst: v3,
4713
1
    };
4714
1
    // Rule at src/isa/x64/inst.isle line 2457.
4715
1
    return v4;
4716
1
}
4717
4718
// Generated as internal constructor for term xmm_movrm_imm_vex.
4719
0
pub fn constructor_xmm_movrm_imm_vex<C: Context>(
4720
0
    ctx: &mut C,
4721
0
    arg0: &AvxOpcode,
4722
0
    arg1: &SyntheticAmode,
4723
0
    arg2: Xmm,
4724
0
    arg3: u8,
4725
0
) -> SideEffectNoResult {
4726
0
    let v4 = MInst::XmmMovRMImmVex {
4727
0
        op: arg0.clone(),
4728
0
        src: arg2,
4729
0
        dst: arg1.clone(),
4730
0
        imm: arg3,
4731
0
    };
4732
0
    let v5 = SideEffectNoResult::Inst {
4733
0
        inst: v4,
4734
0
    };
4735
0
    // Rule at src/isa/x64/inst.isle line 2461.
4736
0
    return v5;
4737
0
}
4738
4739
// Generated as internal constructor for term x64_xmm_load_const.
4740
0
pub fn constructor_x64_xmm_load_const<C: Context>(
4741
0
    ctx: &mut C,
4742
0
    arg0: Type,
4743
0
    arg1: VCodeConstant,
4744
0
) -> Xmm {
4745
0
    let v2 = &C::const_to_synthetic_amode(ctx, arg1);
4746
0
    let v4 = constructor_x64_load(ctx, arg0, v2, &ExtKind::None);
4747
0
    let v5 = C::xmm_new(ctx, v4);
4748
0
    // Rule at src/isa/x64/inst.isle line 2466.
4749
0
    return v5;
4750
0
}
4751
4752
// Generated as internal constructor for term x64_add.
4753
15.2k
pub fn constructor_x64_add<C: Context>(
4754
15.2k
    ctx: &mut C,
4755
15.2k
    arg0: Type,
4756
15.2k
    arg1: Gpr,
4757
15.2k
    arg2: &GprMemImm,
4758
15.2k
) -> Gpr {
4759
15.2k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Add, arg1, arg2);
4760
15.2k
    // Rule at src/isa/x64/inst.isle line 2477.
4761
15.2k
    return v4;
4762
15.2k
}
4763
4764
// Generated as internal constructor for term x64_add_with_flags_paired.
4765
0
pub fn constructor_x64_add_with_flags_paired<C: Context>(
4766
0
    ctx: &mut C,
4767
0
    arg0: Type,
4768
0
    arg1: Gpr,
4769
0
    arg2: &GprMemImm,
4770
0
) -> ProducesFlags {
4771
0
    let v3 = C::temp_writable_gpr(ctx);
4772
0
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
4773
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
4774
0
    let v6 = MInst::AluRmiR {
4775
0
        size: v4.clone(),
4776
0
        op: AluRmiROpcode::Add,
4777
0
        src1: arg1,
4778
0
        src2: arg2.clone(),
4779
0
        dst: v3,
4780
0
    };
4781
0
    let v8 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
4782
0
        inst: v6,
4783
0
        result: v7,
4784
0
    };
4785
0
    // Rule at src/isa/x64/inst.isle line 2485.
4786
0
    return v8;
4787
0
}
4788
4789
// Generated as internal constructor for term x64_alurmi_with_flags_paired.
4790
0
pub fn constructor_x64_alurmi_with_flags_paired<C: Context>(
4791
0
    ctx: &mut C,
4792
0
    arg0: &AluRmiROpcode,
4793
0
    arg1: Type,
4794
0
    arg2: Gpr,
4795
0
    arg3: &GprMemImm,
4796
0
) -> ProducesFlags {
4797
0
    let v2 = C::fits_in_64(ctx, arg1);
4798
0
    if let Some(v3) = v2 {
4799
0
        let v6 = C::temp_writable_gpr(ctx);
4800
0
        let v7 = &C::raw_operand_size_of_type(ctx, v3);
4801
0
        let v9 = constructor_writable_gpr_to_r_reg(ctx, v6);
4802
0
        let v8 = MInst::AluRmiR {
4803
0
            size: v7.clone(),
4804
0
            op: arg0.clone(),
4805
0
            src1: arg2,
4806
0
            src2: arg3.clone(),
4807
0
            dst: v6,
4808
0
        };
4809
0
        let v10 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
4810
0
            inst: v8,
4811
0
            result: v9,
4812
0
        };
4813
0
        // Rule at src/isa/x64/inst.isle line 2496.
4814
0
        return v10;
4815
0
    }
4816
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_alurmi_with_flags_paired", "src/isa/x64/inst.isle line 2495")
4817
0
}
4818
4819
// Generated as internal constructor for term x64_alurmi_with_flags_chained.
4820
0
pub fn constructor_x64_alurmi_with_flags_chained<C: Context>(
4821
0
    ctx: &mut C,
4822
0
    arg0: &AluRmiROpcode,
4823
0
    arg1: Type,
4824
0
    arg2: Gpr,
4825
0
    arg3: &GprMemImm,
4826
0
) -> ConsumesAndProducesFlags {
4827
0
    let v2 = C::fits_in_64(ctx, arg1);
4828
0
    if let Some(v3) = v2 {
4829
0
        let v6 = C::temp_writable_gpr(ctx);
4830
0
        let v7 = &C::raw_operand_size_of_type(ctx, v3);
4831
0
        let v9 = constructor_writable_gpr_to_r_reg(ctx, v6);
4832
0
        let v8 = MInst::AluRmiR {
4833
0
            size: v7.clone(),
4834
0
            op: arg0.clone(),
4835
0
            src1: arg2,
4836
0
            src2: arg3.clone(),
4837
0
            dst: v6,
4838
0
        };
4839
0
        let v10 = ConsumesAndProducesFlags::ReturnsReg {
4840
0
            inst: v8,
4841
0
            result: v9,
4842
0
        };
4843
0
        // Rule at src/isa/x64/inst.isle line 2508.
4844
0
        return v10;
4845
0
    }
4846
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_alurmi_with_flags_chained", "src/isa/x64/inst.isle line 2507")
4847
0
}
4848
4849
// Generated as internal constructor for term x64_adc_paired.
4850
0
pub fn constructor_x64_adc_paired<C: Context>(
4851
0
    ctx: &mut C,
4852
0
    arg0: Type,
4853
0
    arg1: Gpr,
4854
0
    arg2: &GprMemImm,
4855
0
) -> ConsumesFlags {
4856
0
    let v3 = C::temp_writable_gpr(ctx);
4857
0
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
4858
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
4859
0
    let v6 = MInst::AluRmiR {
4860
0
        size: v4.clone(),
4861
0
        op: AluRmiROpcode::Adc,
4862
0
        src1: arg1,
4863
0
        src2: arg2.clone(),
4864
0
        dst: v3,
4865
0
    };
4866
0
    let v8 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
4867
0
        inst: v6,
4868
0
        result: v7,
4869
0
    };
4870
0
    // Rule at src/isa/x64/inst.isle line 2520.
4871
0
    return v8;
4872
0
}
4873
4874
// Generated as internal constructor for term x64_sub.
4875
63.3k
pub fn constructor_x64_sub<C: Context>(
4876
63.3k
    ctx: &mut C,
4877
63.3k
    arg0: Type,
4878
63.3k
    arg1: Gpr,
4879
63.3k
    arg2: &GprMemImm,
4880
63.3k
) -> Gpr {
4881
63.3k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Sub, arg1, arg2);
4882
63.3k
    // Rule at src/isa/x64/inst.isle line 2532.
4883
63.3k
    return v4;
4884
63.3k
}
4885
4886
// Generated as internal constructor for term x64_sub_with_flags_paired.
4887
0
pub fn constructor_x64_sub_with_flags_paired<C: Context>(
4888
0
    ctx: &mut C,
4889
0
    arg0: Type,
4890
0
    arg1: Gpr,
4891
0
    arg2: &GprMemImm,
4892
0
) -> ProducesFlags {
4893
0
    let v3 = C::temp_writable_gpr(ctx);
4894
0
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
4895
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
4896
0
    let v6 = MInst::AluRmiR {
4897
0
        size: v4.clone(),
4898
0
        op: AluRmiROpcode::Sub,
4899
0
        src1: arg1,
4900
0
        src2: arg2.clone(),
4901
0
        dst: v3,
4902
0
    };
4903
0
    let v8 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
4904
0
        inst: v6,
4905
0
        result: v7,
4906
0
    };
4907
0
    // Rule at src/isa/x64/inst.isle line 2540.
4908
0
    return v8;
4909
0
}
4910
4911
// Generated as internal constructor for term x64_sbb_paired.
4912
0
pub fn constructor_x64_sbb_paired<C: Context>(
4913
0
    ctx: &mut C,
4914
0
    arg0: Type,
4915
0
    arg1: Gpr,
4916
0
    arg2: &GprMemImm,
4917
0
) -> ConsumesFlags {
4918
0
    let v3 = C::temp_writable_gpr(ctx);
4919
0
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
4920
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v3);
4921
0
    let v6 = MInst::AluRmiR {
4922
0
        size: v4.clone(),
4923
0
        op: AluRmiROpcode::Sbb,
4924
0
        src1: arg1,
4925
0
        src2: arg2.clone(),
4926
0
        dst: v3,
4927
0
    };
4928
0
    let v8 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
4929
0
        inst: v6,
4930
0
        result: v7,
4931
0
    };
4932
0
    // Rule at src/isa/x64/inst.isle line 2552.
4933
0
    return v8;
4934
0
}
4935
4936
// Generated as internal constructor for term x64_mul.
4937
58.9k
pub fn constructor_x64_mul<C: Context>(
4938
58.9k
    ctx: &mut C,
4939
58.9k
    arg0: Type,
4940
58.9k
    arg1: Gpr,
4941
58.9k
    arg2: &GprMemImm,
4942
58.9k
) -> Gpr {
4943
58.9k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Mul, arg1, arg2);
4944
58.9k
    // Rule at src/isa/x64/inst.isle line 2564.
4945
58.9k
    return v4;
4946
58.9k
}
4947
4948
// Generated as internal constructor for term x64_umullo.
4949
0
pub fn constructor_x64_umullo<C: Context>(
4950
0
    ctx: &mut C,
4951
0
    arg0: Type,
4952
0
    arg1: Gpr,
4953
0
    arg2: &GprMem,
4954
0
) -> Gpr {
4955
0
    let v3 = C::temp_writable_gpr(ctx);
4956
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
4957
0
    let v5 = MInst::UMulLo {
4958
0
        size: v4.clone(),
4959
0
        src1: arg1,
4960
0
        src2: arg2.clone(),
4961
0
        dst: v3,
4962
0
    };
4963
0
    let v6 = C::emit(ctx, &v5);
4964
0
    let v7 = C::writable_gpr_to_gpr(ctx, v3);
4965
0
    // Rule at src/isa/x64/inst.isle line 2572.
4966
0
    return v7;
4967
0
}
4968
4969
// Generated as internal constructor for term x64_umullo_with_flags_paired.
4970
0
pub fn constructor_x64_umullo_with_flags_paired<C: Context>(
4971
0
    ctx: &mut C,
4972
0
    arg0: Type,
4973
0
    arg1: Gpr,
4974
0
    arg2: &GprMem,
4975
0
) -> ProducesFlags {
4976
0
    let v3 = C::temp_writable_gpr(ctx);
4977
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
4978
0
    let v6 = constructor_writable_gpr_to_r_reg(ctx, v3);
4979
0
    let v5 = MInst::UMulLo {
4980
0
        size: v4.clone(),
4981
0
        src1: arg1,
4982
0
        src2: arg2.clone(),
4983
0
        dst: v3,
4984
0
    };
4985
0
    let v7 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
4986
0
        inst: v5,
4987
0
        result: v6,
4988
0
    };
4989
0
    // Rule at src/isa/x64/inst.isle line 2579.
4990
0
    return v7;
4991
0
}
4992
4993
// Generated as internal constructor for term x64_and.
4994
64.6k
pub fn constructor_x64_and<C: Context>(
4995
64.6k
    ctx: &mut C,
4996
64.6k
    arg0: Type,
4997
64.6k
    arg1: Gpr,
4998
64.6k
    arg2: &GprMemImm,
4999
64.6k
) -> Gpr {
5000
64.6k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::And, arg1, arg2);
5001
64.6k
    // Rule at src/isa/x64/inst.isle line 2590.
5002
64.6k
    return v4;
5003
64.6k
}
5004
5005
// Generated as internal constructor for term x64_and_with_flags_paired.
5006
0
pub fn constructor_x64_and_with_flags_paired<C: Context>(
5007
0
    ctx: &mut C,
5008
0
    arg0: Type,
5009
0
    arg1: Gpr,
5010
0
    arg2: &GprMemImm,
5011
0
) -> ProducesFlags {
5012
0
    let v3 = C::temp_writable_gpr(ctx);
5013
0
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
5014
0
    let v6 = MInst::AluRmiR {
5015
0
        size: v4.clone(),
5016
0
        op: AluRmiROpcode::And,
5017
0
        src1: arg1,
5018
0
        src2: arg2.clone(),
5019
0
        dst: v3,
5020
0
    };
5021
0
    let v7 = ProducesFlags::ProducesFlagsSideEffect {
5022
0
        inst: v6,
5023
0
    };
5024
0
    // Rule at src/isa/x64/inst.isle line 2597.
5025
0
    return v7;
5026
0
}
5027
5028
// Generated as internal constructor for term x64_or.
5029
20.8k
pub fn constructor_x64_or<C: Context>(
5030
20.8k
    ctx: &mut C,
5031
20.8k
    arg0: Type,
5032
20.8k
    arg1: Gpr,
5033
20.8k
    arg2: &GprMemImm,
5034
20.8k
) -> Gpr {
5035
20.8k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Or, arg1, arg2);
5036
20.8k
    // Rule at src/isa/x64/inst.isle line 2608.
5037
20.8k
    return v4;
5038
20.8k
}
5039
5040
// Generated as internal constructor for term x64_xor.
5041
3.67k
pub fn constructor_x64_xor<C: Context>(
5042
3.67k
    ctx: &mut C,
5043
3.67k
    arg0: Type,
5044
3.67k
    arg1: Gpr,
5045
3.67k
    arg2: &GprMemImm,
5046
3.67k
) -> Gpr {
5047
3.67k
    let v4 = constructor_alu_rmi_r(ctx, arg0, &AluRmiROpcode::Xor, arg1, arg2);
5048
3.67k
    // Rule at src/isa/x64/inst.isle line 2616.
5049
3.67k
    return v4;
5050
3.67k
}
5051
5052
// Generated as internal constructor for term x64_andn.
5053
272
pub fn constructor_x64_andn<C: Context>(
5054
272
    ctx: &mut C,
5055
272
    arg0: Type,
5056
272
    arg1: Gpr,
5057
272
    arg2: &GprMem,
5058
272
) -> Gpr {
5059
272
    let v4 = constructor_alu_rm_r_vex(ctx, arg0, &AluRmROpcode::Andn, arg1, arg2);
5060
272
    // Rule at src/isa/x64/inst.isle line 2623.
5061
272
    return v4;
5062
272
}
5063
5064
// Generated as internal constructor for term imm_i64.
5065
0
pub fn constructor_imm_i64<C: Context>(
5066
0
    ctx: &mut C,
5067
0
    arg0: Type,
5068
0
    arg1: i64,
5069
0
) -> Reg {
5070
0
    let v2 = C::i64_as_u64(ctx, arg1);
5071
0
    let v3 = constructor_imm(ctx, arg0, v2);
5072
0
    // Rule at src/isa/x64/inst.isle line 2630.
5073
0
    return v3;
5074
0
}
5075
5076
// Generated as internal constructor for term imm.
5077
694k
pub fn constructor_imm<C: Context>(
5078
694k
    ctx: &mut C,
5079
694k
    arg0: Type,
5080
694k
    arg1: u64,
5081
694k
) -> Reg {
5082
694k
    match arg0 {
5083
        I64 => {
5084
73.7k
            let v20 = C::nonzero_u64_fits_in_u32(ctx, arg1);
5085
73.7k
            if let Some(
v216.14k
) = v20 {
5086
6.14k
                let v5 = C::temp_writable_gpr(ctx);
5087
6.14k
                let v23 = MInst::Imm {
5088
6.14k
                    dst_size: OperandSize::Size32,
5089
6.14k
                    simm64: v21,
5090
6.14k
                    dst: v5,
5091
6.14k
                };
5092
6.14k
                let v24 = C::emit(ctx, &v23);
5093
6.14k
                let v25 = constructor_writable_gpr_to_r_reg(ctx, v5);
5094
6.14k
                // Rule at src/isa/x64/inst.isle line 2661.
5095
6.14k
                return v25;
5096
67.6k
            }
5097
        }
5098
        F32 => {
5099
0
            let v4 = C::u64_is_zero(ctx, arg1);
5100
0
            match v4 {
5101
                true => {
5102
0
                    let v35 = constructor_xmm_zero(ctx, arg0);
5103
0
                    let v36 = C::xmm_to_reg(ctx, v35);
5104
0
                    // Rule at src/isa/x64/inst.isle line 2679.
5105
0
                    return v36;
5106
                }
5107
                false => {
5108
0
                    let v11 = constructor_imm(ctx, I32, arg1);
5109
0
                    let v12 = &C::reg_to_gpr_mem(ctx, v11);
5110
0
                    let v13 = constructor_x64_movd_to_xmm(ctx, v12);
5111
0
                    let v14 = C::xmm_to_reg(ctx, v13);
5112
0
                    // Rule at src/isa/x64/inst.isle line 2652.
5113
0
                    return v14;
5114
                }
5115
                _ => {}
5116
            }
5117
        }
5118
        F64 => {
5119
0
            let v4 = C::u64_is_zero(ctx, arg1);
5120
0
            match v4 {
5121
                true => {
5122
0
                    let v35 = constructor_xmm_zero(ctx, arg0);
5123
0
                    let v36 = C::xmm_to_reg(ctx, v35);
5124
0
                    // Rule at src/isa/x64/inst.isle line 2684.
5125
0
                    return v36;
5126
                }
5127
                false => {
5128
0
                    let v16 = constructor_imm(ctx, I64, arg1);
5129
0
                    let v17 = &C::reg_to_gpr_mem(ctx, v16);
5130
0
                    let v18 = constructor_x64_movq_to_xmm(ctx, v17);
5131
0
                    let v19 = C::xmm_to_reg(ctx, v18);
5132
0
                    // Rule at src/isa/x64/inst.isle line 2656.
5133
0
                    return v19;
5134
                }
5135
                _ => {}
5136
            }
5137
        }
5138
620k
        _ => {}
5139
    }
5140
688k
    let v1 = C::fits_in_64(ctx, arg0);
5141
688k
    if let Some(v2) = v1 {
5142
688k
        let v4 = C::u64_is_zero(ctx, arg1);
5143
688k
        match v4 {
5144
            true => {
5145
85.8k
                let v5 = C::temp_writable_gpr(ctx);
5146
85.8k
                let v6 = &C::operand_size_of_type_32_64(ctx, v2);
5147
85.8k
                let v27 = MInst::AluConstOp {
5148
85.8k
                    op: AluRmiROpcode::Xor,
5149
85.8k
                    size: v6.clone(),
5150
85.8k
                    dst: v5,
5151
85.8k
                };
5152
85.8k
                let v28 = C::emit(ctx, &v27);
5153
85.8k
                let v29 = C::writable_gpr_to_gpr(ctx, v5);
5154
85.8k
                let v30 = C::gpr_to_reg(ctx, v29);
5155
85.8k
                // Rule at src/isa/x64/inst.isle line 2667.
5156
85.8k
                return v30;
5157
            }
5158
            false => {
5159
602k
                let v5 = C::temp_writable_gpr(ctx);
5160
602k
                let v6 = &C::operand_size_of_type_32_64(ctx, v2);
5161
602k
                let v7 = MInst::Imm {
5162
602k
                    dst_size: v6.clone(),
5163
602k
                    simm64: arg1,
5164
602k
                    dst: v5,
5165
602k
                };
5166
602k
                let v8 = C::emit(ctx, &v7);
5167
602k
                let v9 = constructor_writable_gpr_to_r_reg(ctx, v5);
5168
602k
                // Rule at src/isa/x64/inst.isle line 2645.
5169
602k
                return v9;
5170
            }
5171
            _ => {}
5172
        }
5173
0
    }
5174
0
    if arg1 == 0x0 {
5175
0
        let v31 = C::multi_lane(ctx, arg0);
5176
0
        if let Some(v32) = v31 {
5177
0
            let v35 = constructor_xmm_zero(ctx, arg0);
5178
0
            let v36 = C::xmm_to_reg(ctx, v35);
5179
0
            // Rule at src/isa/x64/inst.isle line 2675.
5180
0
            return v36;
5181
0
        }
5182
0
    }
5183
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "imm", "src/isa/x64/inst.isle line 2642")
5184
694k
}
5185
5186
// Generated as internal constructor for term xmm_zero.
5187
0
pub fn constructor_xmm_zero<C: Context>(
5188
0
    ctx: &mut C,
5189
0
    arg0: Type,
5190
0
) -> Xmm {
5191
0
    let v1 = constructor_xmm_uninit_value(ctx);
5192
0
    let v2 = &C::xmm_to_xmm_mem(ctx, v1);
5193
0
    let v3 = constructor_x64_xor_vector(ctx, arg0, v1, v2);
5194
0
    // Rule at src/isa/x64/inst.isle line 2689.
5195
0
    return v3;
5196
0
}
5197
5198
// Generated as internal constructor for term shift_r.
5199
38.3k
pub fn constructor_shift_r<C: Context>(
5200
38.3k
    ctx: &mut C,
5201
38.3k
    arg0: Type,
5202
38.3k
    arg1: &ShiftKind,
5203
38.3k
    arg2: Gpr,
5204
38.3k
    arg3: &Imm8Gpr,
5205
38.3k
) -> Gpr {
5206
38.3k
    let v4 = C::temp_writable_gpr(ctx);
5207
38.3k
    let v5 = &C::raw_operand_size_of_type(ctx, arg0);
5208
38.3k
    let v6 = MInst::ShiftR {
5209
38.3k
        size: v5.clone(),
5210
38.3k
        kind: arg1.clone(),
5211
38.3k
        src: arg2,
5212
38.3k
        num_bits: arg3.clone(),
5213
38.3k
        dst: v4,
5214
38.3k
    };
5215
38.3k
    let v7 = C::emit(ctx, &v6);
5216
38.3k
    let v8 = C::writable_gpr_to_gpr(ctx, v4);
5217
38.3k
    // Rule at src/isa/x64/inst.isle line 2695.
5218
38.3k
    return v8;
5219
38.3k
}
5220
5221
// Generated as internal constructor for term x64_rotl.
5222
1.00k
pub fn constructor_x64_rotl<C: Context>(
5223
1.00k
    ctx: &mut C,
5224
1.00k
    arg0: Type,
5225
1.00k
    arg1: Gpr,
5226
1.00k
    arg2: &Imm8Gpr,
5227
1.00k
) -> Gpr {
5228
1.00k
    let v5 = C::ty_32_or_64(ctx, arg0);
5229
1.00k
    if let Some(v6) = v5 {
5230
1.00k
        let v7 = C::imm8_from_imm8_gpr(ctx, arg2);
5231
1.00k
        if let Some(
v8930
) = v7 {
5232
930
            let v9 = C::use_bmi2(ctx);
5233
930
            if v9 == true {
5234
930
                let v10 = &C::gpr_to_gpr_mem(ctx, arg1);
5235
930
                let v11 = C::ty_bits(ctx, v6);
5236
930
                let v12 = C::u8_sub(ctx, v11, v8);
5237
930
                let v13 = constructor_x64_rorx(ctx, v6, v10, v12);
5238
930
                // Rule at src/isa/x64/inst.isle line 2707.
5239
930
                return v13;
5240
0
            }
5241
71
        }
5242
0
    }
5243
71
    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::RotateLeft, arg1, arg2);
5244
71
    // Rule at src/isa/x64/inst.isle line 2705.
5245
71
    return v4;
5246
1.00k
}
5247
5248
// Generated as internal constructor for term x64_rotr.
5249
25
pub fn constructor_x64_rotr<C: Context>(
5250
25
    ctx: &mut C,
5251
25
    arg0: Type,
5252
25
    arg1: Gpr,
5253
25
    arg2: &Imm8Gpr,
5254
25
) -> Gpr {
5255
25
    let v5 = C::ty_32_or_64(ctx, arg0);
5256
25
    if let Some(v6) = v5 {
5257
25
        let v7 = C::imm8_from_imm8_gpr(ctx, arg2);
5258
25
        if let Some(v8) = v7 {
5259
25
            let v9 = C::use_bmi2(ctx);
5260
25
            if v9 == true {
5261
25
                let v10 = &C::gpr_to_gpr_mem(ctx, arg1);
5262
25
                let v11 = constructor_x64_rorx(ctx, v6, v10, v8);
5263
25
                // Rule at src/isa/x64/inst.isle line 2715.
5264
25
                return v11;
5265
0
            }
5266
0
        }
5267
0
    }
5268
0
    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::RotateRight, arg1, arg2);
5269
0
    // Rule at src/isa/x64/inst.isle line 2713.
5270
0
    return v4;
5271
25
}
5272
5273
// Generated as internal constructor for term x64_shl.
5274
23.7k
pub fn constructor_x64_shl<C: Context>(
5275
23.7k
    ctx: &mut C,
5276
23.7k
    arg0: Type,
5277
23.7k
    arg1: Gpr,
5278
23.7k
    arg2: &Imm8Gpr,
5279
23.7k
) -> Gpr {
5280
23.7k
    let v5 = C::ty_32_or_64(ctx, arg0);
5281
23.7k
    if let Some(v6) = v5 {
5282
23.7k
        let v7 = C::gpr_from_imm8_gpr(ctx, arg2);
5283
23.7k
        if let Some(
v8443
) = v7 {
5284
443
            let v9 = C::use_bmi2(ctx);
5285
443
            if v9 == true {
5286
443
                let v10 = &C::gpr_to_gpr_mem(ctx, arg1);
5287
443
                let v11 = constructor_x64_shlx(ctx, v6, v10, v8);
5288
443
                // Rule at src/isa/x64/inst.isle line 2727.
5289
443
                return v11;
5290
0
            }
5291
23.2k
        }
5292
0
    }
5293
23.2k
    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::ShiftLeft, arg1, arg2);
5294
23.2k
    // Rule at src/isa/x64/inst.isle line 2721.
5295
23.2k
    return v4;
5296
23.7k
}
5297
5298
// Generated as internal constructor for term x64_shr.
5299
15.2k
pub fn constructor_x64_shr<C: Context>(
5300
15.2k
    ctx: &mut C,
5301
15.2k
    arg0: Type,
5302
15.2k
    arg1: Gpr,
5303
15.2k
    arg2: &Imm8Gpr,
5304
15.2k
) -> Gpr {
5305
15.2k
    let v5 = C::ty_32_or_64(ctx, arg0);
5306
15.2k
    if let Some(v6) = v5 {
5307
15.2k
        let v7 = C::gpr_from_imm8_gpr(ctx, arg2);
5308
15.2k
        if let Some(
v8524
) = v7 {
5309
524
            let v9 = C::use_bmi2(ctx);
5310
524
            if v9 == true {
5311
524
                let v10 = &C::gpr_to_gpr_mem(ctx, arg1);
5312
524
                let v11 = constructor_x64_shrx(ctx, v6, v10, v8);
5313
524
                // Rule at src/isa/x64/inst.isle line 2736.
5314
524
                return v11;
5315
0
            }
5316
14.6k
        }
5317
0
    }
5318
14.6k
    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::ShiftRightLogical, arg1, arg2);
5319
14.6k
    // Rule at src/isa/x64/inst.isle line 2733.
5320
14.6k
    return v4;
5321
15.2k
}
5322
5323
// Generated as internal constructor for term x64_sar.
5324
297
pub fn constructor_x64_sar<C: Context>(
5325
297
    ctx: &mut C,
5326
297
    arg0: Type,
5327
297
    arg1: Gpr,
5328
297
    arg2: &Imm8Gpr,
5329
297
) -> Gpr {
5330
297
    let v5 = C::ty_32_or_64(ctx, arg0);
5331
297
    if let Some(v6) = v5 {
5332
297
        let v7 = C::gpr_from_imm8_gpr(ctx, arg2);
5333
297
        if let Some(
v80
) = v7 {
5334
0
            let v9 = C::use_bmi2(ctx);
5335
0
            if v9 == true {
5336
0
                let v10 = &C::gpr_to_gpr_mem(ctx, arg1);
5337
0
                let v11 = constructor_x64_sarx(ctx, v6, v10, v8);
5338
0
                // Rule at src/isa/x64/inst.isle line 2745.
5339
0
                return v11;
5340
0
            }
5341
297
        }
5342
0
    }
5343
297
    let v4 = constructor_shift_r(ctx, arg0, &ShiftKind::ShiftRightArithmetic, arg1, arg2);
5344
297
    // Rule at src/isa/x64/inst.isle line 2742.
5345
297
    return v4;
5346
297
}
5347
5348
// Generated as internal constructor for term x64_bzhi.
5349
0
pub fn constructor_x64_bzhi<C: Context>(
5350
0
    ctx: &mut C,
5351
0
    arg0: Type,
5352
0
    arg1: &GprMem,
5353
0
    arg2: Gpr,
5354
0
) -> Gpr {
5355
0
    let v4 = constructor_alu_rm_r_vex(ctx, arg0, &AluRmROpcode::Bzhi, arg2, arg1);
5356
0
    // Rule at src/isa/x64/inst.isle line 2754.
5357
0
    return v4;
5358
0
}
5359
5360
// Generated as internal constructor for term x64_bswap.
5361
0
pub fn constructor_x64_bswap<C: Context>(
5362
0
    ctx: &mut C,
5363
0
    arg0: Type,
5364
0
    arg1: Gpr,
5365
0
) -> Gpr {
5366
0
    let v2 = C::temp_writable_gpr(ctx);
5367
0
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
5368
0
    let v4 = MInst::Bswap {
5369
0
        size: v3.clone(),
5370
0
        src: arg1,
5371
0
        dst: v2,
5372
0
    };
5373
0
    let v5 = C::emit(ctx, &v4);
5374
0
    let v6 = C::writable_gpr_to_gpr(ctx, v2);
5375
0
    // Rule at src/isa/x64/inst.isle line 2761.
5376
0
    return v6;
5377
0
}
5378
5379
// Generated as internal constructor for term cmp_rmi_r.
5380
497k
pub fn constructor_cmp_rmi_r<C: Context>(
5381
497k
    ctx: &mut C,
5382
497k
    arg0: &OperandSize,
5383
497k
    arg1: &CmpOpcode,
5384
497k
    arg2: &GprMemImm,
5385
497k
    arg3: Gpr,
5386
497k
) -> ProducesFlags {
5387
497k
    let v4 = MInst::CmpRmiR {
5388
497k
        size: arg0.clone(),
5389
497k
        opcode: arg1.clone(),
5390
497k
        src: arg2.clone(),
5391
497k
        dst: arg3,
5392
497k
    };
5393
497k
    let v5 = ProducesFlags::ProducesFlagsSideEffect {
5394
497k
        inst: v4,
5395
497k
    };
5396
497k
    // Rule at src/isa/x64/inst.isle line 2769.
5397
497k
    return v5;
5398
497k
}
5399
5400
// Generated as internal constructor for term x64_cmp.
5401
265k
pub fn constructor_x64_cmp<C: Context>(
5402
265k
    ctx: &mut C,
5403
265k
    arg0: &OperandSize,
5404
265k
    arg1: &GprMemImm,
5405
265k
    arg2: Gpr,
5406
265k
) -> ProducesFlags {
5407
265k
    let v4 = &constructor_cmp_rmi_r(ctx, arg0, &CmpOpcode::Cmp, arg1, arg2);
5408
265k
    // Rule at src/isa/x64/inst.isle line 2778.
5409
265k
    return v4.clone();
5410
265k
}
5411
5412
// Generated as internal constructor for term x64_cmp_imm.
5413
0
pub fn constructor_x64_cmp_imm<C: Context>(
5414
0
    ctx: &mut C,
5415
0
    arg0: &OperandSize,
5416
0
    arg1: u32,
5417
0
    arg2: Gpr,
5418
0
) -> ProducesFlags {
5419
0
    let v4 = RegMemImm::Imm {
5420
0
        simm32: arg1,
5421
0
    };
5422
0
    let v5 = &C::gpr_mem_imm_new(ctx, &v4);
5423
0
    let v6 = &constructor_cmp_rmi_r(ctx, arg0, &CmpOpcode::Cmp, v5, arg2);
5424
0
    // Rule at src/isa/x64/inst.isle line 2783.
5425
0
    return v6.clone();
5426
0
}
5427
5428
// Generated as internal constructor for term xmm_cmp_rm_r.
5429
0
pub fn constructor_xmm_cmp_rm_r<C: Context>(
5430
0
    ctx: &mut C,
5431
0
    arg0: &SseOpcode,
5432
0
    arg1: &XmmMemAligned,
5433
0
    arg2: Xmm,
5434
0
) -> ProducesFlags {
5435
0
    let v3 = MInst::XmmCmpRmR {
5436
0
        op: arg0.clone(),
5437
0
        src: arg1.clone(),
5438
0
        dst: arg2,
5439
0
    };
5440
0
    let v4 = ProducesFlags::ProducesFlagsSideEffect {
5441
0
        inst: v3,
5442
0
    };
5443
0
    // Rule at src/isa/x64/inst.isle line 2788.
5444
0
    return v4;
5445
0
}
5446
5447
// Generated as internal constructor for term x64_ucomis.
5448
0
pub fn constructor_x64_ucomis<C: Context>(
5449
0
    ctx: &mut C,
5450
0
    arg0: Value,
5451
0
    arg1: Value,
5452
0
) -> ProducesFlags {
5453
0
    let v1 = C::value_type(ctx, arg0);
5454
0
    match v1 {
5455
        F32 => {
5456
0
            let v4 = constructor_put_in_xmm(ctx, arg0);
5457
0
            let v5 = &constructor_xmm_to_xmm_mem_aligned(ctx, v4);
5458
0
            let v6 = constructor_put_in_xmm(ctx, arg1);
5459
0
            let v7 = &constructor_xmm_cmp_rm_r(ctx, &SseOpcode::Ucomiss, v5, v6);
5460
0
            // Rule at src/isa/x64/inst.isle line 2794.
5461
0
            return v7.clone();
5462
        }
5463
        F64 => {
5464
0
            let v4 = constructor_put_in_xmm(ctx, arg0);
5465
0
            let v5 = &constructor_xmm_to_xmm_mem_aligned(ctx, v4);
5466
0
            let v6 = constructor_put_in_xmm(ctx, arg1);
5467
0
            let v9 = &constructor_xmm_cmp_rm_r(ctx, &SseOpcode::Ucomisd, v5, v6);
5468
0
            // Rule at src/isa/x64/inst.isle line 2798.
5469
0
            return v9.clone();
5470
        }
5471
0
        _ => {}
5472
0
    }
5473
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_ucomis", "src/isa/x64/inst.isle line 2793")
5474
0
}
5475
5476
// Generated as internal constructor for term x64_test.
5477
231k
pub fn constructor_x64_test<C: Context>(
5478
231k
    ctx: &mut C,
5479
231k
    arg0: &OperandSize,
5480
231k
    arg1: &GprMemImm,
5481
231k
    arg2: Gpr,
5482
231k
) -> ProducesFlags {
5483
231k
    let v4 = &constructor_cmp_rmi_r(ctx, arg0, &CmpOpcode::Test, arg1, arg2);
5484
231k
    // Rule at src/isa/x64/inst.isle line 2803.
5485
231k
    return v4.clone();
5486
231k
}
5487
5488
// Generated as internal constructor for term x64_ptest.
5489
0
pub fn constructor_x64_ptest<C: Context>(
5490
0
    ctx: &mut C,
5491
0
    arg0: &XmmMem,
5492
0
    arg1: Xmm,
5493
0
) -> ProducesFlags {
5494
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
5495
0
    let v4 = &constructor_xmm_cmp_rm_r(ctx, &SseOpcode::Ptest, v3, arg1);
5496
0
    // Rule at src/isa/x64/inst.isle line 2808.
5497
0
    return v4.clone();
5498
0
}
5499
5500
// Generated as internal constructor for term cmove.
5501
72.9k
pub fn constructor_cmove<C: Context>(
5502
72.9k
    ctx: &mut C,
5503
72.9k
    arg0: Type,
5504
72.9k
    arg1: &CC,
5505
72.9k
    arg2: &GprMem,
5506
72.9k
    arg3: Gpr,
5507
72.9k
) -> ConsumesFlags {
5508
72.9k
    let v4 = C::temp_writable_gpr(ctx);
5509
72.9k
    let v5 = &C::operand_size_of_type_32_64(ctx, arg0);
5510
72.9k
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v4);
5511
72.9k
    let v6 = MInst::Cmove {
5512
72.9k
        size: v5.clone(),
5513
72.9k
        cc: arg1.clone(),
5514
72.9k
        consequent: arg2.clone(),
5515
72.9k
        alternative: arg3,
5516
72.9k
        dst: v4,
5517
72.9k
    };
5518
72.9k
    let v8 = ConsumesFlags::ConsumesFlagsReturnsReg {
5519
72.9k
        inst: v6,
5520
72.9k
        result: v7,
5521
72.9k
    };
5522
72.9k
    // Rule at src/isa/x64/inst.isle line 2815.
5523
72.9k
    return v8;
5524
72.9k
}
5525
5526
// Generated as internal constructor for term cmove_xmm.
5527
0
pub fn constructor_cmove_xmm<C: Context>(
5528
0
    ctx: &mut C,
5529
0
    arg0: Type,
5530
0
    arg1: &CC,
5531
0
    arg2: &XmmMemAligned,
5532
0
    arg3: Xmm,
5533
0
) -> ConsumesFlags {
5534
0
    let v4 = C::temp_writable_xmm(ctx);
5535
0
    let v6 = constructor_writable_xmm_to_r_reg(ctx, v4);
5536
0
    let v5 = MInst::XmmCmove {
5537
0
        ty: arg0,
5538
0
        cc: arg1.clone(),
5539
0
        consequent: arg2.clone(),
5540
0
        alternative: arg3,
5541
0
        dst: v4,
5542
0
    };
5543
0
    let v7 = ConsumesFlags::ConsumesFlagsReturnsReg {
5544
0
        inst: v5,
5545
0
        result: v6,
5546
0
    };
5547
0
    // Rule at src/isa/x64/inst.isle line 2823.
5548
0
    return v7;
5549
0
}
5550
5551
// Generated as internal constructor for term cmove_from_values.
5552
23.3k
pub fn constructor_cmove_from_values<C: Context>(
5553
23.3k
    ctx: &mut C,
5554
23.3k
    arg0: Type,
5555
23.3k
    arg1: &CC,
5556
23.3k
    arg2: Value,
5557
23.3k
    arg3: Value,
5558
23.3k
) -> ConsumesFlags {
5559
23.3k
    let v1 = &C::type_register_class(ctx, arg0);
5560
23.3k
    if let Some(v2) = v1 {
5561
23.3k
        match v2 {
5562
            &RegisterClass::Gpr {
5563
23.3k
                single_register: v3,
5564
23.3k
            } => {
5565
23.3k
                match v3 {
5566
                    true => {
5567
23.3k
                        let v26 = &constructor_put_in_gpr_mem(ctx, arg2);
5568
23.3k
                        let v27 = constructor_put_in_gpr(ctx, arg3);
5569
23.3k
                        let v28 = &constructor_cmove(ctx, arg0, arg1, v26, v27);
5570
23.3k
                        // Rule at src/isa/x64/inst.isle line 2854.
5571
23.3k
                        return v28.clone();
5572
                    }
5573
                    false => {
5574
0
                        if arg0 == I128 {
5575
0
                            let v7 = C::put_in_regs(ctx, arg2);
5576
0
                            let v8 = C::put_in_regs(ctx, arg3);
5577
0
                            let v9 = C::temp_writable_gpr(ctx);
5578
0
                            let v10 = C::temp_writable_gpr(ctx);
5579
0
                            let v13 = constructor_value_regs_get_gpr(ctx, v7, 0x0);
5580
0
                            let v14 = &C::gpr_to_gpr_mem(ctx, v13);
5581
0
                            let v15 = constructor_value_regs_get_gpr(ctx, v8, 0x0);
5582
0
                            let v18 = constructor_value_regs_get_gpr(ctx, v7, 0x1);
5583
0
                            let v19 = &C::gpr_to_gpr_mem(ctx, v18);
5584
0
                            let v20 = constructor_value_regs_get_gpr(ctx, v8, 0x1);
5585
0
                            let v22 = constructor_writable_gpr_to_r_reg(ctx, v9);
5586
0
                            let v23 = constructor_writable_gpr_to_r_reg(ctx, v10);
5587
0
                            let v24 = C::value_regs(ctx, v22, v23);
5588
0
                            let v16 = MInst::Cmove {
5589
0
                                size: OperandSize::Size64,
5590
0
                                cc: arg1.clone(),
5591
0
                                consequent: v14.clone(),
5592
0
                                alternative: v15,
5593
0
                                dst: v9,
5594
0
                            };
5595
0
                            let v21 = MInst::Cmove {
5596
0
                                size: OperandSize::Size64,
5597
0
                                cc: arg1.clone(),
5598
0
                                consequent: v19.clone(),
5599
0
                                alternative: v20,
5600
0
                                dst: v10,
5601
0
                            };
5602
0
                            let v25 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
5603
0
                                inst1: v16,
5604
0
                                inst2: v21,
5605
0
                                result: v24,
5606
0
                            };
5607
0
                            // Rule at src/isa/x64/inst.isle line 2833.
5608
0
                            return v25;
5609
0
                        }
5610
                    }
5611
                    _ => {}
5612
                }
5613
            }
5614
            &RegisterClass::Xmm => {
5615
0
                let v29 = &constructor_put_in_xmm_mem_aligned(ctx, arg2);
5616
0
                let v30 = constructor_put_in_xmm(ctx, arg3);
5617
0
                let v31 = &constructor_cmove_xmm(ctx, arg0, arg1, v29, v30);
5618
0
                // Rule at src/isa/x64/inst.isle line 2857.
5619
0
                return v31.clone();
5620
            }
5621
0
            _ => {}
5622
        }
5623
0
    }
5624
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "cmove_from_values", "src/isa/x64/inst.isle line 2832")
5625
23.3k
}
5626
5627
// Generated as internal constructor for term cmove_or.
5628
0
pub fn constructor_cmove_or<C: Context>(
5629
0
    ctx: &mut C,
5630
0
    arg0: Type,
5631
0
    arg1: &CC,
5632
0
    arg2: &CC,
5633
0
    arg3: &GprMem,
5634
0
    arg4: Gpr,
5635
0
) -> ConsumesFlags {
5636
0
    let v5 = C::temp_writable_gpr(ctx);
5637
0
    let v6 = C::temp_writable_gpr(ctx);
5638
0
    let v7 = &C::operand_size_of_type_32_64(ctx, arg0);
5639
0
    let v9 = C::writable_gpr_to_gpr(ctx, v6);
5640
0
    let v11 = constructor_writable_gpr_to_value_regs(ctx, v5);
5641
0
    let v8 = MInst::Cmove {
5642
0
        size: v7.clone(),
5643
0
        cc: arg1.clone(),
5644
0
        consequent: arg3.clone(),
5645
0
        alternative: arg4,
5646
0
        dst: v6,
5647
0
    };
5648
0
    let v10 = MInst::Cmove {
5649
0
        size: v7.clone(),
5650
0
        cc: arg2.clone(),
5651
0
        consequent: arg3.clone(),
5652
0
        alternative: v9,
5653
0
        dst: v5,
5654
0
    };
5655
0
    let v12 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
5656
0
        inst1: v8,
5657
0
        inst2: v10,
5658
0
        result: v11,
5659
0
    };
5660
0
    // Rule at src/isa/x64/inst.isle line 2864.
5661
0
    return v12;
5662
0
}
5663
5664
// Generated as internal constructor for term cmove_or_xmm.
5665
0
pub fn constructor_cmove_or_xmm<C: Context>(
5666
0
    ctx: &mut C,
5667
0
    arg0: Type,
5668
0
    arg1: &CC,
5669
0
    arg2: &CC,
5670
0
    arg3: &XmmMemAligned,
5671
0
    arg4: Xmm,
5672
0
) -> ConsumesFlags {
5673
0
    let v5 = C::temp_writable_xmm(ctx);
5674
0
    let v6 = C::temp_writable_xmm(ctx);
5675
0
    let v8 = C::writable_xmm_to_xmm(ctx, v6);
5676
0
    let v10 = constructor_writable_xmm_to_value_regs(ctx, v5);
5677
0
    let v7 = MInst::XmmCmove {
5678
0
        ty: arg0,
5679
0
        cc: arg1.clone(),
5680
0
        consequent: arg3.clone(),
5681
0
        alternative: arg4,
5682
0
        dst: v6,
5683
0
    };
5684
0
    let v9 = MInst::XmmCmove {
5685
0
        ty: arg0,
5686
0
        cc: arg2.clone(),
5687
0
        consequent: arg3.clone(),
5688
0
        alternative: v8,
5689
0
        dst: v5,
5690
0
    };
5691
0
    let v11 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs {
5692
0
        inst1: v7,
5693
0
        inst2: v9,
5694
0
        result: v10,
5695
0
    };
5696
0
    // Rule at src/isa/x64/inst.isle line 2876.
5697
0
    return v11;
5698
0
}
5699
5700
// Generated as internal constructor for term cmove_or_from_values.
5701
0
pub fn constructor_cmove_or_from_values<C: Context>(
5702
0
    ctx: &mut C,
5703
0
    arg0: Type,
5704
0
    arg1: &CC,
5705
0
    arg2: &CC,
5706
0
    arg3: Value,
5707
0
    arg4: Value,
5708
0
) -> ConsumesFlags {
5709
0
    let v1 = &C::type_register_class(ctx, arg0);
5710
0
    if let Some(v2) = v1 {
5711
0
        match v2 {
5712
            &RegisterClass::Gpr {
5713
0
                single_register: v3,
5714
0
            } => {
5715
0
                match v3 {
5716
                    true => {
5717
0
                        let v37 = &constructor_put_in_gpr_mem(ctx, arg3);
5718
0
                        let v38 = constructor_put_in_gpr(ctx, arg4);
5719
0
                        let v39 = &constructor_cmove_or(ctx, arg0, arg1, arg2, v37, v38);
5720
0
                        // Rule at src/isa/x64/inst.isle line 2909.
5721
0
                        return v39.clone();
5722
                    }
5723
                    false => {
5724
0
                        if arg0 == I128 {
5725
0
                            let v8 = C::put_in_regs(ctx, arg3);
5726
0
                            let v9 = C::put_in_regs(ctx, arg4);
5727
0
                            let v10 = C::temp_writable_gpr(ctx);
5728
0
                            let v11 = C::temp_writable_gpr(ctx);
5729
0
                            let v12 = C::temp_writable_gpr(ctx);
5730
0
                            let v13 = C::temp_writable_gpr(ctx);
5731
0
                            let v16 = constructor_value_regs_get_gpr(ctx, v8, 0x0);
5732
0
                            let v17 = &C::gpr_to_gpr_mem(ctx, v16);
5733
0
                            let v18 = constructor_value_regs_get_gpr(ctx, v9, 0x0);
5734
0
                            let v20 = constructor_value_regs_get_gpr(ctx, v8, 0x0);
5735
0
                            let v21 = &C::gpr_to_gpr_mem(ctx, v20);
5736
0
                            let v22 = C::writable_gpr_to_gpr(ctx, v12);
5737
0
                            let v25 = constructor_value_regs_get_gpr(ctx, v8, 0x1);
5738
0
                            let v26 = &C::gpr_to_gpr_mem(ctx, v25);
5739
0
                            let v27 = constructor_value_regs_get_gpr(ctx, v9, 0x1);
5740
0
                            let v29 = constructor_value_regs_get_gpr(ctx, v8, 0x1);
5741
0
                            let v30 = &C::gpr_to_gpr_mem(ctx, v29);
5742
0
                            let v31 = C::writable_gpr_to_gpr(ctx, v13);
5743
0
                            let v33 = constructor_writable_gpr_to_r_reg(ctx, v10);
5744
0
                            let v34 = constructor_writable_gpr_to_r_reg(ctx, v11);
5745
0
                            let v35 = C::value_regs(ctx, v33, v34);
5746
0
                            let v19 = MInst::Cmove {
5747
0
                                size: OperandSize::Size64,
5748
0
                                cc: arg1.clone(),
5749
0
                                consequent: v17.clone(),
5750
0
                                alternative: v18,
5751
0
                                dst: v12,
5752
0
                            };
5753
0
                            let v23 = MInst::Cmove {
5754
0
                                size: OperandSize::Size64,
5755
0
                                cc: arg2.clone(),
5756
0
                                consequent: v21.clone(),
5757
0
                                alternative: v22,
5758
0
                                dst: v10,
5759
0
                            };
5760
0
                            let v28 = MInst::Cmove {
5761
0
                                size: OperandSize::Size64,
5762
0
                                cc: arg1.clone(),
5763
0
                                consequent: v26.clone(),
5764
0
                                alternative: v27,
5765
0
                                dst: v13,
5766
0
                            };
5767
0
                            let v32 = MInst::Cmove {
5768
0
                                size: OperandSize::Size64,
5769
0
                                cc: arg2.clone(),
5770
0
                                consequent: v30.clone(),
5771
0
                                alternative: v31,
5772
0
                                dst: v11,
5773
0
                            };
5774
0
                            let v36 = ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs {
5775
0
                                inst1: v19,
5776
0
                                inst2: v23,
5777
0
                                inst3: v28,
5778
0
                                inst4: v32,
5779
0
                                result: v35,
5780
0
                            };
5781
0
                            // Rule at src/isa/x64/inst.isle line 2890.
5782
0
                            return v36;
5783
0
                        }
5784
                    }
5785
                    _ => {}
5786
                }
5787
            }
5788
            &RegisterClass::Xmm => {
5789
0
                let v40 = &constructor_put_in_xmm_mem_aligned(ctx, arg3);
5790
0
                let v41 = constructor_put_in_xmm(ctx, arg4);
5791
0
                let v42 = &constructor_cmove_or_xmm(ctx, arg0, arg1, arg2, v40, v41);
5792
0
                // Rule at src/isa/x64/inst.isle line 2912.
5793
0
                return v42.clone();
5794
            }
5795
0
            _ => {}
5796
        }
5797
0
    }
5798
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "cmove_or_from_values", "src/isa/x64/inst.isle line 2889")
5799
0
}
5800
5801
// Generated as internal constructor for term x64_setcc.
5802
17.5k
pub fn constructor_x64_setcc<C: Context>(
5803
17.5k
    ctx: &mut C,
5804
17.5k
    arg0: &CC,
5805
17.5k
) -> ConsumesFlags {
5806
17.5k
    let v1 = C::temp_writable_gpr(ctx);
5807
17.5k
    let v3 = constructor_writable_gpr_to_r_reg(ctx, v1);
5808
17.5k
    let v2 = MInst::Setcc {
5809
17.5k
        cc: arg0.clone(),
5810
17.5k
        dst: v1,
5811
17.5k
    };
5812
17.5k
    let v4 = ConsumesFlags::ConsumesFlagsReturnsReg {
5813
17.5k
        inst: v2,
5814
17.5k
        result: v3,
5815
17.5k
    };
5816
17.5k
    // Rule at src/isa/x64/inst.isle line 2917.
5817
17.5k
    return v4;
5818
17.5k
}
5819
5820
// Generated as internal constructor for term x64_setcc_paired.
5821
0
pub fn constructor_x64_setcc_paired<C: Context>(
5822
0
    ctx: &mut C,
5823
0
    arg0: &CC,
5824
0
) -> ConsumesFlags {
5825
0
    let v1 = C::temp_writable_gpr(ctx);
5826
0
    let v3 = constructor_writable_gpr_to_r_reg(ctx, v1);
5827
0
    let v2 = MInst::Setcc {
5828
0
        cc: arg0.clone(),
5829
0
        dst: v1,
5830
0
    };
5831
0
    let v4 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer {
5832
0
        inst: v2,
5833
0
        result: v3,
5834
0
    };
5835
0
    // Rule at src/isa/x64/inst.isle line 2926.
5836
0
    return v4;
5837
0
}
5838
5839
// Generated as internal constructor for term x64_paddb.
5840
0
pub fn constructor_x64_paddb<C: Context>(
5841
0
    ctx: &mut C,
5842
0
    arg0: Xmm,
5843
0
    arg1: &XmmMem,
5844
0
) -> Xmm {
5845
0
    let v5 = C::use_avx(ctx);
5846
0
    if v5 == true {
5847
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5848
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddb, arg0, v7);
5849
0
        // Rule at src/isa/x64/inst.isle line 2936.
5850
0
        return v8;
5851
0
    }
5852
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5853
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddb, arg0, v3);
5854
0
    // Rule at src/isa/x64/inst.isle line 2934.
5855
0
    return v4;
5856
0
}
5857
5858
// Generated as internal constructor for term x64_paddw.
5859
0
pub fn constructor_x64_paddw<C: Context>(
5860
0
    ctx: &mut C,
5861
0
    arg0: Xmm,
5862
0
    arg1: &XmmMem,
5863
0
) -> Xmm {
5864
0
    let v5 = C::use_avx(ctx);
5865
0
    if v5 == true {
5866
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5867
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddw, arg0, v7);
5868
0
        // Rule at src/isa/x64/inst.isle line 2944.
5869
0
        return v8;
5870
0
    }
5871
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5872
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddw, arg0, v3);
5873
0
    // Rule at src/isa/x64/inst.isle line 2942.
5874
0
    return v4;
5875
0
}
5876
5877
// Generated as internal constructor for term x64_paddd.
5878
0
pub fn constructor_x64_paddd<C: Context>(
5879
0
    ctx: &mut C,
5880
0
    arg0: Xmm,
5881
0
    arg1: &XmmMem,
5882
0
) -> Xmm {
5883
0
    let v5 = C::use_avx(ctx);
5884
0
    if v5 == true {
5885
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5886
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddd, arg0, v7);
5887
0
        // Rule at src/isa/x64/inst.isle line 2952.
5888
0
        return v8;
5889
0
    }
5890
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5891
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddd, arg0, v3);
5892
0
    // Rule at src/isa/x64/inst.isle line 2950.
5893
0
    return v4;
5894
0
}
5895
5896
// Generated as internal constructor for term x64_paddq.
5897
0
pub fn constructor_x64_paddq<C: Context>(
5898
0
    ctx: &mut C,
5899
0
    arg0: Xmm,
5900
0
    arg1: &XmmMem,
5901
0
) -> Xmm {
5902
0
    let v5 = C::use_avx(ctx);
5903
0
    if v5 == true {
5904
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5905
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddq, arg0, v7);
5906
0
        // Rule at src/isa/x64/inst.isle line 2960.
5907
0
        return v8;
5908
0
    }
5909
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5910
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddq, arg0, v3);
5911
0
    // Rule at src/isa/x64/inst.isle line 2958.
5912
0
    return v4;
5913
0
}
5914
5915
// Generated as internal constructor for term x64_paddsb.
5916
0
pub fn constructor_x64_paddsb<C: Context>(
5917
0
    ctx: &mut C,
5918
0
    arg0: Xmm,
5919
0
    arg1: &XmmMem,
5920
0
) -> Xmm {
5921
0
    let v5 = C::use_avx(ctx);
5922
0
    if v5 == true {
5923
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5924
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddsb, arg0, v7);
5925
0
        // Rule at src/isa/x64/inst.isle line 2968.
5926
0
        return v8;
5927
0
    }
5928
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5929
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddsb, arg0, v3);
5930
0
    // Rule at src/isa/x64/inst.isle line 2966.
5931
0
    return v4;
5932
0
}
5933
5934
// Generated as internal constructor for term x64_paddsw.
5935
0
pub fn constructor_x64_paddsw<C: Context>(
5936
0
    ctx: &mut C,
5937
0
    arg0: Xmm,
5938
0
    arg1: &XmmMem,
5939
0
) -> Xmm {
5940
0
    let v5 = C::use_avx(ctx);
5941
0
    if v5 == true {
5942
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5943
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddsw, arg0, v7);
5944
0
        // Rule at src/isa/x64/inst.isle line 2976.
5945
0
        return v8;
5946
0
    }
5947
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5948
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddsw, arg0, v3);
5949
0
    // Rule at src/isa/x64/inst.isle line 2974.
5950
0
    return v4;
5951
0
}
5952
5953
// Generated as internal constructor for term x64_phaddw.
5954
0
pub fn constructor_x64_phaddw<C: Context>(
5955
0
    ctx: &mut C,
5956
0
    arg0: Xmm,
5957
0
    arg1: &XmmMem,
5958
0
) -> Xmm {
5959
0
    let v5 = C::use_avx(ctx);
5960
0
    if v5 == true {
5961
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5962
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vphaddw, arg0, v7);
5963
0
        // Rule at src/isa/x64/inst.isle line 2984.
5964
0
        return v8;
5965
0
    }
5966
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5967
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Phaddw, arg0, v3);
5968
0
    // Rule at src/isa/x64/inst.isle line 2982.
5969
0
    return v4;
5970
0
}
5971
5972
// Generated as internal constructor for term x64_phaddd.
5973
0
pub fn constructor_x64_phaddd<C: Context>(
5974
0
    ctx: &mut C,
5975
0
    arg0: Xmm,
5976
0
    arg1: &XmmMem,
5977
0
) -> Xmm {
5978
0
    let v5 = C::use_avx(ctx);
5979
0
    if v5 == true {
5980
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
5981
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vphaddd, arg0, v7);
5982
0
        // Rule at src/isa/x64/inst.isle line 2992.
5983
0
        return v8;
5984
0
    }
5985
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
5986
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Phaddd, arg0, v3);
5987
0
    // Rule at src/isa/x64/inst.isle line 2990.
5988
0
    return v4;
5989
0
}
5990
5991
// Generated as internal constructor for term x64_paddusb.
5992
0
pub fn constructor_x64_paddusb<C: Context>(
5993
0
    ctx: &mut C,
5994
0
    arg0: Xmm,
5995
0
    arg1: &XmmMem,
5996
0
) -> Xmm {
5997
0
    let v5 = C::use_avx(ctx);
5998
0
    if v5 == true {
5999
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6000
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddusb, arg0, v7);
6001
0
        // Rule at src/isa/x64/inst.isle line 3000.
6002
0
        return v8;
6003
0
    }
6004
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6005
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddusb, arg0, v3);
6006
0
    // Rule at src/isa/x64/inst.isle line 2998.
6007
0
    return v4;
6008
0
}
6009
6010
// Generated as internal constructor for term x64_paddusw.
6011
0
pub fn constructor_x64_paddusw<C: Context>(
6012
0
    ctx: &mut C,
6013
0
    arg0: Xmm,
6014
0
    arg1: &XmmMem,
6015
0
) -> Xmm {
6016
0
    let v5 = C::use_avx(ctx);
6017
0
    if v5 == true {
6018
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6019
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpaddusw, arg0, v7);
6020
0
        // Rule at src/isa/x64/inst.isle line 3008.
6021
0
        return v8;
6022
0
    }
6023
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6024
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Paddusw, arg0, v3);
6025
0
    // Rule at src/isa/x64/inst.isle line 3006.
6026
0
    return v4;
6027
0
}
6028
6029
// Generated as internal constructor for term x64_psubb.
6030
0
pub fn constructor_x64_psubb<C: Context>(
6031
0
    ctx: &mut C,
6032
0
    arg0: Xmm,
6033
0
    arg1: &XmmMem,
6034
0
) -> Xmm {
6035
0
    let v5 = C::use_avx(ctx);
6036
0
    if v5 == true {
6037
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6038
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubb, arg0, v7);
6039
0
        // Rule at src/isa/x64/inst.isle line 3016.
6040
0
        return v8;
6041
0
    }
6042
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6043
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubb, arg0, v3);
6044
0
    // Rule at src/isa/x64/inst.isle line 3014.
6045
0
    return v4;
6046
0
}
6047
6048
// Generated as internal constructor for term x64_psubw.
6049
0
pub fn constructor_x64_psubw<C: Context>(
6050
0
    ctx: &mut C,
6051
0
    arg0: Xmm,
6052
0
    arg1: &XmmMem,
6053
0
) -> Xmm {
6054
0
    let v5 = C::use_avx(ctx);
6055
0
    if v5 == true {
6056
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6057
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubw, arg0, v7);
6058
0
        // Rule at src/isa/x64/inst.isle line 3024.
6059
0
        return v8;
6060
0
    }
6061
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6062
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubw, arg0, v3);
6063
0
    // Rule at src/isa/x64/inst.isle line 3022.
6064
0
    return v4;
6065
0
}
6066
6067
// Generated as internal constructor for term x64_psubd.
6068
0
pub fn constructor_x64_psubd<C: Context>(
6069
0
    ctx: &mut C,
6070
0
    arg0: Xmm,
6071
0
    arg1: &XmmMem,
6072
0
) -> Xmm {
6073
0
    let v5 = C::use_avx(ctx);
6074
0
    if v5 == true {
6075
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6076
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubd, arg0, v7);
6077
0
        // Rule at src/isa/x64/inst.isle line 3032.
6078
0
        return v8;
6079
0
    }
6080
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6081
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubd, arg0, v3);
6082
0
    // Rule at src/isa/x64/inst.isle line 3030.
6083
0
    return v4;
6084
0
}
6085
6086
// Generated as internal constructor for term x64_psubq.
6087
0
pub fn constructor_x64_psubq<C: Context>(
6088
0
    ctx: &mut C,
6089
0
    arg0: Xmm,
6090
0
    arg1: &XmmMem,
6091
0
) -> Xmm {
6092
0
    let v5 = C::use_avx(ctx);
6093
0
    if v5 == true {
6094
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6095
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubq, arg0, v7);
6096
0
        // Rule at src/isa/x64/inst.isle line 3040.
6097
0
        return v8;
6098
0
    }
6099
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6100
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubq, arg0, v3);
6101
0
    // Rule at src/isa/x64/inst.isle line 3038.
6102
0
    return v4;
6103
0
}
6104
6105
// Generated as internal constructor for term x64_psubsb.
6106
0
pub fn constructor_x64_psubsb<C: Context>(
6107
0
    ctx: &mut C,
6108
0
    arg0: Xmm,
6109
0
    arg1: &XmmMem,
6110
0
) -> Xmm {
6111
0
    let v5 = C::use_avx(ctx);
6112
0
    if v5 == true {
6113
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6114
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubsb, arg0, v7);
6115
0
        // Rule at src/isa/x64/inst.isle line 3048.
6116
0
        return v8;
6117
0
    }
6118
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6119
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubsb, arg0, v3);
6120
0
    // Rule at src/isa/x64/inst.isle line 3046.
6121
0
    return v4;
6122
0
}
6123
6124
// Generated as internal constructor for term x64_psubsw.
6125
0
pub fn constructor_x64_psubsw<C: Context>(
6126
0
    ctx: &mut C,
6127
0
    arg0: Xmm,
6128
0
    arg1: &XmmMem,
6129
0
) -> Xmm {
6130
0
    let v5 = C::use_avx(ctx);
6131
0
    if v5 == true {
6132
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6133
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubsw, arg0, v7);
6134
0
        // Rule at src/isa/x64/inst.isle line 3056.
6135
0
        return v8;
6136
0
    }
6137
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6138
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubsw, arg0, v3);
6139
0
    // Rule at src/isa/x64/inst.isle line 3054.
6140
0
    return v4;
6141
0
}
6142
6143
// Generated as internal constructor for term x64_psubusb.
6144
0
pub fn constructor_x64_psubusb<C: Context>(
6145
0
    ctx: &mut C,
6146
0
    arg0: Xmm,
6147
0
    arg1: &XmmMem,
6148
0
) -> Xmm {
6149
0
    let v5 = C::use_avx(ctx);
6150
0
    if v5 == true {
6151
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6152
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubusb, arg0, v7);
6153
0
        // Rule at src/isa/x64/inst.isle line 3064.
6154
0
        return v8;
6155
0
    }
6156
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6157
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubusb, arg0, v3);
6158
0
    // Rule at src/isa/x64/inst.isle line 3062.
6159
0
    return v4;
6160
0
}
6161
6162
// Generated as internal constructor for term x64_psubusw.
6163
0
pub fn constructor_x64_psubusw<C: Context>(
6164
0
    ctx: &mut C,
6165
0
    arg0: Xmm,
6166
0
    arg1: &XmmMem,
6167
0
) -> Xmm {
6168
0
    let v5 = C::use_avx(ctx);
6169
0
    if v5 == true {
6170
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6171
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsubusw, arg0, v7);
6172
0
        // Rule at src/isa/x64/inst.isle line 3072.
6173
0
        return v8;
6174
0
    }
6175
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6176
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Psubusw, arg0, v3);
6177
0
    // Rule at src/isa/x64/inst.isle line 3070.
6178
0
    return v4;
6179
0
}
6180
6181
// Generated as internal constructor for term x64_pavgb.
6182
0
pub fn constructor_x64_pavgb<C: Context>(
6183
0
    ctx: &mut C,
6184
0
    arg0: Xmm,
6185
0
    arg1: &XmmMem,
6186
0
) -> Xmm {
6187
0
    let v5 = C::use_avx(ctx);
6188
0
    if v5 == true {
6189
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6190
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpavgb, arg0, v7);
6191
0
        // Rule at src/isa/x64/inst.isle line 3080.
6192
0
        return v8;
6193
0
    }
6194
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6195
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pavgb, arg0, v3);
6196
0
    // Rule at src/isa/x64/inst.isle line 3078.
6197
0
    return v4;
6198
0
}
6199
6200
// Generated as internal constructor for term x64_pavgw.
6201
0
pub fn constructor_x64_pavgw<C: Context>(
6202
0
    ctx: &mut C,
6203
0
    arg0: Xmm,
6204
0
    arg1: &XmmMem,
6205
0
) -> Xmm {
6206
0
    let v5 = C::use_avx(ctx);
6207
0
    if v5 == true {
6208
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6209
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpavgw, arg0, v7);
6210
0
        // Rule at src/isa/x64/inst.isle line 3088.
6211
0
        return v8;
6212
0
    }
6213
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6214
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pavgw, arg0, v3);
6215
0
    // Rule at src/isa/x64/inst.isle line 3086.
6216
0
    return v4;
6217
0
}
6218
6219
// Generated as internal constructor for term x64_pand.
6220
0
pub fn constructor_x64_pand<C: Context>(
6221
0
    ctx: &mut C,
6222
0
    arg0: Xmm,
6223
0
    arg1: &XmmMem,
6224
0
) -> Xmm {
6225
0
    let v5 = C::use_avx(ctx);
6226
0
    if v5 == true {
6227
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6228
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpand, arg0, v7);
6229
0
        // Rule at src/isa/x64/inst.isle line 3096.
6230
0
        return v8;
6231
0
    }
6232
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6233
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pand, arg0, v3);
6234
0
    // Rule at src/isa/x64/inst.isle line 3094.
6235
0
    return v4;
6236
0
}
6237
6238
// Generated as internal constructor for term x64_andps.
6239
0
pub fn constructor_x64_andps<C: Context>(
6240
0
    ctx: &mut C,
6241
0
    arg0: Xmm,
6242
0
    arg1: &XmmMem,
6243
0
) -> Xmm {
6244
0
    let v5 = C::use_avx(ctx);
6245
0
    if v5 == true {
6246
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6247
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandps, arg0, v7);
6248
0
        // Rule at src/isa/x64/inst.isle line 3104.
6249
0
        return v8;
6250
0
    }
6251
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6252
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andps, arg0, v3);
6253
0
    // Rule at src/isa/x64/inst.isle line 3102.
6254
0
    return v4;
6255
0
}
6256
6257
// Generated as internal constructor for term x64_andpd.
6258
0
pub fn constructor_x64_andpd<C: Context>(
6259
0
    ctx: &mut C,
6260
0
    arg0: Xmm,
6261
0
    arg1: &XmmMem,
6262
0
) -> Xmm {
6263
0
    let v5 = C::use_avx(ctx);
6264
0
    if v5 == true {
6265
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6266
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandpd, arg0, v7);
6267
0
        // Rule at src/isa/x64/inst.isle line 3112.
6268
0
        return v8;
6269
0
    }
6270
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6271
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andpd, arg0, v3);
6272
0
    // Rule at src/isa/x64/inst.isle line 3110.
6273
0
    return v4;
6274
0
}
6275
6276
// Generated as internal constructor for term x64_por.
6277
0
pub fn constructor_x64_por<C: Context>(
6278
0
    ctx: &mut C,
6279
0
    arg0: Xmm,
6280
0
    arg1: &XmmMem,
6281
0
) -> Xmm {
6282
0
    let v5 = C::use_avx(ctx);
6283
0
    if v5 == true {
6284
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6285
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpor, arg0, v7);
6286
0
        // Rule at src/isa/x64/inst.isle line 3120.
6287
0
        return v8;
6288
0
    }
6289
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6290
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Por, arg0, v3);
6291
0
    // Rule at src/isa/x64/inst.isle line 3118.
6292
0
    return v4;
6293
0
}
6294
6295
// Generated as internal constructor for term x64_orps.
6296
0
pub fn constructor_x64_orps<C: Context>(
6297
0
    ctx: &mut C,
6298
0
    arg0: Xmm,
6299
0
    arg1: &XmmMem,
6300
0
) -> Xmm {
6301
0
    let v5 = C::use_avx(ctx);
6302
0
    if v5 == true {
6303
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6304
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vorps, arg0, v7);
6305
0
        // Rule at src/isa/x64/inst.isle line 3128.
6306
0
        return v8;
6307
0
    }
6308
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6309
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Orps, arg0, v3);
6310
0
    // Rule at src/isa/x64/inst.isle line 3126.
6311
0
    return v4;
6312
0
}
6313
6314
// Generated as internal constructor for term x64_orpd.
6315
0
pub fn constructor_x64_orpd<C: Context>(
6316
0
    ctx: &mut C,
6317
0
    arg0: Xmm,
6318
0
    arg1: &XmmMem,
6319
0
) -> Xmm {
6320
0
    let v5 = C::use_avx(ctx);
6321
0
    if v5 == true {
6322
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6323
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vorpd, arg0, v7);
6324
0
        // Rule at src/isa/x64/inst.isle line 3136.
6325
0
        return v8;
6326
0
    }
6327
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6328
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Orpd, arg0, v3);
6329
0
    // Rule at src/isa/x64/inst.isle line 3134.
6330
0
    return v4;
6331
0
}
6332
6333
// Generated as internal constructor for term x64_pxor.
6334
0
pub fn constructor_x64_pxor<C: Context>(
6335
0
    ctx: &mut C,
6336
0
    arg0: Xmm,
6337
0
    arg1: &XmmMem,
6338
0
) -> Xmm {
6339
0
    let v5 = C::use_avx(ctx);
6340
0
    if v5 == true {
6341
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6342
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpxor, arg0, v7);
6343
0
        // Rule at src/isa/x64/inst.isle line 3144.
6344
0
        return v8;
6345
0
    }
6346
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6347
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pxor, arg0, v3);
6348
0
    // Rule at src/isa/x64/inst.isle line 3142.
6349
0
    return v4;
6350
0
}
6351
6352
// Generated as internal constructor for term x64_xorps.
6353
0
pub fn constructor_x64_xorps<C: Context>(
6354
0
    ctx: &mut C,
6355
0
    arg0: Xmm,
6356
0
    arg1: &XmmMem,
6357
0
) -> Xmm {
6358
0
    let v5 = C::use_avx(ctx);
6359
0
    if v5 == true {
6360
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6361
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vxorps, arg0, v7);
6362
0
        // Rule at src/isa/x64/inst.isle line 3152.
6363
0
        return v8;
6364
0
    }
6365
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6366
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Xorps, arg0, v3);
6367
0
    // Rule at src/isa/x64/inst.isle line 3150.
6368
0
    return v4;
6369
0
}
6370
6371
// Generated as internal constructor for term x64_xorpd.
6372
0
pub fn constructor_x64_xorpd<C: Context>(
6373
0
    ctx: &mut C,
6374
0
    arg0: Xmm,
6375
0
    arg1: &XmmMem,
6376
0
) -> Xmm {
6377
0
    let v5 = C::use_avx(ctx);
6378
0
    if v5 == true {
6379
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6380
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vxorpd, arg0, v7);
6381
0
        // Rule at src/isa/x64/inst.isle line 3160.
6382
0
        return v8;
6383
0
    }
6384
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6385
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Xorpd, arg0, v3);
6386
0
    // Rule at src/isa/x64/inst.isle line 3158.
6387
0
    return v4;
6388
0
}
6389
6390
// Generated as internal constructor for term x64_pmullw.
6391
0
pub fn constructor_x64_pmullw<C: Context>(
6392
0
    ctx: &mut C,
6393
0
    arg0: Xmm,
6394
0
    arg1: &XmmMem,
6395
0
) -> Xmm {
6396
0
    let v5 = C::use_avx(ctx);
6397
0
    if v5 == true {
6398
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6399
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmullw, arg0, v7);
6400
0
        // Rule at src/isa/x64/inst.isle line 3168.
6401
0
        return v8;
6402
0
    }
6403
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6404
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmullw, arg0, v3);
6405
0
    // Rule at src/isa/x64/inst.isle line 3166.
6406
0
    return v4;
6407
0
}
6408
6409
// Generated as internal constructor for term x64_pmulld.
6410
0
pub fn constructor_x64_pmulld<C: Context>(
6411
0
    ctx: &mut C,
6412
0
    arg0: Xmm,
6413
0
    arg1: &XmmMem,
6414
0
) -> Xmm {
6415
0
    let v5 = C::use_avx(ctx);
6416
0
    if v5 == true {
6417
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6418
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulld, arg0, v7);
6419
0
        // Rule at src/isa/x64/inst.isle line 3176.
6420
0
        return v8;
6421
0
    }
6422
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6423
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulld, arg0, v3);
6424
0
    // Rule at src/isa/x64/inst.isle line 3174.
6425
0
    return v4;
6426
0
}
6427
6428
// Generated as internal constructor for term x64_pmulhw.
6429
0
pub fn constructor_x64_pmulhw<C: Context>(
6430
0
    ctx: &mut C,
6431
0
    arg0: Xmm,
6432
0
    arg1: &XmmMem,
6433
0
) -> Xmm {
6434
0
    let v5 = C::use_avx(ctx);
6435
0
    if v5 == true {
6436
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6437
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulhw, arg0, v7);
6438
0
        // Rule at src/isa/x64/inst.isle line 3184.
6439
0
        return v8;
6440
0
    }
6441
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6442
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulhw, arg0, v3);
6443
0
    // Rule at src/isa/x64/inst.isle line 3182.
6444
0
    return v4;
6445
0
}
6446
6447
// Generated as internal constructor for term x64_pmulhrsw.
6448
0
pub fn constructor_x64_pmulhrsw<C: Context>(
6449
0
    ctx: &mut C,
6450
0
    arg0: Xmm,
6451
0
    arg1: &XmmMem,
6452
0
) -> Xmm {
6453
0
    let v5 = C::use_avx(ctx);
6454
0
    if v5 == true {
6455
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6456
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulhrsw, arg0, v7);
6457
0
        // Rule at src/isa/x64/inst.isle line 3192.
6458
0
        return v8;
6459
0
    }
6460
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6461
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulhrsw, arg0, v3);
6462
0
    // Rule at src/isa/x64/inst.isle line 3190.
6463
0
    return v4;
6464
0
}
6465
6466
// Generated as internal constructor for term x64_pmulhuw.
6467
0
pub fn constructor_x64_pmulhuw<C: Context>(
6468
0
    ctx: &mut C,
6469
0
    arg0: Xmm,
6470
0
    arg1: &XmmMem,
6471
0
) -> Xmm {
6472
0
    let v5 = C::use_avx(ctx);
6473
0
    if v5 == true {
6474
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6475
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmulhuw, arg0, v7);
6476
0
        // Rule at src/isa/x64/inst.isle line 3200.
6477
0
        return v8;
6478
0
    }
6479
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6480
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmulhuw, arg0, v3);
6481
0
    // Rule at src/isa/x64/inst.isle line 3198.
6482
0
    return v4;
6483
0
}
6484
6485
// Generated as internal constructor for term x64_pmuldq.
6486
0
pub fn constructor_x64_pmuldq<C: Context>(
6487
0
    ctx: &mut C,
6488
0
    arg0: Xmm,
6489
0
    arg1: &XmmMem,
6490
0
) -> Xmm {
6491
0
    let v5 = C::use_avx(ctx);
6492
0
    if v5 == true {
6493
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6494
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmuldq, arg0, v7);
6495
0
        // Rule at src/isa/x64/inst.isle line 3208.
6496
0
        return v8;
6497
0
    }
6498
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6499
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmuldq, arg0, v3);
6500
0
    // Rule at src/isa/x64/inst.isle line 3206.
6501
0
    return v4;
6502
0
}
6503
6504
// Generated as internal constructor for term x64_pmuludq.
6505
0
pub fn constructor_x64_pmuludq<C: Context>(
6506
0
    ctx: &mut C,
6507
0
    arg0: Xmm,
6508
0
    arg1: &XmmMem,
6509
0
) -> Xmm {
6510
0
    let v5 = C::use_avx(ctx);
6511
0
    if v5 == true {
6512
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6513
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmuludq, arg0, v7);
6514
0
        // Rule at src/isa/x64/inst.isle line 3216.
6515
0
        return v8;
6516
0
    }
6517
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6518
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmuludq, arg0, v3);
6519
0
    // Rule at src/isa/x64/inst.isle line 3214.
6520
0
    return v4;
6521
0
}
6522
6523
// Generated as internal constructor for term x64_punpckhwd.
6524
0
pub fn constructor_x64_punpckhwd<C: Context>(
6525
0
    ctx: &mut C,
6526
0
    arg0: Xmm,
6527
0
    arg1: &XmmMem,
6528
0
) -> Xmm {
6529
0
    let v5 = C::use_avx(ctx);
6530
0
    if v5 == true {
6531
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6532
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhwd, arg0, v7);
6533
0
        // Rule at src/isa/x64/inst.isle line 3224.
6534
0
        return v8;
6535
0
    }
6536
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6537
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhwd, arg0, v3);
6538
0
    // Rule at src/isa/x64/inst.isle line 3222.
6539
0
    return v4;
6540
0
}
6541
6542
// Generated as internal constructor for term x64_punpcklwd.
6543
0
pub fn constructor_x64_punpcklwd<C: Context>(
6544
0
    ctx: &mut C,
6545
0
    arg0: Xmm,
6546
0
    arg1: &XmmMem,
6547
0
) -> Xmm {
6548
0
    let v5 = C::use_avx(ctx);
6549
0
    if v5 == true {
6550
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6551
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpcklwd, arg0, v7);
6552
0
        // Rule at src/isa/x64/inst.isle line 3232.
6553
0
        return v8;
6554
0
    }
6555
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6556
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpcklwd, arg0, v3);
6557
0
    // Rule at src/isa/x64/inst.isle line 3230.
6558
0
    return v4;
6559
0
}
6560
6561
// Generated as internal constructor for term x64_punpckldq.
6562
0
pub fn constructor_x64_punpckldq<C: Context>(
6563
0
    ctx: &mut C,
6564
0
    arg0: Xmm,
6565
0
    arg1: &XmmMem,
6566
0
) -> Xmm {
6567
0
    let v5 = C::use_avx(ctx);
6568
0
    if v5 == true {
6569
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6570
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckldq, arg0, v7);
6571
0
        // Rule at src/isa/x64/inst.isle line 3240.
6572
0
        return v8;
6573
0
    }
6574
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6575
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckldq, arg0, v3);
6576
0
    // Rule at src/isa/x64/inst.isle line 3238.
6577
0
    return v4;
6578
0
}
6579
6580
// Generated as internal constructor for term x64_punpckhdq.
6581
0
pub fn constructor_x64_punpckhdq<C: Context>(
6582
0
    ctx: &mut C,
6583
0
    arg0: Xmm,
6584
0
    arg1: &XmmMem,
6585
0
) -> Xmm {
6586
0
    let v5 = C::use_avx(ctx);
6587
0
    if v5 == true {
6588
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6589
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhdq, arg0, v7);
6590
0
        // Rule at src/isa/x64/inst.isle line 3248.
6591
0
        return v8;
6592
0
    }
6593
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6594
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhdq, arg0, v3);
6595
0
    // Rule at src/isa/x64/inst.isle line 3246.
6596
0
    return v4;
6597
0
}
6598
6599
// Generated as internal constructor for term x64_punpcklqdq.
6600
0
pub fn constructor_x64_punpcklqdq<C: Context>(
6601
0
    ctx: &mut C,
6602
0
    arg0: Xmm,
6603
0
    arg1: &XmmMem,
6604
0
) -> Xmm {
6605
0
    let v5 = C::use_avx(ctx);
6606
0
    if v5 == true {
6607
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6608
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpcklqdq, arg0, v7);
6609
0
        // Rule at src/isa/x64/inst.isle line 3256.
6610
0
        return v8;
6611
0
    }
6612
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6613
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpcklqdq, arg0, v3);
6614
0
    // Rule at src/isa/x64/inst.isle line 3254.
6615
0
    return v4;
6616
0
}
6617
6618
// Generated as internal constructor for term x64_punpckhqdq.
6619
0
pub fn constructor_x64_punpckhqdq<C: Context>(
6620
0
    ctx: &mut C,
6621
0
    arg0: Xmm,
6622
0
    arg1: &XmmMem,
6623
0
) -> Xmm {
6624
0
    let v5 = C::use_avx(ctx);
6625
0
    if v5 == true {
6626
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6627
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhqdq, arg0, v7);
6628
0
        // Rule at src/isa/x64/inst.isle line 3264.
6629
0
        return v8;
6630
0
    }
6631
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6632
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhqdq, arg0, v3);
6633
0
    // Rule at src/isa/x64/inst.isle line 3262.
6634
0
    return v4;
6635
0
}
6636
6637
// Generated as internal constructor for term x64_unpcklps.
6638
0
pub fn constructor_x64_unpcklps<C: Context>(
6639
0
    ctx: &mut C,
6640
0
    arg0: Xmm,
6641
0
    arg1: &XmmMem,
6642
0
) -> Xmm {
6643
0
    let v5 = C::use_avx(ctx);
6644
0
    if v5 == true {
6645
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6646
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vunpcklps, arg0, v7);
6647
0
        // Rule at src/isa/x64/inst.isle line 3272.
6648
0
        return v8;
6649
0
    }
6650
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6651
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Unpcklps, arg0, v3);
6652
0
    // Rule at src/isa/x64/inst.isle line 3270.
6653
0
    return v4;
6654
0
}
6655
6656
// Generated as internal constructor for term x64_unpckhps.
6657
0
pub fn constructor_x64_unpckhps<C: Context>(
6658
0
    ctx: &mut C,
6659
0
    arg0: Xmm,
6660
0
    arg1: &XmmMem,
6661
0
) -> Xmm {
6662
0
    let v5 = C::use_avx(ctx);
6663
0
    if v5 == true {
6664
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6665
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vunpckhps, arg0, v7);
6666
0
        // Rule at src/isa/x64/inst.isle line 3280.
6667
0
        return v8;
6668
0
    }
6669
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6670
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Unpckhps, arg0, v3);
6671
0
    // Rule at src/isa/x64/inst.isle line 3278.
6672
0
    return v4;
6673
0
}
6674
6675
// Generated as internal constructor for term x64_andnps.
6676
0
pub fn constructor_x64_andnps<C: Context>(
6677
0
    ctx: &mut C,
6678
0
    arg0: Xmm,
6679
0
    arg1: &XmmMem,
6680
0
) -> Xmm {
6681
0
    let v5 = C::use_avx(ctx);
6682
0
    if v5 == true {
6683
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6684
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandnps, arg0, v7);
6685
0
        // Rule at src/isa/x64/inst.isle line 3288.
6686
0
        return v8;
6687
0
    }
6688
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6689
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andnps, arg0, v3);
6690
0
    // Rule at src/isa/x64/inst.isle line 3286.
6691
0
    return v4;
6692
0
}
6693
6694
// Generated as internal constructor for term x64_andnpd.
6695
0
pub fn constructor_x64_andnpd<C: Context>(
6696
0
    ctx: &mut C,
6697
0
    arg0: Xmm,
6698
0
    arg1: &XmmMem,
6699
0
) -> Xmm {
6700
0
    let v5 = C::use_avx(ctx);
6701
0
    if v5 == true {
6702
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6703
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vandnpd, arg0, v7);
6704
0
        // Rule at src/isa/x64/inst.isle line 3296.
6705
0
        return v8;
6706
0
    }
6707
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6708
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Andnpd, arg0, v3);
6709
0
    // Rule at src/isa/x64/inst.isle line 3294.
6710
0
    return v4;
6711
0
}
6712
6713
// Generated as internal constructor for term x64_pandn.
6714
0
pub fn constructor_x64_pandn<C: Context>(
6715
0
    ctx: &mut C,
6716
0
    arg0: Xmm,
6717
0
    arg1: &XmmMem,
6718
0
) -> Xmm {
6719
0
    let v5 = C::use_avx(ctx);
6720
0
    if v5 == true {
6721
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6722
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpandn, arg0, v7);
6723
0
        // Rule at src/isa/x64/inst.isle line 3304.
6724
0
        return v8;
6725
0
    }
6726
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6727
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pandn, arg0, v3);
6728
0
    // Rule at src/isa/x64/inst.isle line 3302.
6729
0
    return v4;
6730
0
}
6731
6732
// Generated as internal constructor for term x64_addss.
6733
0
pub fn constructor_x64_addss<C: Context>(
6734
0
    ctx: &mut C,
6735
0
    arg0: Xmm,
6736
0
    arg1: &XmmMem,
6737
0
) -> Xmm {
6738
0
    let v4 = C::use_avx(ctx);
6739
0
    if v4 == true {
6740
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6741
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddss, arg0, v6);
6742
0
        // Rule at src/isa/x64/inst.isle line 3312.
6743
0
        return v7;
6744
0
    }
6745
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Addss, arg0, arg1);
6746
0
    // Rule at src/isa/x64/inst.isle line 3310.
6747
0
    return v3;
6748
0
}
6749
6750
// Generated as internal constructor for term x64_addsd.
6751
0
pub fn constructor_x64_addsd<C: Context>(
6752
0
    ctx: &mut C,
6753
0
    arg0: Xmm,
6754
0
    arg1: &XmmMem,
6755
0
) -> Xmm {
6756
0
    let v4 = C::use_avx(ctx);
6757
0
    if v4 == true {
6758
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6759
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddsd, arg0, v6);
6760
0
        // Rule at src/isa/x64/inst.isle line 3320.
6761
0
        return v7;
6762
0
    }
6763
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Addsd, arg0, arg1);
6764
0
    // Rule at src/isa/x64/inst.isle line 3318.
6765
0
    return v3;
6766
0
}
6767
6768
// Generated as internal constructor for term x64_addps.
6769
0
pub fn constructor_x64_addps<C: Context>(
6770
0
    ctx: &mut C,
6771
0
    arg0: Xmm,
6772
0
    arg1: &XmmMem,
6773
0
) -> Xmm {
6774
0
    let v5 = C::use_avx(ctx);
6775
0
    if v5 == true {
6776
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6777
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddps, arg0, v7);
6778
0
        // Rule at src/isa/x64/inst.isle line 3328.
6779
0
        return v8;
6780
0
    }
6781
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6782
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Addps, arg0, v3);
6783
0
    // Rule at src/isa/x64/inst.isle line 3326.
6784
0
    return v4;
6785
0
}
6786
6787
// Generated as internal constructor for term x64_addpd.
6788
0
pub fn constructor_x64_addpd<C: Context>(
6789
0
    ctx: &mut C,
6790
0
    arg0: Xmm,
6791
0
    arg1: &XmmMem,
6792
0
) -> Xmm {
6793
0
    let v5 = C::use_avx(ctx);
6794
0
    if v5 == true {
6795
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6796
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vaddpd, arg0, v7);
6797
0
        // Rule at src/isa/x64/inst.isle line 3336.
6798
0
        return v8;
6799
0
    }
6800
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6801
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Addpd, arg0, v3);
6802
0
    // Rule at src/isa/x64/inst.isle line 3334.
6803
0
    return v4;
6804
0
}
6805
6806
// Generated as internal constructor for term x64_subss.
6807
0
pub fn constructor_x64_subss<C: Context>(
6808
0
    ctx: &mut C,
6809
0
    arg0: Xmm,
6810
0
    arg1: &XmmMem,
6811
0
) -> Xmm {
6812
0
    let v4 = C::use_avx(ctx);
6813
0
    if v4 == true {
6814
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6815
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubss, arg0, v6);
6816
0
        // Rule at src/isa/x64/inst.isle line 3344.
6817
0
        return v7;
6818
0
    }
6819
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Subss, arg0, arg1);
6820
0
    // Rule at src/isa/x64/inst.isle line 3342.
6821
0
    return v3;
6822
0
}
6823
6824
// Generated as internal constructor for term x64_subsd.
6825
0
pub fn constructor_x64_subsd<C: Context>(
6826
0
    ctx: &mut C,
6827
0
    arg0: Xmm,
6828
0
    arg1: &XmmMem,
6829
0
) -> Xmm {
6830
0
    let v4 = C::use_avx(ctx);
6831
0
    if v4 == true {
6832
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6833
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubsd, arg0, v6);
6834
0
        // Rule at src/isa/x64/inst.isle line 3352.
6835
0
        return v7;
6836
0
    }
6837
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Subsd, arg0, arg1);
6838
0
    // Rule at src/isa/x64/inst.isle line 3350.
6839
0
    return v3;
6840
0
}
6841
6842
// Generated as internal constructor for term x64_subps.
6843
0
pub fn constructor_x64_subps<C: Context>(
6844
0
    ctx: &mut C,
6845
0
    arg0: Xmm,
6846
0
    arg1: &XmmMem,
6847
0
) -> Xmm {
6848
0
    let v5 = C::use_avx(ctx);
6849
0
    if v5 == true {
6850
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6851
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubps, arg0, v7);
6852
0
        // Rule at src/isa/x64/inst.isle line 3360.
6853
0
        return v8;
6854
0
    }
6855
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6856
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Subps, arg0, v3);
6857
0
    // Rule at src/isa/x64/inst.isle line 3358.
6858
0
    return v4;
6859
0
}
6860
6861
// Generated as internal constructor for term x64_subpd.
6862
0
pub fn constructor_x64_subpd<C: Context>(
6863
0
    ctx: &mut C,
6864
0
    arg0: Xmm,
6865
0
    arg1: &XmmMem,
6866
0
) -> Xmm {
6867
0
    let v5 = C::use_avx(ctx);
6868
0
    if v5 == true {
6869
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6870
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsubpd, arg0, v7);
6871
0
        // Rule at src/isa/x64/inst.isle line 3368.
6872
0
        return v8;
6873
0
    }
6874
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6875
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Subpd, arg0, v3);
6876
0
    // Rule at src/isa/x64/inst.isle line 3366.
6877
0
    return v4;
6878
0
}
6879
6880
// Generated as internal constructor for term x64_mulss.
6881
0
pub fn constructor_x64_mulss<C: Context>(
6882
0
    ctx: &mut C,
6883
0
    arg0: Xmm,
6884
0
    arg1: &XmmMem,
6885
0
) -> Xmm {
6886
0
    let v4 = C::use_avx(ctx);
6887
0
    if v4 == true {
6888
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6889
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulss, arg0, v6);
6890
0
        // Rule at src/isa/x64/inst.isle line 3376.
6891
0
        return v7;
6892
0
    }
6893
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Mulss, arg0, arg1);
6894
0
    // Rule at src/isa/x64/inst.isle line 3374.
6895
0
    return v3;
6896
0
}
6897
6898
// Generated as internal constructor for term x64_mulsd.
6899
0
pub fn constructor_x64_mulsd<C: Context>(
6900
0
    ctx: &mut C,
6901
0
    arg0: Xmm,
6902
0
    arg1: &XmmMem,
6903
0
) -> Xmm {
6904
0
    let v4 = C::use_avx(ctx);
6905
0
    if v4 == true {
6906
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6907
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulsd, arg0, v6);
6908
0
        // Rule at src/isa/x64/inst.isle line 3384.
6909
0
        return v7;
6910
0
    }
6911
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Mulsd, arg0, arg1);
6912
0
    // Rule at src/isa/x64/inst.isle line 3382.
6913
0
    return v3;
6914
0
}
6915
6916
// Generated as internal constructor for term x64_mulps.
6917
0
pub fn constructor_x64_mulps<C: Context>(
6918
0
    ctx: &mut C,
6919
0
    arg0: Xmm,
6920
0
    arg1: &XmmMem,
6921
0
) -> Xmm {
6922
0
    let v5 = C::use_avx(ctx);
6923
0
    if v5 == true {
6924
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6925
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulps, arg0, v7);
6926
0
        // Rule at src/isa/x64/inst.isle line 3392.
6927
0
        return v8;
6928
0
    }
6929
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6930
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Mulps, arg0, v3);
6931
0
    // Rule at src/isa/x64/inst.isle line 3390.
6932
0
    return v4;
6933
0
}
6934
6935
// Generated as internal constructor for term x64_mulpd.
6936
0
pub fn constructor_x64_mulpd<C: Context>(
6937
0
    ctx: &mut C,
6938
0
    arg0: Xmm,
6939
0
    arg1: &XmmMem,
6940
0
) -> Xmm {
6941
0
    let v5 = C::use_avx(ctx);
6942
0
    if v5 == true {
6943
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6944
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmulpd, arg0, v7);
6945
0
        // Rule at src/isa/x64/inst.isle line 3400.
6946
0
        return v8;
6947
0
    }
6948
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
6949
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Mulpd, arg0, v3);
6950
0
    // Rule at src/isa/x64/inst.isle line 3398.
6951
0
    return v4;
6952
0
}
6953
6954
// Generated as internal constructor for term x64_divss.
6955
0
pub fn constructor_x64_divss<C: Context>(
6956
0
    ctx: &mut C,
6957
0
    arg0: Xmm,
6958
0
    arg1: &XmmMem,
6959
0
) -> Xmm {
6960
0
    let v4 = C::use_avx(ctx);
6961
0
    if v4 == true {
6962
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6963
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivss, arg0, v6);
6964
0
        // Rule at src/isa/x64/inst.isle line 3408.
6965
0
        return v7;
6966
0
    }
6967
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Divss, arg0, arg1);
6968
0
    // Rule at src/isa/x64/inst.isle line 3406.
6969
0
    return v3;
6970
0
}
6971
6972
// Generated as internal constructor for term x64_divsd.
6973
0
pub fn constructor_x64_divsd<C: Context>(
6974
0
    ctx: &mut C,
6975
0
    arg0: Xmm,
6976
0
    arg1: &XmmMem,
6977
0
) -> Xmm {
6978
0
    let v4 = C::use_avx(ctx);
6979
0
    if v4 == true {
6980
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6981
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivsd, arg0, v6);
6982
0
        // Rule at src/isa/x64/inst.isle line 3416.
6983
0
        return v7;
6984
0
    }
6985
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Divsd, arg0, arg1);
6986
0
    // Rule at src/isa/x64/inst.isle line 3414.
6987
0
    return v3;
6988
0
}
6989
6990
// Generated as internal constructor for term x64_divps.
6991
0
pub fn constructor_x64_divps<C: Context>(
6992
0
    ctx: &mut C,
6993
0
    arg0: Xmm,
6994
0
    arg1: &XmmMem,
6995
0
) -> Xmm {
6996
0
    let v5 = C::use_avx(ctx);
6997
0
    if v5 == true {
6998
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
6999
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivps, arg0, v7);
7000
0
        // Rule at src/isa/x64/inst.isle line 3424.
7001
0
        return v8;
7002
0
    }
7003
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7004
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Divps, arg0, v3);
7005
0
    // Rule at src/isa/x64/inst.isle line 3422.
7006
0
    return v4;
7007
0
}
7008
7009
// Generated as internal constructor for term x64_divpd.
7010
0
pub fn constructor_x64_divpd<C: Context>(
7011
0
    ctx: &mut C,
7012
0
    arg0: Xmm,
7013
0
    arg1: &XmmMem,
7014
0
) -> Xmm {
7015
0
    let v5 = C::use_avx(ctx);
7016
0
    if v5 == true {
7017
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7018
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vdivpd, arg0, v7);
7019
0
        // Rule at src/isa/x64/inst.isle line 3432.
7020
0
        return v8;
7021
0
    }
7022
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7023
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Divpd, arg0, v3);
7024
0
    // Rule at src/isa/x64/inst.isle line 3430.
7025
0
    return v4;
7026
0
}
7027
7028
// Generated as internal constructor for term x64_blendvpd.
7029
0
pub fn constructor_x64_blendvpd<C: Context>(
7030
0
    ctx: &mut C,
7031
0
    arg0: Xmm,
7032
0
    arg1: &XmmMem,
7033
0
    arg2: Xmm,
7034
0
) -> Xmm {
7035
0
    let v6 = C::use_avx(ctx);
7036
0
    if v6 == true {
7037
0
        let v8 = constructor_xmm_rmr_blend_vex(ctx, &AvxOpcode::Vblendvpd, arg0, arg1, arg2);
7038
0
        // Rule at src/isa/x64/inst.isle line 3440.
7039
0
        return v8;
7040
0
    }
7041
0
    let v4 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7042
0
    let v5 = constructor_xmm_rm_r_blend(ctx, &SseOpcode::Blendvpd, arg0, v4, arg2);
7043
0
    // Rule at src/isa/x64/inst.isle line 3438.
7044
0
    return v5;
7045
0
}
7046
7047
// Generated as internal constructor for term x64_blendvps.
7048
0
pub fn constructor_x64_blendvps<C: Context>(
7049
0
    ctx: &mut C,
7050
0
    arg0: Xmm,
7051
0
    arg1: &XmmMem,
7052
0
    arg2: Xmm,
7053
0
) -> Xmm {
7054
0
    let v6 = C::use_avx(ctx);
7055
0
    if v6 == true {
7056
0
        let v8 = constructor_xmm_rmr_blend_vex(ctx, &AvxOpcode::Vblendvps, arg0, arg1, arg2);
7057
0
        // Rule at src/isa/x64/inst.isle line 3448.
7058
0
        return v8;
7059
0
    }
7060
0
    let v4 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7061
0
    let v5 = constructor_xmm_rm_r_blend(ctx, &SseOpcode::Blendvps, arg0, v4, arg2);
7062
0
    // Rule at src/isa/x64/inst.isle line 3446.
7063
0
    return v5;
7064
0
}
7065
7066
// Generated as internal constructor for term x64_pblendvb.
7067
0
pub fn constructor_x64_pblendvb<C: Context>(
7068
0
    ctx: &mut C,
7069
0
    arg0: Xmm,
7070
0
    arg1: &XmmMem,
7071
0
    arg2: Xmm,
7072
0
) -> Xmm {
7073
0
    let v6 = C::use_avx(ctx);
7074
0
    if v6 == true {
7075
0
        let v8 = constructor_xmm_rmr_blend_vex(ctx, &AvxOpcode::Vpblendvb, arg0, arg1, arg2);
7076
0
        // Rule at src/isa/x64/inst.isle line 3456.
7077
0
        return v8;
7078
0
    }
7079
0
    let v4 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7080
0
    let v5 = constructor_xmm_rm_r_blend(ctx, &SseOpcode::Pblendvb, arg0, v4, arg2);
7081
0
    // Rule at src/isa/x64/inst.isle line 3454.
7082
0
    return v5;
7083
0
}
7084
7085
// Generated as internal constructor for term x64_pblendw.
7086
0
pub fn constructor_x64_pblendw<C: Context>(
7087
0
    ctx: &mut C,
7088
0
    arg0: Xmm,
7089
0
    arg1: &XmmMem,
7090
0
    arg2: u8,
7091
0
) -> Xmm {
7092
0
    let v8 = C::use_avx(ctx);
7093
0
    if v8 == true {
7094
0
        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vpblendw, arg0, arg1, arg2);
7095
0
        // Rule at src/isa/x64/inst.isle line 3464.
7096
0
        return v10;
7097
0
    }
7098
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7099
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
7100
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pblendw, v4, v5, arg2, &OperandSize::Size32);
7101
0
    // Rule at src/isa/x64/inst.isle line 3462.
7102
0
    return v7;
7103
0
}
7104
7105
// Generated as internal constructor for term x64_movsd_regmove.
7106
0
pub fn constructor_x64_movsd_regmove<C: Context>(
7107
0
    ctx: &mut C,
7108
0
    arg0: Xmm,
7109
0
    arg1: Xmm,
7110
0
) -> Xmm {
7111
0
    let v5 = C::use_avx(ctx);
7112
0
    if v5 == true {
7113
0
        let v7 = &C::xmm_to_xmm_mem_imm(ctx, arg1);
7114
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmovsd, arg0, v7);
7115
0
        // Rule at src/isa/x64/inst.isle line 3479.
7116
0
        return v8;
7117
0
    }
7118
0
    let v3 = &C::xmm_to_xmm_mem(ctx, arg1);
7119
0
    let v4 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Movsd, arg0, v3);
7120
0
    // Rule at src/isa/x64/inst.isle line 3477.
7121
0
    return v4;
7122
0
}
7123
7124
// Generated as internal constructor for term x64_movss_regmove.
7125
0
pub fn constructor_x64_movss_regmove<C: Context>(
7126
0
    ctx: &mut C,
7127
0
    arg0: Xmm,
7128
0
    arg1: Xmm,
7129
0
) -> Xmm {
7130
0
    let v5 = C::use_avx(ctx);
7131
0
    if v5 == true {
7132
0
        let v7 = &C::xmm_to_xmm_mem_imm(ctx, arg1);
7133
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmovss, arg0, v7);
7134
0
        // Rule at src/isa/x64/inst.isle line 3486.
7135
0
        return v8;
7136
0
    }
7137
0
    let v3 = &C::xmm_to_xmm_mem(ctx, arg1);
7138
0
    let v4 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Movss, arg0, v3);
7139
0
    // Rule at src/isa/x64/inst.isle line 3484.
7140
0
    return v4;
7141
0
}
7142
7143
// Generated as internal constructor for term x64_movlhps.
7144
0
pub fn constructor_x64_movlhps<C: Context>(
7145
0
    ctx: &mut C,
7146
0
    arg0: Xmm,
7147
0
    arg1: &XmmMem,
7148
0
) -> Xmm {
7149
0
    let v5 = C::use_avx(ctx);
7150
0
    if v5 == true {
7151
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7152
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmovlhps, arg0, v7);
7153
0
        // Rule at src/isa/x64/inst.isle line 3494.
7154
0
        return v8;
7155
0
    }
7156
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7157
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Movlhps, arg0, v3);
7158
0
    // Rule at src/isa/x64/inst.isle line 3492.
7159
0
    return v4;
7160
0
}
7161
7162
// Generated as internal constructor for term x64_pmaxs.
7163
0
pub fn constructor_x64_pmaxs<C: Context>(
7164
0
    ctx: &mut C,
7165
0
    arg0: Type,
7166
0
    arg1: Xmm,
7167
0
    arg2: &XmmMem,
7168
0
) -> Xmm {
7169
0
    match arg0 {
7170
        I8X16 => {
7171
0
            let v3 = constructor_x64_pmaxsb(ctx, arg1, arg2);
7172
0
            // Rule at src/isa/x64/inst.isle line 3500.
7173
0
            return v3;
7174
        }
7175
        I16X8 => {
7176
0
            let v4 = constructor_x64_pmaxsw(ctx, arg1, arg2);
7177
0
            // Rule at src/isa/x64/inst.isle line 3501.
7178
0
            return v4;
7179
        }
7180
        I32X4 => {
7181
0
            let v5 = constructor_x64_pmaxsd(ctx, arg1, arg2);
7182
0
            // Rule at src/isa/x64/inst.isle line 3502.
7183
0
            return v5;
7184
        }
7185
0
        _ => {}
7186
0
    }
7187
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pmaxs", "src/isa/x64/inst.isle line 3499")
7188
0
}
7189
7190
// Generated as internal constructor for term x64_pmaxsb.
7191
0
pub fn constructor_x64_pmaxsb<C: Context>(
7192
0
    ctx: &mut C,
7193
0
    arg0: Xmm,
7194
0
    arg1: &XmmMem,
7195
0
) -> Xmm {
7196
0
    let v5 = C::use_avx(ctx);
7197
0
    if v5 == true {
7198
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7199
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxsb, arg0, v7);
7200
0
        // Rule at src/isa/x64/inst.isle line 3506.
7201
0
        return v8;
7202
0
    }
7203
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7204
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxsb, arg0, v3);
7205
0
    // Rule at src/isa/x64/inst.isle line 3505.
7206
0
    return v4;
7207
0
}
7208
7209
// Generated as internal constructor for term x64_pmaxsw.
7210
0
pub fn constructor_x64_pmaxsw<C: Context>(
7211
0
    ctx: &mut C,
7212
0
    arg0: Xmm,
7213
0
    arg1: &XmmMem,
7214
0
) -> Xmm {
7215
0
    let v5 = C::use_avx(ctx);
7216
0
    if v5 == true {
7217
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7218
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxsw, arg0, v7);
7219
0
        // Rule at src/isa/x64/inst.isle line 3511.
7220
0
        return v8;
7221
0
    }
7222
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7223
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxsw, arg0, v3);
7224
0
    // Rule at src/isa/x64/inst.isle line 3510.
7225
0
    return v4;
7226
0
}
7227
7228
// Generated as internal constructor for term x64_pmaxsd.
7229
0
pub fn constructor_x64_pmaxsd<C: Context>(
7230
0
    ctx: &mut C,
7231
0
    arg0: Xmm,
7232
0
    arg1: &XmmMem,
7233
0
) -> Xmm {
7234
0
    let v5 = C::use_avx(ctx);
7235
0
    if v5 == true {
7236
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7237
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxsd, arg0, v7);
7238
0
        // Rule at src/isa/x64/inst.isle line 3516.
7239
0
        return v8;
7240
0
    }
7241
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7242
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxsd, arg0, v3);
7243
0
    // Rule at src/isa/x64/inst.isle line 3515.
7244
0
    return v4;
7245
0
}
7246
7247
// Generated as internal constructor for term x64_pmins.
7248
0
pub fn constructor_x64_pmins<C: Context>(
7249
0
    ctx: &mut C,
7250
0
    arg0: Type,
7251
0
    arg1: Xmm,
7252
0
    arg2: &XmmMem,
7253
0
) -> Xmm {
7254
0
    match arg0 {
7255
        I8X16 => {
7256
0
            let v3 = constructor_x64_pminsb(ctx, arg1, arg2);
7257
0
            // Rule at src/isa/x64/inst.isle line 3522.
7258
0
            return v3;
7259
        }
7260
        I16X8 => {
7261
0
            let v4 = constructor_x64_pminsw(ctx, arg1, arg2);
7262
0
            // Rule at src/isa/x64/inst.isle line 3523.
7263
0
            return v4;
7264
        }
7265
        I32X4 => {
7266
0
            let v5 = constructor_x64_pminsd(ctx, arg1, arg2);
7267
0
            // Rule at src/isa/x64/inst.isle line 3524.
7268
0
            return v5;
7269
        }
7270
0
        _ => {}
7271
0
    }
7272
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pmins", "src/isa/x64/inst.isle line 3521")
7273
0
}
7274
7275
// Generated as internal constructor for term x64_pminsb.
7276
0
pub fn constructor_x64_pminsb<C: Context>(
7277
0
    ctx: &mut C,
7278
0
    arg0: Xmm,
7279
0
    arg1: &XmmMem,
7280
0
) -> Xmm {
7281
0
    let v5 = C::use_avx(ctx);
7282
0
    if v5 == true {
7283
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7284
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminsb, arg0, v7);
7285
0
        // Rule at src/isa/x64/inst.isle line 3528.
7286
0
        return v8;
7287
0
    }
7288
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7289
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminsb, arg0, v3);
7290
0
    // Rule at src/isa/x64/inst.isle line 3527.
7291
0
    return v4;
7292
0
}
7293
7294
// Generated as internal constructor for term x64_pminsw.
7295
0
pub fn constructor_x64_pminsw<C: Context>(
7296
0
    ctx: &mut C,
7297
0
    arg0: Xmm,
7298
0
    arg1: &XmmMem,
7299
0
) -> Xmm {
7300
0
    let v5 = C::use_avx(ctx);
7301
0
    if v5 == true {
7302
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7303
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminsw, arg0, v7);
7304
0
        // Rule at src/isa/x64/inst.isle line 3533.
7305
0
        return v8;
7306
0
    }
7307
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7308
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminsw, arg0, v3);
7309
0
    // Rule at src/isa/x64/inst.isle line 3532.
7310
0
    return v4;
7311
0
}
7312
7313
// Generated as internal constructor for term x64_pminsd.
7314
0
pub fn constructor_x64_pminsd<C: Context>(
7315
0
    ctx: &mut C,
7316
0
    arg0: Xmm,
7317
0
    arg1: &XmmMem,
7318
0
) -> Xmm {
7319
0
    let v5 = C::use_avx(ctx);
7320
0
    if v5 == true {
7321
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7322
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminsd, arg0, v7);
7323
0
        // Rule at src/isa/x64/inst.isle line 3538.
7324
0
        return v8;
7325
0
    }
7326
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7327
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminsd, arg0, v3);
7328
0
    // Rule at src/isa/x64/inst.isle line 3537.
7329
0
    return v4;
7330
0
}
7331
7332
// Generated as internal constructor for term x64_pmaxu.
7333
0
pub fn constructor_x64_pmaxu<C: Context>(
7334
0
    ctx: &mut C,
7335
0
    arg0: Type,
7336
0
    arg1: Xmm,
7337
0
    arg2: &XmmMem,
7338
0
) -> Xmm {
7339
0
    match arg0 {
7340
        I8X16 => {
7341
0
            let v3 = constructor_x64_pmaxub(ctx, arg1, arg2);
7342
0
            // Rule at src/isa/x64/inst.isle line 3544.
7343
0
            return v3;
7344
        }
7345
        I16X8 => {
7346
0
            let v4 = constructor_x64_pmaxuw(ctx, arg1, arg2);
7347
0
            // Rule at src/isa/x64/inst.isle line 3545.
7348
0
            return v4;
7349
        }
7350
        I32X4 => {
7351
0
            let v5 = constructor_x64_pmaxud(ctx, arg1, arg2);
7352
0
            // Rule at src/isa/x64/inst.isle line 3546.
7353
0
            return v5;
7354
        }
7355
0
        _ => {}
7356
0
    }
7357
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pmaxu", "src/isa/x64/inst.isle line 3543")
7358
0
}
7359
7360
// Generated as internal constructor for term x64_pmaxub.
7361
0
pub fn constructor_x64_pmaxub<C: Context>(
7362
0
    ctx: &mut C,
7363
0
    arg0: Xmm,
7364
0
    arg1: &XmmMem,
7365
0
) -> Xmm {
7366
0
    let v5 = C::use_avx(ctx);
7367
0
    if v5 == true {
7368
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7369
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxub, arg0, v7);
7370
0
        // Rule at src/isa/x64/inst.isle line 3550.
7371
0
        return v8;
7372
0
    }
7373
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7374
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxub, arg0, v3);
7375
0
    // Rule at src/isa/x64/inst.isle line 3549.
7376
0
    return v4;
7377
0
}
7378
7379
// Generated as internal constructor for term x64_pmaxuw.
7380
0
pub fn constructor_x64_pmaxuw<C: Context>(
7381
0
    ctx: &mut C,
7382
0
    arg0: Xmm,
7383
0
    arg1: &XmmMem,
7384
0
) -> Xmm {
7385
0
    let v5 = C::use_avx(ctx);
7386
0
    if v5 == true {
7387
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7388
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxuw, arg0, v7);
7389
0
        // Rule at src/isa/x64/inst.isle line 3555.
7390
0
        return v8;
7391
0
    }
7392
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7393
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxuw, arg0, v3);
7394
0
    // Rule at src/isa/x64/inst.isle line 3554.
7395
0
    return v4;
7396
0
}
7397
7398
// Generated as internal constructor for term x64_pmaxud.
7399
0
pub fn constructor_x64_pmaxud<C: Context>(
7400
0
    ctx: &mut C,
7401
0
    arg0: Xmm,
7402
0
    arg1: &XmmMem,
7403
0
) -> Xmm {
7404
0
    let v5 = C::use_avx(ctx);
7405
0
    if v5 == true {
7406
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7407
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaxud, arg0, v7);
7408
0
        // Rule at src/isa/x64/inst.isle line 3560.
7409
0
        return v8;
7410
0
    }
7411
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7412
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaxud, arg0, v3);
7413
0
    // Rule at src/isa/x64/inst.isle line 3559.
7414
0
    return v4;
7415
0
}
7416
7417
// Generated as internal constructor for term x64_pminu.
7418
0
pub fn constructor_x64_pminu<C: Context>(
7419
0
    ctx: &mut C,
7420
0
    arg0: Type,
7421
0
    arg1: Xmm,
7422
0
    arg2: &XmmMem,
7423
0
) -> Xmm {
7424
0
    match arg0 {
7425
        I8X16 => {
7426
0
            let v3 = constructor_x64_pminub(ctx, arg1, arg2);
7427
0
            // Rule at src/isa/x64/inst.isle line 3566.
7428
0
            return v3;
7429
        }
7430
        I16X8 => {
7431
0
            let v4 = constructor_x64_pminuw(ctx, arg1, arg2);
7432
0
            // Rule at src/isa/x64/inst.isle line 3567.
7433
0
            return v4;
7434
        }
7435
        I32X4 => {
7436
0
            let v5 = constructor_x64_pminud(ctx, arg1, arg2);
7437
0
            // Rule at src/isa/x64/inst.isle line 3568.
7438
0
            return v5;
7439
        }
7440
0
        _ => {}
7441
0
    }
7442
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pminu", "src/isa/x64/inst.isle line 3565")
7443
0
}
7444
7445
// Generated as internal constructor for term x64_pminub.
7446
0
pub fn constructor_x64_pminub<C: Context>(
7447
0
    ctx: &mut C,
7448
0
    arg0: Xmm,
7449
0
    arg1: &XmmMem,
7450
0
) -> Xmm {
7451
0
    let v5 = C::use_avx(ctx);
7452
0
    if v5 == true {
7453
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7454
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminub, arg0, v7);
7455
0
        // Rule at src/isa/x64/inst.isle line 3572.
7456
0
        return v8;
7457
0
    }
7458
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7459
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminub, arg0, v3);
7460
0
    // Rule at src/isa/x64/inst.isle line 3571.
7461
0
    return v4;
7462
0
}
7463
7464
// Generated as internal constructor for term x64_pminuw.
7465
0
pub fn constructor_x64_pminuw<C: Context>(
7466
0
    ctx: &mut C,
7467
0
    arg0: Xmm,
7468
0
    arg1: &XmmMem,
7469
0
) -> Xmm {
7470
0
    let v5 = C::use_avx(ctx);
7471
0
    if v5 == true {
7472
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7473
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminuw, arg0, v7);
7474
0
        // Rule at src/isa/x64/inst.isle line 3577.
7475
0
        return v8;
7476
0
    }
7477
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7478
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminuw, arg0, v3);
7479
0
    // Rule at src/isa/x64/inst.isle line 3576.
7480
0
    return v4;
7481
0
}
7482
7483
// Generated as internal constructor for term x64_pminud.
7484
0
pub fn constructor_x64_pminud<C: Context>(
7485
0
    ctx: &mut C,
7486
0
    arg0: Xmm,
7487
0
    arg1: &XmmMem,
7488
0
) -> Xmm {
7489
0
    let v5 = C::use_avx(ctx);
7490
0
    if v5 == true {
7491
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7492
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpminud, arg0, v7);
7493
0
        // Rule at src/isa/x64/inst.isle line 3582.
7494
0
        return v8;
7495
0
    }
7496
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7497
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pminud, arg0, v3);
7498
0
    // Rule at src/isa/x64/inst.isle line 3581.
7499
0
    return v4;
7500
0
}
7501
7502
// Generated as internal constructor for term x64_punpcklbw.
7503
0
pub fn constructor_x64_punpcklbw<C: Context>(
7504
0
    ctx: &mut C,
7505
0
    arg0: Xmm,
7506
0
    arg1: &XmmMem,
7507
0
) -> Xmm {
7508
0
    let v5 = C::use_avx(ctx);
7509
0
    if v5 == true {
7510
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7511
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpcklbw, arg0, v7);
7512
0
        // Rule at src/isa/x64/inst.isle line 3590.
7513
0
        return v8;
7514
0
    }
7515
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7516
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpcklbw, arg0, v3);
7517
0
    // Rule at src/isa/x64/inst.isle line 3588.
7518
0
    return v4;
7519
0
}
7520
7521
// Generated as internal constructor for term x64_punpckhbw.
7522
0
pub fn constructor_x64_punpckhbw<C: Context>(
7523
0
    ctx: &mut C,
7524
0
    arg0: Xmm,
7525
0
    arg1: &XmmMem,
7526
0
) -> Xmm {
7527
0
    let v5 = C::use_avx(ctx);
7528
0
    if v5 == true {
7529
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7530
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpunpckhbw, arg0, v7);
7531
0
        // Rule at src/isa/x64/inst.isle line 3598.
7532
0
        return v8;
7533
0
    }
7534
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7535
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Punpckhbw, arg0, v3);
7536
0
    // Rule at src/isa/x64/inst.isle line 3596.
7537
0
    return v4;
7538
0
}
7539
7540
// Generated as internal constructor for term x64_packsswb.
7541
0
pub fn constructor_x64_packsswb<C: Context>(
7542
0
    ctx: &mut C,
7543
0
    arg0: Xmm,
7544
0
    arg1: &XmmMem,
7545
0
) -> Xmm {
7546
0
    let v5 = C::use_avx(ctx);
7547
0
    if v5 == true {
7548
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7549
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpacksswb, arg0, v7);
7550
0
        // Rule at src/isa/x64/inst.isle line 3606.
7551
0
        return v8;
7552
0
    }
7553
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7554
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packsswb, arg0, v3);
7555
0
    // Rule at src/isa/x64/inst.isle line 3604.
7556
0
    return v4;
7557
0
}
7558
7559
// Generated as internal constructor for term x64_packssdw.
7560
0
pub fn constructor_x64_packssdw<C: Context>(
7561
0
    ctx: &mut C,
7562
0
    arg0: Xmm,
7563
0
    arg1: &XmmMem,
7564
0
) -> Xmm {
7565
0
    let v5 = C::use_avx(ctx);
7566
0
    if v5 == true {
7567
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7568
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpackssdw, arg0, v7);
7569
0
        // Rule at src/isa/x64/inst.isle line 3614.
7570
0
        return v8;
7571
0
    }
7572
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7573
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packssdw, arg0, v3);
7574
0
    // Rule at src/isa/x64/inst.isle line 3612.
7575
0
    return v4;
7576
0
}
7577
7578
// Generated as internal constructor for term x64_packuswb.
7579
0
pub fn constructor_x64_packuswb<C: Context>(
7580
0
    ctx: &mut C,
7581
0
    arg0: Xmm,
7582
0
    arg1: &XmmMem,
7583
0
) -> Xmm {
7584
0
    let v5 = C::use_avx(ctx);
7585
0
    if v5 == true {
7586
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7587
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpackuswb, arg0, v7);
7588
0
        // Rule at src/isa/x64/inst.isle line 3622.
7589
0
        return v8;
7590
0
    }
7591
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7592
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packuswb, arg0, v3);
7593
0
    // Rule at src/isa/x64/inst.isle line 3620.
7594
0
    return v4;
7595
0
}
7596
7597
// Generated as internal constructor for term x64_packusdw.
7598
0
pub fn constructor_x64_packusdw<C: Context>(
7599
0
    ctx: &mut C,
7600
0
    arg0: Xmm,
7601
0
    arg1: &XmmMem,
7602
0
) -> Xmm {
7603
0
    let v5 = C::use_avx(ctx);
7604
0
    if v5 == true {
7605
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7606
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpackusdw, arg0, v7);
7607
0
        // Rule at src/isa/x64/inst.isle line 3630.
7608
0
        return v8;
7609
0
    }
7610
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7611
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Packusdw, arg0, v3);
7612
0
    // Rule at src/isa/x64/inst.isle line 3628.
7613
0
    return v4;
7614
0
}
7615
7616
// Generated as internal constructor for term x64_palignr.
7617
0
pub fn constructor_x64_palignr<C: Context>(
7618
0
    ctx: &mut C,
7619
0
    arg0: Xmm,
7620
0
    arg1: &XmmMem,
7621
0
    arg2: u8,
7622
0
) -> Xmm {
7623
0
    let v8 = C::use_avx(ctx);
7624
0
    if v8 == true {
7625
0
        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vpalignr, arg0, arg1, arg2);
7626
0
        // Rule at src/isa/x64/inst.isle line 3642.
7627
0
        return v10;
7628
0
    }
7629
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7630
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
7631
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Palignr, v4, v5, arg2, &OperandSize::Size32);
7632
0
    // Rule at src/isa/x64/inst.isle line 3636.
7633
0
    return v7;
7634
0
}
7635
7636
// Generated as internal constructor for term x64_cmpp.
7637
0
pub fn constructor_x64_cmpp<C: Context>(
7638
0
    ctx: &mut C,
7639
0
    arg0: Type,
7640
0
    arg1: Xmm,
7641
0
    arg2: &XmmMem,
7642
0
    arg3: &FcmpImm,
7643
0
) -> Xmm {
7644
0
    match arg0 {
7645
        F32X4 => {
7646
0
            let v4 = constructor_x64_cmpps(ctx, arg1, arg2, arg3);
7647
0
            // Rule at src/isa/x64/inst.isle line 3648.
7648
0
            return v4;
7649
        }
7650
        F64X2 => {
7651
0
            let v5 = constructor_x64_cmppd(ctx, arg1, arg2, arg3);
7652
0
            // Rule at src/isa/x64/inst.isle line 3649.
7653
0
            return v5;
7654
        }
7655
0
        _ => {}
7656
0
    }
7657
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_cmpp", "src/isa/x64/inst.isle line 3647")
7658
0
}
7659
7660
// Generated as internal constructor for term x64_cmpps.
7661
0
pub fn constructor_x64_cmpps<C: Context>(
7662
0
    ctx: &mut C,
7663
0
    arg0: Xmm,
7664
0
    arg1: &XmmMem,
7665
0
    arg2: &FcmpImm,
7666
0
) -> Xmm {
7667
0
    let v9 = C::use_avx(ctx);
7668
0
    if v9 == true {
7669
0
        let v11 = C::encode_fcmp_imm(ctx, arg2);
7670
0
        let v12 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vcmpps, arg0, arg1, v11);
7671
0
        // Rule at src/isa/x64/inst.isle line 3658.
7672
0
        return v12;
7673
0
    }
7674
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7675
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
7676
0
    let v6 = C::encode_fcmp_imm(ctx, arg2);
7677
0
    let v8 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Cmpps, v4, v5, v6, &OperandSize::Size32);
7678
0
    // Rule at src/isa/x64/inst.isle line 3652.
7679
0
    return v8;
7680
0
}
7681
7682
// Generated as internal constructor for term x64_cmppd.
7683
0
pub fn constructor_x64_cmppd<C: Context>(
7684
0
    ctx: &mut C,
7685
0
    arg0: Xmm,
7686
0
    arg1: &XmmMem,
7687
0
    arg2: &FcmpImm,
7688
0
) -> Xmm {
7689
0
    let v9 = C::use_avx(ctx);
7690
0
    if v9 == true {
7691
0
        let v11 = C::encode_fcmp_imm(ctx, arg2);
7692
0
        let v12 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vcmppd, arg0, arg1, v11);
7693
0
        // Rule at src/isa/x64/inst.isle line 3675.
7694
0
        return v12;
7695
0
    }
7696
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7697
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
7698
0
    let v6 = C::encode_fcmp_imm(ctx, arg2);
7699
0
    let v8 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Cmppd, v4, v5, v6, &OperandSize::Size32);
7700
0
    // Rule at src/isa/x64/inst.isle line 3669.
7701
0
    return v8;
7702
0
}
7703
7704
// Generated as internal constructor for term x64_pinsrb.
7705
0
pub fn constructor_x64_pinsrb<C: Context>(
7706
0
    ctx: &mut C,
7707
0
    arg0: Xmm,
7708
0
    arg1: &GprMem,
7709
0
    arg2: u8,
7710
0
) -> Xmm {
7711
0
    let v8 = C::use_avx(ctx);
7712
0
    if v8 == true {
7713
0
        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrb, arg0, arg1, arg2);
7714
0
        // Rule at src/isa/x64/inst.isle line 3690.
7715
0
        return v10;
7716
0
    }
7717
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7718
0
    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
7719
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrb, v4, v5, arg2, &OperandSize::Size32);
7720
0
    // Rule at src/isa/x64/inst.isle line 3684.
7721
0
    return v7;
7722
0
}
7723
7724
// Generated as internal constructor for term x64_pinsrw.
7725
0
pub fn constructor_x64_pinsrw<C: Context>(
7726
0
    ctx: &mut C,
7727
0
    arg0: Xmm,
7728
0
    arg1: &GprMem,
7729
0
    arg2: u8,
7730
0
) -> Xmm {
7731
0
    let v8 = C::use_avx(ctx);
7732
0
    if v8 == true {
7733
0
        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrw, arg0, arg1, arg2);
7734
0
        // Rule at src/isa/x64/inst.isle line 3702.
7735
0
        return v10;
7736
0
    }
7737
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7738
0
    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
7739
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrw, v4, v5, arg2, &OperandSize::Size32);
7740
0
    // Rule at src/isa/x64/inst.isle line 3696.
7741
0
    return v7;
7742
0
}
7743
7744
// Generated as internal constructor for term x64_pinsrd.
7745
0
pub fn constructor_x64_pinsrd<C: Context>(
7746
0
    ctx: &mut C,
7747
0
    arg0: Xmm,
7748
0
    arg1: &GprMem,
7749
0
    arg2: u8,
7750
0
) -> Xmm {
7751
0
    let v8 = C::use_avx(ctx);
7752
0
    if v8 == true {
7753
0
        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrd, arg0, arg1, arg2);
7754
0
        // Rule at src/isa/x64/inst.isle line 3714.
7755
0
        return v10;
7756
0
    }
7757
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7758
0
    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
7759
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrd, v4, v5, arg2, &OperandSize::Size32);
7760
0
    // Rule at src/isa/x64/inst.isle line 3708.
7761
0
    return v7;
7762
0
}
7763
7764
// Generated as internal constructor for term x64_pinsrq.
7765
0
pub fn constructor_x64_pinsrq<C: Context>(
7766
0
    ctx: &mut C,
7767
0
    arg0: Xmm,
7768
0
    arg1: &GprMem,
7769
0
    arg2: u8,
7770
0
) -> Xmm {
7771
0
    let v8 = C::use_avx(ctx);
7772
0
    if v8 == true {
7773
0
        let v10 = constructor_xmm_vex_pinsr(ctx, &AvxOpcode::Vpinsrq, arg0, arg1, arg2);
7774
0
        // Rule at src/isa/x64/inst.isle line 3726.
7775
0
        return v10;
7776
0
    }
7777
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7778
0
    let v5 = &C::gpr_mem_to_reg_mem(ctx, arg1);
7779
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Pinsrd, v4, v5, arg2, &OperandSize::Size64);
7780
0
    // Rule at src/isa/x64/inst.isle line 3720.
7781
0
    return v7;
7782
0
}
7783
7784
// Generated as internal constructor for term x64_roundss.
7785
0
pub fn constructor_x64_roundss<C: Context>(
7786
0
    ctx: &mut C,
7787
0
    arg0: &XmmMem,
7788
0
    arg1: &RoundImm,
7789
0
) -> Xmm {
7790
0
    let v6 = C::use_avx(ctx);
7791
0
    if v6 == true {
7792
0
        let v8 = C::encode_round_imm(ctx, arg1);
7793
0
        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundss, arg0, v8);
7794
0
        // Rule at src/isa/x64/inst.isle line 3734.
7795
0
        return v9;
7796
0
    }
7797
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7798
0
    let v4 = C::encode_round_imm(ctx, arg1);
7799
0
    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundss, v3, v4);
7800
0
    // Rule at src/isa/x64/inst.isle line 3732.
7801
0
    return v5;
7802
0
}
7803
7804
// Generated as internal constructor for term x64_roundsd.
7805
0
pub fn constructor_x64_roundsd<C: Context>(
7806
0
    ctx: &mut C,
7807
0
    arg0: &XmmMem,
7808
0
    arg1: &RoundImm,
7809
0
) -> Xmm {
7810
0
    let v6 = C::use_avx(ctx);
7811
0
    if v6 == true {
7812
0
        let v8 = C::encode_round_imm(ctx, arg1);
7813
0
        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundsd, arg0, v8);
7814
0
        // Rule at src/isa/x64/inst.isle line 3742.
7815
0
        return v9;
7816
0
    }
7817
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7818
0
    let v4 = C::encode_round_imm(ctx, arg1);
7819
0
    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundsd, v3, v4);
7820
0
    // Rule at src/isa/x64/inst.isle line 3740.
7821
0
    return v5;
7822
0
}
7823
7824
// Generated as internal constructor for term x64_roundps.
7825
0
pub fn constructor_x64_roundps<C: Context>(
7826
0
    ctx: &mut C,
7827
0
    arg0: &XmmMem,
7828
0
    arg1: &RoundImm,
7829
0
) -> Xmm {
7830
0
    let v6 = C::use_avx(ctx);
7831
0
    if v6 == true {
7832
0
        let v8 = C::encode_round_imm(ctx, arg1);
7833
0
        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundps, arg0, v8);
7834
0
        // Rule at src/isa/x64/inst.isle line 3750.
7835
0
        return v9;
7836
0
    }
7837
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7838
0
    let v4 = C::encode_round_imm(ctx, arg1);
7839
0
    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundps, v3, v4);
7840
0
    // Rule at src/isa/x64/inst.isle line 3748.
7841
0
    return v5;
7842
0
}
7843
7844
// Generated as internal constructor for term x64_roundpd.
7845
0
pub fn constructor_x64_roundpd<C: Context>(
7846
0
    ctx: &mut C,
7847
0
    arg0: &XmmMem,
7848
0
    arg1: &RoundImm,
7849
0
) -> Xmm {
7850
0
    let v6 = C::use_avx(ctx);
7851
0
    if v6 == true {
7852
0
        let v8 = C::encode_round_imm(ctx, arg1);
7853
0
        let v9 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vroundpd, arg0, v8);
7854
0
        // Rule at src/isa/x64/inst.isle line 3758.
7855
0
        return v9;
7856
0
    }
7857
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7858
0
    let v4 = C::encode_round_imm(ctx, arg1);
7859
0
    let v5 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Roundpd, v3, v4);
7860
0
    // Rule at src/isa/x64/inst.isle line 3756.
7861
0
    return v5;
7862
0
}
7863
7864
// Generated as internal constructor for term x64_pmaddwd.
7865
0
pub fn constructor_x64_pmaddwd<C: Context>(
7866
0
    ctx: &mut C,
7867
0
    arg0: Xmm,
7868
0
    arg1: &XmmMem,
7869
0
) -> Xmm {
7870
0
    let v5 = C::use_avx(ctx);
7871
0
    if v5 == true {
7872
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7873
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaddwd, arg0, v7);
7874
0
        // Rule at src/isa/x64/inst.isle line 3766.
7875
0
        return v8;
7876
0
    }
7877
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7878
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaddwd, arg0, v3);
7879
0
    // Rule at src/isa/x64/inst.isle line 3764.
7880
0
    return v4;
7881
0
}
7882
7883
// Generated as internal constructor for term x64_pmaddubsw.
7884
0
pub fn constructor_x64_pmaddubsw<C: Context>(
7885
0
    ctx: &mut C,
7886
0
    arg0: Xmm,
7887
0
    arg1: &XmmMem,
7888
0
) -> Xmm {
7889
0
    let v5 = C::use_avx(ctx);
7890
0
    if v5 == true {
7891
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7892
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpmaddubsw, arg0, v7);
7893
0
        // Rule at src/isa/x64/inst.isle line 3773.
7894
0
        return v8;
7895
0
    }
7896
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7897
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pmaddubsw, arg0, v3);
7898
0
    // Rule at src/isa/x64/inst.isle line 3771.
7899
0
    return v4;
7900
0
}
7901
7902
// Generated as internal constructor for term x64_insertps.
7903
0
pub fn constructor_x64_insertps<C: Context>(
7904
0
    ctx: &mut C,
7905
0
    arg0: Xmm,
7906
0
    arg1: &XmmMem,
7907
0
    arg2: u8,
7908
0
) -> Xmm {
7909
0
    let v8 = C::use_avx(ctx);
7910
0
    if v8 == true {
7911
0
        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vinsertps, arg0, arg1, arg2);
7912
0
        // Rule at src/isa/x64/inst.isle line 3785.
7913
0
        return v10;
7914
0
    }
7915
0
    let v4 = C::xmm_to_reg(ctx, arg0);
7916
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
7917
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Insertps, v4, v5, arg2, &OperandSize::Size32);
7918
0
    // Rule at src/isa/x64/inst.isle line 3779.
7919
0
    return v7;
7920
0
}
7921
7922
// Generated as internal constructor for term x64_pshufd.
7923
0
pub fn constructor_x64_pshufd<C: Context>(
7924
0
    ctx: &mut C,
7925
0
    arg0: &XmmMem,
7926
0
    arg1: u8,
7927
0
) -> Xmm {
7928
0
    let v5 = C::use_avx(ctx);
7929
0
    if v5 == true {
7930
0
        let v7 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vpshufd, arg0, arg1);
7931
0
        // Rule at src/isa/x64/inst.isle line 3793.
7932
0
        return v7;
7933
0
    }
7934
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7935
0
    let v4 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Pshufd, v3, arg1);
7936
0
    // Rule at src/isa/x64/inst.isle line 3791.
7937
0
    return v4;
7938
0
}
7939
7940
// Generated as internal constructor for term x64_pshufb.
7941
0
pub fn constructor_x64_pshufb<C: Context>(
7942
0
    ctx: &mut C,
7943
0
    arg0: Xmm,
7944
0
    arg1: &XmmMem,
7945
0
) -> Xmm {
7946
0
    let v5 = C::use_avx(ctx);
7947
0
    if v5 == true {
7948
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
7949
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpshufb, arg0, v7);
7950
0
        // Rule at src/isa/x64/inst.isle line 3801.
7951
0
        return v8;
7952
0
    }
7953
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
7954
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pshufb, arg0, v3);
7955
0
    // Rule at src/isa/x64/inst.isle line 3799.
7956
0
    return v4;
7957
0
}
7958
7959
// Generated as internal constructor for term x64_pshuflw.
7960
0
pub fn constructor_x64_pshuflw<C: Context>(
7961
0
    ctx: &mut C,
7962
0
    arg0: &XmmMem,
7963
0
    arg1: u8,
7964
0
) -> Xmm {
7965
0
    let v5 = C::use_avx(ctx);
7966
0
    if v5 == true {
7967
0
        let v7 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vpshuflw, arg0, arg1);
7968
0
        // Rule at src/isa/x64/inst.isle line 3809.
7969
0
        return v7;
7970
0
    }
7971
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7972
0
    let v4 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Pshuflw, v3, arg1);
7973
0
    // Rule at src/isa/x64/inst.isle line 3807.
7974
0
    return v4;
7975
0
}
7976
7977
// Generated as internal constructor for term x64_pshufhw.
7978
0
pub fn constructor_x64_pshufhw<C: Context>(
7979
0
    ctx: &mut C,
7980
0
    arg0: &XmmMem,
7981
0
    arg1: u8,
7982
0
) -> Xmm {
7983
0
    let v5 = C::use_avx(ctx);
7984
0
    if v5 == true {
7985
0
        let v7 = constructor_xmm_unary_rm_r_imm_vex(ctx, &AvxOpcode::Vpshufhw, arg0, arg1);
7986
0
        // Rule at src/isa/x64/inst.isle line 3817.
7987
0
        return v7;
7988
0
    }
7989
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
7990
0
    let v4 = constructor_xmm_unary_rm_r_imm(ctx, &SseOpcode::Pshufhw, v3, arg1);
7991
0
    // Rule at src/isa/x64/inst.isle line 3815.
7992
0
    return v4;
7993
0
}
7994
7995
// Generated as internal constructor for term x64_shufps.
7996
0
pub fn constructor_x64_shufps<C: Context>(
7997
0
    ctx: &mut C,
7998
0
    arg0: Xmm,
7999
0
    arg1: &XmmMem,
8000
0
    arg2: u8,
8001
0
) -> Xmm {
8002
0
    let v8 = C::use_avx(ctx);
8003
0
    if v8 == true {
8004
0
        let v10 = constructor_xmm_rmr_imm_vex(ctx, &AvxOpcode::Vshufps, arg0, arg1, arg2);
8005
0
        // Rule at src/isa/x64/inst.isle line 3829.
8006
0
        return v10;
8007
0
    }
8008
0
    let v4 = C::xmm_to_reg(ctx, arg0);
8009
0
    let v5 = &C::xmm_mem_to_reg_mem(ctx, arg1);
8010
0
    let v7 = constructor_xmm_rm_r_imm(ctx, &SseOpcode::Shufps, v4, v5, arg2, &OperandSize::Size32);
8011
0
    // Rule at src/isa/x64/inst.isle line 3823.
8012
0
    return v7;
8013
0
}
8014
8015
// Generated as internal constructor for term x64_pabsb.
8016
0
pub fn constructor_x64_pabsb<C: Context>(
8017
0
    ctx: &mut C,
8018
0
    arg0: &XmmMem,
8019
0
) -> Xmm {
8020
0
    let v4 = C::use_avx(ctx);
8021
0
    if v4 == true {
8022
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpabsb, arg0);
8023
0
        // Rule at src/isa/x64/inst.isle line 3837.
8024
0
        return v6;
8025
0
    }
8026
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
8027
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Pabsb, v2);
8028
0
    // Rule at src/isa/x64/inst.isle line 3835.
8029
0
    return v3;
8030
0
}
8031
8032
// Generated as internal constructor for term x64_pabsw.
8033
0
pub fn constructor_x64_pabsw<C: Context>(
8034
0
    ctx: &mut C,
8035
0
    arg0: &XmmMem,
8036
0
) -> Xmm {
8037
0
    let v4 = C::use_avx(ctx);
8038
0
    if v4 == true {
8039
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpabsw, arg0);
8040
0
        // Rule at src/isa/x64/inst.isle line 3845.
8041
0
        return v6;
8042
0
    }
8043
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
8044
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Pabsw, v2);
8045
0
    // Rule at src/isa/x64/inst.isle line 3843.
8046
0
    return v3;
8047
0
}
8048
8049
// Generated as internal constructor for term x64_pabsd.
8050
0
pub fn constructor_x64_pabsd<C: Context>(
8051
0
    ctx: &mut C,
8052
0
    arg0: &XmmMem,
8053
0
) -> Xmm {
8054
0
    let v4 = C::use_avx(ctx);
8055
0
    if v4 == true {
8056
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpabsd, arg0);
8057
0
        // Rule at src/isa/x64/inst.isle line 3853.
8058
0
        return v6;
8059
0
    }
8060
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
8061
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Pabsd, v2);
8062
0
    // Rule at src/isa/x64/inst.isle line 3851.
8063
0
    return v3;
8064
0
}
8065
8066
// Generated as internal constructor for term x64_vcvtudq2ps.
8067
0
pub fn constructor_x64_vcvtudq2ps<C: Context>(
8068
0
    ctx: &mut C,
8069
0
    arg0: &XmmMem,
8070
0
) -> Xmm {
8071
0
    let v2 = constructor_xmm_unary_rm_r_evex(ctx, &Avx512Opcode::Vcvtudq2ps, arg0);
8072
0
    // Rule at src/isa/x64/inst.isle line 3859.
8073
0
    return v2;
8074
0
}
8075
8076
// Generated as internal constructor for term x64_vpabsq.
8077
0
pub fn constructor_x64_vpabsq<C: Context>(
8078
0
    ctx: &mut C,
8079
0
    arg0: &XmmMem,
8080
0
) -> Xmm {
8081
0
    let v2 = constructor_xmm_unary_rm_r_evex(ctx, &Avx512Opcode::Vpabsq, arg0);
8082
0
    // Rule at src/isa/x64/inst.isle line 3864.
8083
0
    return v2;
8084
0
}
8085
8086
// Generated as internal constructor for term x64_vpopcntb.
8087
0
pub fn constructor_x64_vpopcntb<C: Context>(
8088
0
    ctx: &mut C,
8089
0
    arg0: &XmmMem,
8090
0
) -> Xmm {
8091
0
    let v2 = constructor_xmm_unary_rm_r_evex(ctx, &Avx512Opcode::Vpopcntb, arg0);
8092
0
    // Rule at src/isa/x64/inst.isle line 3869.
8093
0
    return v2;
8094
0
}
8095
8096
// Generated as internal constructor for term x64_vpmullq.
8097
0
pub fn constructor_x64_vpmullq<C: Context>(
8098
0
    ctx: &mut C,
8099
0
    arg0: Xmm,
8100
0
    arg1: &XmmMem,
8101
0
) -> Xmm {
8102
0
    let v3 = constructor_xmm_rm_r_evex(ctx, &Avx512Opcode::Vpmullq, arg0, arg1);
8103
0
    // Rule at src/isa/x64/inst.isle line 3876.
8104
0
    return v3;
8105
0
}
8106
8107
// Generated as internal constructor for term x64_vpermi2b.
8108
0
pub fn constructor_x64_vpermi2b<C: Context>(
8109
0
    ctx: &mut C,
8110
0
    arg0: Xmm,
8111
0
    arg1: Xmm,
8112
0
    arg2: &XmmMem,
8113
0
) -> Xmm {
8114
0
    let v3 = C::temp_writable_xmm(ctx);
8115
0
    let v5 = MInst::XmmRmREvex3 {
8116
0
        op: Avx512Opcode::Vpermi2b,
8117
0
        src1: arg0,
8118
0
        src2: arg1,
8119
0
        src3: arg2.clone(),
8120
0
        dst: v3,
8121
0
    };
8122
0
    let v6 = C::emit(ctx, &v5);
8123
0
    let v7 = C::writable_xmm_to_xmm(ctx, v3);
8124
0
    // Rule at src/isa/x64/inst.isle line 3885.
8125
0
    return v7;
8126
0
}
8127
8128
// Generated as internal constructor for term mulhi_u.
8129
0
pub fn constructor_mulhi_u<C: Context>(
8130
0
    ctx: &mut C,
8131
0
    arg0: Type,
8132
0
    arg1: Gpr,
8133
0
    arg2: &GprMem,
8134
0
) -> ValueRegs {
8135
0
    let v4 = constructor_mul_hi(ctx, arg0, false, arg1, arg2);
8136
0
    // Rule at src/isa/x64/inst.isle line 3897.
8137
0
    return v4;
8138
0
}
8139
8140
// Generated as internal constructor for term x64_psllw.
8141
0
pub fn constructor_x64_psllw<C: Context>(
8142
0
    ctx: &mut C,
8143
0
    arg0: Xmm,
8144
0
    arg1: &XmmMemImm,
8145
0
) -> Xmm {
8146
0
    let v5 = C::use_avx(ctx);
8147
0
    if v5 == true {
8148
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsllw, arg0, arg1);
8149
0
        // Rule at src/isa/x64/inst.isle line 3904.
8150
0
        return v7;
8151
0
    }
8152
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8153
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psllw, arg0, v3);
8154
0
    // Rule at src/isa/x64/inst.isle line 3902.
8155
0
    return v4;
8156
0
}
8157
8158
// Generated as internal constructor for term x64_pslld.
8159
0
pub fn constructor_x64_pslld<C: Context>(
8160
0
    ctx: &mut C,
8161
0
    arg0: Xmm,
8162
0
    arg1: &XmmMemImm,
8163
0
) -> Xmm {
8164
0
    let v5 = C::use_avx(ctx);
8165
0
    if v5 == true {
8166
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpslld, arg0, arg1);
8167
0
        // Rule at src/isa/x64/inst.isle line 3912.
8168
0
        return v7;
8169
0
    }
8170
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8171
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Pslld, arg0, v3);
8172
0
    // Rule at src/isa/x64/inst.isle line 3910.
8173
0
    return v4;
8174
0
}
8175
8176
// Generated as internal constructor for term x64_psllq.
8177
0
pub fn constructor_x64_psllq<C: Context>(
8178
0
    ctx: &mut C,
8179
0
    arg0: Xmm,
8180
0
    arg1: &XmmMemImm,
8181
0
) -> Xmm {
8182
0
    let v5 = C::use_avx(ctx);
8183
0
    if v5 == true {
8184
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsllq, arg0, arg1);
8185
0
        // Rule at src/isa/x64/inst.isle line 3920.
8186
0
        return v7;
8187
0
    }
8188
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8189
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psllq, arg0, v3);
8190
0
    // Rule at src/isa/x64/inst.isle line 3918.
8191
0
    return v4;
8192
0
}
8193
8194
// Generated as internal constructor for term x64_psrlw.
8195
0
pub fn constructor_x64_psrlw<C: Context>(
8196
0
    ctx: &mut C,
8197
0
    arg0: Xmm,
8198
0
    arg1: &XmmMemImm,
8199
0
) -> Xmm {
8200
0
    let v5 = C::use_avx(ctx);
8201
0
    if v5 == true {
8202
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrlw, arg0, arg1);
8203
0
        // Rule at src/isa/x64/inst.isle line 3928.
8204
0
        return v7;
8205
0
    }
8206
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8207
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrlw, arg0, v3);
8208
0
    // Rule at src/isa/x64/inst.isle line 3926.
8209
0
    return v4;
8210
0
}
8211
8212
// Generated as internal constructor for term x64_psrld.
8213
0
pub fn constructor_x64_psrld<C: Context>(
8214
0
    ctx: &mut C,
8215
0
    arg0: Xmm,
8216
0
    arg1: &XmmMemImm,
8217
0
) -> Xmm {
8218
0
    let v5 = C::use_avx(ctx);
8219
0
    if v5 == true {
8220
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrld, arg0, arg1);
8221
0
        // Rule at src/isa/x64/inst.isle line 3936.
8222
0
        return v7;
8223
0
    }
8224
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8225
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrld, arg0, v3);
8226
0
    // Rule at src/isa/x64/inst.isle line 3934.
8227
0
    return v4;
8228
0
}
8229
8230
// Generated as internal constructor for term x64_psrlq.
8231
0
pub fn constructor_x64_psrlq<C: Context>(
8232
0
    ctx: &mut C,
8233
0
    arg0: Xmm,
8234
0
    arg1: &XmmMemImm,
8235
0
) -> Xmm {
8236
0
    let v5 = C::use_avx(ctx);
8237
0
    if v5 == true {
8238
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrlq, arg0, arg1);
8239
0
        // Rule at src/isa/x64/inst.isle line 3944.
8240
0
        return v7;
8241
0
    }
8242
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8243
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrlq, arg0, v3);
8244
0
    // Rule at src/isa/x64/inst.isle line 3942.
8245
0
    return v4;
8246
0
}
8247
8248
// Generated as internal constructor for term x64_psraw.
8249
0
pub fn constructor_x64_psraw<C: Context>(
8250
0
    ctx: &mut C,
8251
0
    arg0: Xmm,
8252
0
    arg1: &XmmMemImm,
8253
0
) -> Xmm {
8254
0
    let v5 = C::use_avx(ctx);
8255
0
    if v5 == true {
8256
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsraw, arg0, arg1);
8257
0
        // Rule at src/isa/x64/inst.isle line 3952.
8258
0
        return v7;
8259
0
    }
8260
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8261
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psraw, arg0, v3);
8262
0
    // Rule at src/isa/x64/inst.isle line 3950.
8263
0
    return v4;
8264
0
}
8265
8266
// Generated as internal constructor for term x64_psrad.
8267
0
pub fn constructor_x64_psrad<C: Context>(
8268
0
    ctx: &mut C,
8269
0
    arg0: Xmm,
8270
0
    arg1: &XmmMemImm,
8271
0
) -> Xmm {
8272
0
    let v5 = C::use_avx(ctx);
8273
0
    if v5 == true {
8274
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpsrad, arg0, arg1);
8275
0
        // Rule at src/isa/x64/inst.isle line 3960.
8276
0
        return v7;
8277
0
    }
8278
0
    let v3 = &C::xmm_mem_imm_to_xmm_mem_aligned_imm(ctx, arg1);
8279
0
    let v4 = constructor_xmm_rmi_xmm(ctx, &SseOpcode::Psrad, arg0, v3);
8280
0
    // Rule at src/isa/x64/inst.isle line 3958.
8281
0
    return v4;
8282
0
}
8283
8284
// Generated as internal constructor for term x64_vpsraq.
8285
0
pub fn constructor_x64_vpsraq<C: Context>(
8286
0
    ctx: &mut C,
8287
0
    arg0: Xmm,
8288
0
    arg1: &XmmMem,
8289
0
) -> Xmm {
8290
0
    let v3 = constructor_xmm_rm_r_evex(ctx, &Avx512Opcode::Vpsraq, arg0, arg1);
8291
0
    // Rule at src/isa/x64/inst.isle line 3966.
8292
0
    return v3;
8293
0
}
8294
8295
// Generated as internal constructor for term x64_vpsraq_imm.
8296
0
pub fn constructor_x64_vpsraq_imm<C: Context>(
8297
0
    ctx: &mut C,
8298
0
    arg0: &XmmMem,
8299
0
    arg1: u8,
8300
0
) -> Xmm {
8301
0
    let v3 = constructor_xmm_unary_rm_r_imm_evex(ctx, &Avx512Opcode::VpsraqImm, arg0, arg1);
8302
0
    // Rule at src/isa/x64/inst.isle line 3971.
8303
0
    return v3;
8304
0
}
8305
8306
// Generated as internal constructor for term x64_pextrb.
8307
0
pub fn constructor_x64_pextrb<C: Context>(
8308
0
    ctx: &mut C,
8309
0
    arg0: Xmm,
8310
0
    arg1: u8,
8311
0
) -> Gpr {
8312
0
    let v4 = C::use_avx(ctx);
8313
0
    if v4 == true {
8314
0
        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrb, arg0, arg1);
8315
0
        // Rule at src/isa/x64/inst.isle line 3978.
8316
0
        return v6;
8317
0
    }
8318
0
    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrb, arg0, arg1);
8319
0
    // Rule at src/isa/x64/inst.isle line 3976.
8320
0
    return v3;
8321
0
}
8322
8323
// Generated as internal constructor for term x64_pextrb_store.
8324
0
pub fn constructor_x64_pextrb_store<C: Context>(
8325
0
    ctx: &mut C,
8326
0
    arg0: &SyntheticAmode,
8327
0
    arg1: Xmm,
8328
0
    arg2: u8,
8329
0
) -> SideEffectNoResult {
8330
0
    let v5 = C::use_avx(ctx);
8331
0
    if v5 == true {
8332
0
        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrb, arg0, arg1, arg2);
8333
0
        // Rule at src/isa/x64/inst.isle line 3985.
8334
0
        return v7.clone();
8335
0
    }
8336
0
    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrb, arg0, arg1, arg2);
8337
0
    // Rule at src/isa/x64/inst.isle line 3983.
8338
0
    return v4.clone();
8339
0
}
8340
8341
// Generated as internal constructor for term x64_pextrw.
8342
0
pub fn constructor_x64_pextrw<C: Context>(
8343
0
    ctx: &mut C,
8344
0
    arg0: Xmm,
8345
0
    arg1: u8,
8346
0
) -> Gpr {
8347
0
    let v4 = C::use_avx(ctx);
8348
0
    if v4 == true {
8349
0
        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrw, arg0, arg1);
8350
0
        // Rule at src/isa/x64/inst.isle line 3993.
8351
0
        return v6;
8352
0
    }
8353
0
    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrw, arg0, arg1);
8354
0
    // Rule at src/isa/x64/inst.isle line 3991.
8355
0
    return v3;
8356
0
}
8357
8358
// Generated as internal constructor for term x64_pextrw_store.
8359
0
pub fn constructor_x64_pextrw_store<C: Context>(
8360
0
    ctx: &mut C,
8361
0
    arg0: &SyntheticAmode,
8362
0
    arg1: Xmm,
8363
0
    arg2: u8,
8364
0
) -> SideEffectNoResult {
8365
0
    let v5 = C::use_avx(ctx);
8366
0
    if v5 == true {
8367
0
        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrw, arg0, arg1, arg2);
8368
0
        // Rule at src/isa/x64/inst.isle line 4000.
8369
0
        return v7.clone();
8370
0
    }
8371
0
    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrw, arg0, arg1, arg2);
8372
0
    // Rule at src/isa/x64/inst.isle line 3998.
8373
0
    return v4.clone();
8374
0
}
8375
8376
// Generated as internal constructor for term x64_pextrd.
8377
0
pub fn constructor_x64_pextrd<C: Context>(
8378
0
    ctx: &mut C,
8379
0
    arg0: Xmm,
8380
0
    arg1: u8,
8381
0
) -> Gpr {
8382
0
    let v4 = C::use_avx(ctx);
8383
0
    if v4 == true {
8384
0
        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrd, arg0, arg1);
8385
0
        // Rule at src/isa/x64/inst.isle line 4008.
8386
0
        return v6;
8387
0
    }
8388
0
    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrd, arg0, arg1);
8389
0
    // Rule at src/isa/x64/inst.isle line 4006.
8390
0
    return v3;
8391
0
}
8392
8393
// Generated as internal constructor for term x64_pextrd_store.
8394
0
pub fn constructor_x64_pextrd_store<C: Context>(
8395
0
    ctx: &mut C,
8396
0
    arg0: &SyntheticAmode,
8397
0
    arg1: Xmm,
8398
0
    arg2: u8,
8399
0
) -> SideEffectNoResult {
8400
0
    let v5 = C::use_avx(ctx);
8401
0
    if v5 == true {
8402
0
        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrd, arg0, arg1, arg2);
8403
0
        // Rule at src/isa/x64/inst.isle line 4015.
8404
0
        return v7.clone();
8405
0
    }
8406
0
    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrd, arg0, arg1, arg2);
8407
0
    // Rule at src/isa/x64/inst.isle line 4013.
8408
0
    return v4.clone();
8409
0
}
8410
8411
// Generated as internal constructor for term x64_pextrq.
8412
0
pub fn constructor_x64_pextrq<C: Context>(
8413
0
    ctx: &mut C,
8414
0
    arg0: Xmm,
8415
0
    arg1: u8,
8416
0
) -> Gpr {
8417
0
    let v4 = C::use_avx(ctx);
8418
0
    if v4 == true {
8419
0
        let v6 = constructor_xmm_to_gpr_imm_vex(ctx, &AvxOpcode::Vpextrq, arg0, arg1);
8420
0
        // Rule at src/isa/x64/inst.isle line 4023.
8421
0
        return v6;
8422
0
    }
8423
0
    let v3 = constructor_xmm_to_gpr_imm(ctx, &SseOpcode::Pextrq, arg0, arg1);
8424
0
    // Rule at src/isa/x64/inst.isle line 4021.
8425
0
    return v3;
8426
0
}
8427
8428
// Generated as internal constructor for term x64_pextrq_store.
8429
0
pub fn constructor_x64_pextrq_store<C: Context>(
8430
0
    ctx: &mut C,
8431
0
    arg0: &SyntheticAmode,
8432
0
    arg1: Xmm,
8433
0
    arg2: u8,
8434
0
) -> SideEffectNoResult {
8435
0
    let v5 = C::use_avx(ctx);
8436
0
    if v5 == true {
8437
0
        let v7 = &constructor_xmm_movrm_imm_vex(ctx, &AvxOpcode::Vpextrq, arg0, arg1, arg2);
8438
0
        // Rule at src/isa/x64/inst.isle line 4030.
8439
0
        return v7.clone();
8440
0
    }
8441
0
    let v4 = &constructor_xmm_movrm_imm(ctx, &SseOpcode::Pextrq, arg0, arg1, arg2);
8442
0
    // Rule at src/isa/x64/inst.isle line 4028.
8443
0
    return v4.clone();
8444
0
}
8445
8446
// Generated as internal constructor for term x64_pmovmskb.
8447
0
pub fn constructor_x64_pmovmskb<C: Context>(
8448
0
    ctx: &mut C,
8449
0
    arg0: &OperandSize,
8450
0
    arg1: Xmm,
8451
0
) -> Gpr {
8452
0
    let v4 = C::use_avx(ctx);
8453
0
    if v4 == true {
8454
0
        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vpmovmskb, arg1, arg0);
8455
0
        // Rule at src/isa/x64/inst.isle line 4038.
8456
0
        return v6;
8457
0
    }
8458
0
    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Pmovmskb, arg1, arg0);
8459
0
    // Rule at src/isa/x64/inst.isle line 4036.
8460
0
    return v3;
8461
0
}
8462
8463
// Generated as internal constructor for term x64_movmskps.
8464
0
pub fn constructor_x64_movmskps<C: Context>(
8465
0
    ctx: &mut C,
8466
0
    arg0: &OperandSize,
8467
0
    arg1: Xmm,
8468
0
) -> Gpr {
8469
0
    let v4 = C::use_avx(ctx);
8470
0
    if v4 == true {
8471
0
        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovmskps, arg1, arg0);
8472
0
        // Rule at src/isa/x64/inst.isle line 4046.
8473
0
        return v6;
8474
0
    }
8475
0
    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movmskps, arg1, arg0);
8476
0
    // Rule at src/isa/x64/inst.isle line 4044.
8477
0
    return v3;
8478
0
}
8479
8480
// Generated as internal constructor for term x64_movmskpd.
8481
0
pub fn constructor_x64_movmskpd<C: Context>(
8482
0
    ctx: &mut C,
8483
0
    arg0: &OperandSize,
8484
0
    arg1: Xmm,
8485
0
) -> Gpr {
8486
0
    let v4 = C::use_avx(ctx);
8487
0
    if v4 == true {
8488
0
        let v6 = constructor_xmm_to_gpr_vex(ctx, &AvxOpcode::Vmovmskpd, arg1, arg0);
8489
0
        // Rule at src/isa/x64/inst.isle line 4054.
8490
0
        return v6;
8491
0
    }
8492
0
    let v3 = constructor_xmm_to_gpr(ctx, &SseOpcode::Movmskpd, arg1, arg0);
8493
0
    // Rule at src/isa/x64/inst.isle line 4052.
8494
0
    return v3;
8495
0
}
8496
8497
// Generated as internal constructor for term x64_not.
8498
1.30k
pub fn constructor_x64_not<C: Context>(
8499
1.30k
    ctx: &mut C,
8500
1.30k
    arg0: Type,
8501
1.30k
    arg1: Gpr,
8502
1.30k
) -> Gpr {
8503
1.30k
    let v2 = C::temp_writable_gpr(ctx);
8504
1.30k
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8505
1.30k
    let v4 = MInst::Not {
8506
1.30k
        size: v3.clone(),
8507
1.30k
        src: arg1,
8508
1.30k
        dst: v2,
8509
1.30k
    };
8510
1.30k
    let v5 = C::emit(ctx, &v4);
8511
1.30k
    let v6 = C::writable_gpr_to_gpr(ctx, v2);
8512
1.30k
    // Rule at src/isa/x64/inst.isle line 4060.
8513
1.30k
    return v6;
8514
1.30k
}
8515
8516
// Generated as internal constructor for term x64_neg.
8517
738
pub fn constructor_x64_neg<C: Context>(
8518
738
    ctx: &mut C,
8519
738
    arg0: Type,
8520
738
    arg1: Gpr,
8521
738
) -> Gpr {
8522
738
    let v2 = C::temp_writable_gpr(ctx);
8523
738
    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
8524
738
    let v4 = MInst::Neg {
8525
738
        size: v3.clone(),
8526
738
        src: arg1,
8527
738
        dst: v2,
8528
738
    };
8529
738
    let v5 = C::emit(ctx, &v4);
8530
738
    let v6 = C::writable_gpr_to_gpr(ctx, v2);
8531
738
    // Rule at src/isa/x64/inst.isle line 4068.
8532
738
    return v6;
8533
738
}
8534
8535
// Generated as internal constructor for term x64_neg_paired.
8536
0
pub fn constructor_x64_neg_paired<C: Context>(
8537
0
    ctx: &mut C,
8538
0
    arg0: Type,
8539
0
    arg1: Gpr,
8540
0
) -> ProducesFlags {
8541
0
    let v2 = C::temp_writable_gpr(ctx);
8542
0
    let v3 = &C::raw_operand_size_of_type(ctx, arg0);
8543
0
    let v5 = constructor_writable_gpr_to_r_reg(ctx, v2);
8544
0
    let v4 = MInst::Neg {
8545
0
        size: v3.clone(),
8546
0
        src: arg1,
8547
0
        dst: v2,
8548
0
    };
8549
0
    let v6 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer {
8550
0
        inst: v4,
8551
0
        result: v5,
8552
0
    };
8553
0
    // Rule at src/isa/x64/inst.isle line 4076.
8554
0
    return v6;
8555
0
}
8556
8557
// Generated as internal constructor for term x64_lea.
8558
988k
pub fn constructor_x64_lea<C: Context>(
8559
988k
    ctx: &mut C,
8560
988k
    arg0: Type,
8561
988k
    arg1: &SyntheticAmode,
8562
988k
) -> Gpr {
8563
988k
    let v2 = C::temp_writable_gpr(ctx);
8564
988k
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8565
988k
    let v4 = MInst::LoadEffectiveAddress {
8566
988k
        addr: arg1.clone(),
8567
988k
        dst: v2,
8568
988k
        size: v3.clone(),
8569
988k
    };
8570
988k
    let v5 = C::emit(ctx, &v4);
8571
988k
    let v6 = C::writable_gpr_to_gpr(ctx, v2);
8572
988k
    // Rule at src/isa/x64/inst.isle line 4083.
8573
988k
    return v6;
8574
988k
}
8575
8576
// Generated as internal constructor for term x64_ud2.
8577
117k
pub fn constructor_x64_ud2<C: Context>(
8578
117k
    ctx: &mut C,
8579
117k
    arg0: &TrapCode,
8580
117k
) -> SideEffectNoResult {
8581
117k
    let v1 = MInst::Ud2 {
8582
117k
        trap_code: arg0.clone(),
8583
117k
    };
8584
117k
    let v2 = SideEffectNoResult::Inst {
8585
117k
        inst: v1,
8586
117k
    };
8587
117k
    // Rule at src/isa/x64/inst.isle line 4090.
8588
117k
    return v2;
8589
117k
}
8590
8591
// Generated as internal constructor for term x64_hlt.
8592
0
pub fn constructor_x64_hlt<C: Context>(
8593
0
    ctx: &mut C,
8594
0
) -> SideEffectNoResult {
8595
0
    let v1 = SideEffectNoResult::Inst {
8596
0
        inst: MInst::Hlt,
8597
0
    };
8598
0
    // Rule at src/isa/x64/inst.isle line 4095.
8599
0
    return v1;
8600
0
}
8601
8602
// Generated as internal constructor for term x64_lzcnt.
8603
381
pub fn constructor_x64_lzcnt<C: Context>(
8604
381
    ctx: &mut C,
8605
381
    arg0: Type,
8606
381
    arg1: Gpr,
8607
381
) -> Gpr {
8608
381
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8609
381
    let v4 = constructor_unary_rm_r(ctx, &UnaryRmROpcode::Lzcnt, arg1, v3);
8610
381
    // Rule at src/isa/x64/inst.isle line 4100.
8611
381
    return v4;
8612
381
}
8613
8614
// Generated as internal constructor for term x64_tzcnt.
8615
145
pub fn constructor_x64_tzcnt<C: Context>(
8616
145
    ctx: &mut C,
8617
145
    arg0: Type,
8618
145
    arg1: Gpr,
8619
145
) -> Gpr {
8620
145
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8621
145
    let v4 = constructor_unary_rm_r(ctx, &UnaryRmROpcode::Tzcnt, arg1, v3);
8622
145
    // Rule at src/isa/x64/inst.isle line 4105.
8623
145
    return v4;
8624
145
}
8625
8626
// Generated as internal constructor for term x64_bsr.
8627
0
pub fn constructor_x64_bsr<C: Context>(
8628
0
    ctx: &mut C,
8629
0
    arg0: Type,
8630
0
    arg1: Gpr,
8631
0
) -> ProducesFlags {
8632
0
    let v2 = C::temp_writable_gpr(ctx);
8633
0
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8634
0
    let v5 = &C::gpr_to_gpr_mem(ctx, arg1);
8635
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v2);
8636
0
    let v6 = MInst::UnaryRmR {
8637
0
        size: v3.clone(),
8638
0
        op: UnaryRmROpcode::Bsr,
8639
0
        src: v5.clone(),
8640
0
        dst: v2,
8641
0
    };
8642
0
    let v8 = ProducesFlags::ProducesFlagsReturnsReg {
8643
0
        inst: v6,
8644
0
        result: v7,
8645
0
    };
8646
0
    // Rule at src/isa/x64/inst.isle line 4110.
8647
0
    return v8;
8648
0
}
8649
8650
// Generated as internal constructor for term bsr_or_else.
8651
0
pub fn constructor_bsr_or_else<C: Context>(
8652
0
    ctx: &mut C,
8653
0
    arg0: Type,
8654
0
    arg1: Gpr,
8655
0
    arg2: Gpr,
8656
0
) -> Gpr {
8657
0
    let v3 = &constructor_x64_bsr(ctx, arg0, arg1);
8658
0
    let v4 = constructor_produces_flags_get_reg(ctx, v3);
8659
0
    let v5 = C::gpr_new(ctx, v4);
8660
0
    let v7 = &C::gpr_to_gpr_mem(ctx, arg2);
8661
0
    let v8 = &constructor_cmove(ctx, arg0, &CC::Z, v7, v5);
8662
0
    let v9 = &constructor_produces_flags_ignore(ctx, v3);
8663
0
    let v10 = constructor_with_flags_reg(ctx, v9, v8);
8664
0
    let v11 = C::gpr_new(ctx, v10);
8665
0
    // Rule at src/isa/x64/inst.isle line 4119.
8666
0
    return v11;
8667
0
}
8668
8669
// Generated as internal constructor for term x64_bsf.
8670
0
pub fn constructor_x64_bsf<C: Context>(
8671
0
    ctx: &mut C,
8672
0
    arg0: Type,
8673
0
    arg1: Gpr,
8674
0
) -> ProducesFlags {
8675
0
    let v2 = C::temp_writable_gpr(ctx);
8676
0
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8677
0
    let v5 = &C::gpr_to_gpr_mem(ctx, arg1);
8678
0
    let v7 = constructor_writable_gpr_to_r_reg(ctx, v2);
8679
0
    let v6 = MInst::UnaryRmR {
8680
0
        size: v3.clone(),
8681
0
        op: UnaryRmROpcode::Bsf,
8682
0
        src: v5.clone(),
8683
0
        dst: v2,
8684
0
    };
8685
0
    let v8 = ProducesFlags::ProducesFlagsReturnsReg {
8686
0
        inst: v6,
8687
0
        result: v7,
8688
0
    };
8689
0
    // Rule at src/isa/x64/inst.isle line 4130.
8690
0
    return v8;
8691
0
}
8692
8693
// Generated as internal constructor for term bsf_or_else.
8694
0
pub fn constructor_bsf_or_else<C: Context>(
8695
0
    ctx: &mut C,
8696
0
    arg0: Type,
8697
0
    arg1: Gpr,
8698
0
    arg2: Gpr,
8699
0
) -> Gpr {
8700
0
    let v3 = &constructor_x64_bsf(ctx, arg0, arg1);
8701
0
    let v4 = constructor_produces_flags_get_reg(ctx, v3);
8702
0
    let v5 = C::gpr_new(ctx, v4);
8703
0
    let v7 = &C::gpr_to_gpr_mem(ctx, arg2);
8704
0
    let v8 = &constructor_cmove(ctx, arg0, &CC::Z, v7, v5);
8705
0
    let v9 = &constructor_produces_flags_ignore(ctx, v3);
8706
0
    let v10 = constructor_with_flags_reg(ctx, v9, v8);
8707
0
    let v11 = C::gpr_new(ctx, v10);
8708
0
    // Rule at src/isa/x64/inst.isle line 4139.
8709
0
    return v11;
8710
0
}
8711
8712
// Generated as internal constructor for term x64_blsi.
8713
0
pub fn constructor_x64_blsi<C: Context>(
8714
0
    ctx: &mut C,
8715
0
    arg0: Type,
8716
0
    arg1: &GprMem,
8717
0
) -> Gpr {
8718
0
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8719
0
    let v4 = constructor_unary_rm_r_vex(ctx, &UnaryRmRVexOpcode::Blsi, arg1, v3);
8720
0
    // Rule at src/isa/x64/inst.isle line 4150.
8721
0
    return v4;
8722
0
}
8723
8724
// Generated as internal constructor for term x64_blsmsk.
8725
0
pub fn constructor_x64_blsmsk<C: Context>(
8726
0
    ctx: &mut C,
8727
0
    arg0: Type,
8728
0
    arg1: &GprMem,
8729
0
) -> Gpr {
8730
0
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8731
0
    let v4 = constructor_unary_rm_r_vex(ctx, &UnaryRmRVexOpcode::Blsmsk, arg1, v3);
8732
0
    // Rule at src/isa/x64/inst.isle line 4155.
8733
0
    return v4;
8734
0
}
8735
8736
// Generated as internal constructor for term x64_blsr.
8737
58
pub fn constructor_x64_blsr<C: Context>(
8738
58
    ctx: &mut C,
8739
58
    arg0: Type,
8740
58
    arg1: &GprMem,
8741
58
) -> Gpr {
8742
58
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8743
58
    let v4 = constructor_unary_rm_r_vex(ctx, &UnaryRmRVexOpcode::Blsr, arg1, v3);
8744
58
    // Rule at src/isa/x64/inst.isle line 4160.
8745
58
    return v4;
8746
58
}
8747
8748
// Generated as internal constructor for term x64_sarx.
8749
0
pub fn constructor_x64_sarx<C: Context>(
8750
0
    ctx: &mut C,
8751
0
    arg0: Type,
8752
0
    arg1: &GprMem,
8753
0
    arg2: Gpr,
8754
0
) -> Gpr {
8755
0
    let v4 = constructor_alu_rm_r_vex(ctx, arg0, &AluRmROpcode::Sarx, arg2, arg1);
8756
0
    // Rule at src/isa/x64/inst.isle line 4165.
8757
0
    return v4;
8758
0
}
8759
8760
// Generated as internal constructor for term x64_shrx.
8761
524
pub fn constructor_x64_shrx<C: Context>(
8762
524
    ctx: &mut C,
8763
524
    arg0: Type,
8764
524
    arg1: &GprMem,
8765
524
    arg2: Gpr,
8766
524
) -> Gpr {
8767
524
    let v4 = constructor_alu_rm_r_vex(ctx, arg0, &AluRmROpcode::Shrx, arg2, arg1);
8768
524
    // Rule at src/isa/x64/inst.isle line 4170.
8769
524
    return v4;
8770
524
}
8771
8772
// Generated as internal constructor for term x64_shlx.
8773
443
pub fn constructor_x64_shlx<C: Context>(
8774
443
    ctx: &mut C,
8775
443
    arg0: Type,
8776
443
    arg1: &GprMem,
8777
443
    arg2: Gpr,
8778
443
) -> Gpr {
8779
443
    let v4 = constructor_alu_rm_r_vex(ctx, arg0, &AluRmROpcode::Shlx, arg2, arg1);
8780
443
    // Rule at src/isa/x64/inst.isle line 4175.
8781
443
    return v4;
8782
443
}
8783
8784
// Generated as internal constructor for term x64_rorx.
8785
955
pub fn constructor_x64_rorx<C: Context>(
8786
955
    ctx: &mut C,
8787
955
    arg0: Type,
8788
955
    arg1: &GprMem,
8789
955
    arg2: u8,
8790
955
) -> Gpr {
8791
955
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
8792
955
    let v5 = constructor_unary_rm_r_imm_vex(ctx, &UnaryRmRImmVexOpcode::Rorx, arg1, v4, arg2);
8793
955
    // Rule at src/isa/x64/inst.isle line 4180.
8794
955
    return v5;
8795
955
}
8796
8797
// Generated as internal constructor for term x64_popcnt.
8798
89
pub fn constructor_x64_popcnt<C: Context>(
8799
89
    ctx: &mut C,
8800
89
    arg0: Type,
8801
89
    arg1: Gpr,
8802
89
) -> Gpr {
8803
89
    let v3 = &C::operand_size_of_type_32_64(ctx, arg0);
8804
89
    let v4 = constructor_unary_rm_r(ctx, &UnaryRmROpcode::Popcnt, arg1, v3);
8805
89
    // Rule at src/isa/x64/inst.isle line 4188.
8806
89
    return v4;
8807
89
}
8808
8809
// Generated as internal constructor for term x64_minss.
8810
0
pub fn constructor_x64_minss<C: Context>(
8811
0
    ctx: &mut C,
8812
0
    arg0: Xmm,
8813
0
    arg1: &XmmMem,
8814
0
) -> Xmm {
8815
0
    let v4 = C::use_avx(ctx);
8816
0
    if v4 == true {
8817
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8818
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminss, arg0, v6);
8819
0
        // Rule at src/isa/x64/inst.isle line 4195.
8820
0
        return v7;
8821
0
    }
8822
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Minss, arg0, arg1);
8823
0
    // Rule at src/isa/x64/inst.isle line 4193.
8824
0
    return v3;
8825
0
}
8826
8827
// Generated as internal constructor for term x64_minsd.
8828
0
pub fn constructor_x64_minsd<C: Context>(
8829
0
    ctx: &mut C,
8830
0
    arg0: Xmm,
8831
0
    arg1: &XmmMem,
8832
0
) -> Xmm {
8833
0
    let v4 = C::use_avx(ctx);
8834
0
    if v4 == true {
8835
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8836
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminsd, arg0, v6);
8837
0
        // Rule at src/isa/x64/inst.isle line 4203.
8838
0
        return v7;
8839
0
    }
8840
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Minsd, arg0, arg1);
8841
0
    // Rule at src/isa/x64/inst.isle line 4201.
8842
0
    return v3;
8843
0
}
8844
8845
// Generated as internal constructor for term x64_minps.
8846
0
pub fn constructor_x64_minps<C: Context>(
8847
0
    ctx: &mut C,
8848
0
    arg0: Xmm,
8849
0
    arg1: &XmmMem,
8850
0
) -> Xmm {
8851
0
    let v5 = C::use_avx(ctx);
8852
0
    if v5 == true {
8853
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8854
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminps, arg0, v7);
8855
0
        // Rule at src/isa/x64/inst.isle line 4211.
8856
0
        return v8;
8857
0
    }
8858
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
8859
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Minps, arg0, v3);
8860
0
    // Rule at src/isa/x64/inst.isle line 4209.
8861
0
    return v4;
8862
0
}
8863
8864
// Generated as internal constructor for term x64_minpd.
8865
0
pub fn constructor_x64_minpd<C: Context>(
8866
0
    ctx: &mut C,
8867
0
    arg0: Xmm,
8868
0
    arg1: &XmmMem,
8869
0
) -> Xmm {
8870
0
    let v5 = C::use_avx(ctx);
8871
0
    if v5 == true {
8872
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8873
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vminpd, arg0, v7);
8874
0
        // Rule at src/isa/x64/inst.isle line 4219.
8875
0
        return v8;
8876
0
    }
8877
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
8878
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Minpd, arg0, v3);
8879
0
    // Rule at src/isa/x64/inst.isle line 4217.
8880
0
    return v4;
8881
0
}
8882
8883
// Generated as internal constructor for term x64_maxss.
8884
0
pub fn constructor_x64_maxss<C: Context>(
8885
0
    ctx: &mut C,
8886
0
    arg0: Xmm,
8887
0
    arg1: &XmmMem,
8888
0
) -> Xmm {
8889
0
    let v4 = C::use_avx(ctx);
8890
0
    if v4 == true {
8891
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8892
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxss, arg0, v6);
8893
0
        // Rule at src/isa/x64/inst.isle line 4227.
8894
0
        return v7;
8895
0
    }
8896
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Maxss, arg0, arg1);
8897
0
    // Rule at src/isa/x64/inst.isle line 4225.
8898
0
    return v3;
8899
0
}
8900
8901
// Generated as internal constructor for term x64_maxsd.
8902
0
pub fn constructor_x64_maxsd<C: Context>(
8903
0
    ctx: &mut C,
8904
0
    arg0: Xmm,
8905
0
    arg1: &XmmMem,
8906
0
) -> Xmm {
8907
0
    let v4 = C::use_avx(ctx);
8908
0
    if v4 == true {
8909
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8910
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxsd, arg0, v6);
8911
0
        // Rule at src/isa/x64/inst.isle line 4235.
8912
0
        return v7;
8913
0
    }
8914
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Maxsd, arg0, arg1);
8915
0
    // Rule at src/isa/x64/inst.isle line 4233.
8916
0
    return v3;
8917
0
}
8918
8919
// Generated as internal constructor for term x64_maxps.
8920
0
pub fn constructor_x64_maxps<C: Context>(
8921
0
    ctx: &mut C,
8922
0
    arg0: Xmm,
8923
0
    arg1: &XmmMem,
8924
0
) -> Xmm {
8925
0
    let v5 = C::use_avx(ctx);
8926
0
    if v5 == true {
8927
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8928
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxps, arg0, v7);
8929
0
        // Rule at src/isa/x64/inst.isle line 4243.
8930
0
        return v8;
8931
0
    }
8932
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
8933
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Maxps, arg0, v3);
8934
0
    // Rule at src/isa/x64/inst.isle line 4241.
8935
0
    return v4;
8936
0
}
8937
8938
// Generated as internal constructor for term x64_maxpd.
8939
0
pub fn constructor_x64_maxpd<C: Context>(
8940
0
    ctx: &mut C,
8941
0
    arg0: Xmm,
8942
0
    arg1: &XmmMem,
8943
0
) -> Xmm {
8944
0
    let v5 = C::use_avx(ctx);
8945
0
    if v5 == true {
8946
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
8947
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vmaxpd, arg0, v7);
8948
0
        // Rule at src/isa/x64/inst.isle line 4251.
8949
0
        return v8;
8950
0
    }
8951
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
8952
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Maxpd, arg0, v3);
8953
0
    // Rule at src/isa/x64/inst.isle line 4249.
8954
0
    return v4;
8955
0
}
8956
8957
// Generated as internal constructor for term x64_vfmadd213.
8958
0
pub fn constructor_x64_vfmadd213<C: Context>(
8959
0
    ctx: &mut C,
8960
0
    arg0: Type,
8961
0
    arg1: Xmm,
8962
0
    arg2: Xmm,
8963
0
    arg3: &XmmMem,
8964
0
) -> Xmm {
8965
0
    match arg0 {
8966
        F32 => {
8967
0
            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213ss, arg1, arg2, arg3);
8968
0
            // Rule at src/isa/x64/inst.isle line 4257.
8969
0
            return v5;
8970
        }
8971
        F64 => {
8972
0
            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213sd, arg1, arg2, arg3);
8973
0
            // Rule at src/isa/x64/inst.isle line 4258.
8974
0
            return v7;
8975
        }
8976
        F32X4 => {
8977
0
            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213ps, arg1, arg2, arg3);
8978
0
            // Rule at src/isa/x64/inst.isle line 4259.
8979
0
            return v9;
8980
        }
8981
        F64X2 => {
8982
0
            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd213pd, arg1, arg2, arg3);
8983
0
            // Rule at src/isa/x64/inst.isle line 4260.
8984
0
            return v11;
8985
        }
8986
0
        _ => {}
8987
0
    }
8988
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_vfmadd213", "src/isa/x64/inst.isle line 4256")
8989
0
}
8990
8991
// Generated as internal constructor for term x64_vfmadd132.
8992
0
pub fn constructor_x64_vfmadd132<C: Context>(
8993
0
    ctx: &mut C,
8994
0
    arg0: Type,
8995
0
    arg1: Xmm,
8996
0
    arg2: Xmm,
8997
0
    arg3: &XmmMem,
8998
0
) -> Xmm {
8999
0
    match arg0 {
9000
        F32 => {
9001
0
            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132ss, arg1, arg2, arg3);
9002
0
            // Rule at src/isa/x64/inst.isle line 4264.
9003
0
            return v5;
9004
        }
9005
        F64 => {
9006
0
            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132sd, arg1, arg2, arg3);
9007
0
            // Rule at src/isa/x64/inst.isle line 4265.
9008
0
            return v7;
9009
        }
9010
        F32X4 => {
9011
0
            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132ps, arg1, arg2, arg3);
9012
0
            // Rule at src/isa/x64/inst.isle line 4266.
9013
0
            return v9;
9014
        }
9015
        F64X2 => {
9016
0
            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfmadd132pd, arg1, arg2, arg3);
9017
0
            // Rule at src/isa/x64/inst.isle line 4267.
9018
0
            return v11;
9019
        }
9020
0
        _ => {}
9021
0
    }
9022
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_vfmadd132", "src/isa/x64/inst.isle line 4263")
9023
0
}
9024
9025
// Generated as internal constructor for term x64_vfnmadd213.
9026
0
pub fn constructor_x64_vfnmadd213<C: Context>(
9027
0
    ctx: &mut C,
9028
0
    arg0: Type,
9029
0
    arg1: Xmm,
9030
0
    arg2: Xmm,
9031
0
    arg3: &XmmMem,
9032
0
) -> Xmm {
9033
0
    match arg0 {
9034
        F32 => {
9035
0
            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213ss, arg1, arg2, arg3);
9036
0
            // Rule at src/isa/x64/inst.isle line 4271.
9037
0
            return v5;
9038
        }
9039
        F64 => {
9040
0
            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213sd, arg1, arg2, arg3);
9041
0
            // Rule at src/isa/x64/inst.isle line 4272.
9042
0
            return v7;
9043
        }
9044
        F32X4 => {
9045
0
            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213ps, arg1, arg2, arg3);
9046
0
            // Rule at src/isa/x64/inst.isle line 4273.
9047
0
            return v9;
9048
        }
9049
        F64X2 => {
9050
0
            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd213pd, arg1, arg2, arg3);
9051
0
            // Rule at src/isa/x64/inst.isle line 4274.
9052
0
            return v11;
9053
        }
9054
0
        _ => {}
9055
0
    }
9056
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_vfnmadd213", "src/isa/x64/inst.isle line 4270")
9057
0
}
9058
9059
// Generated as internal constructor for term x64_vfnmadd132.
9060
0
pub fn constructor_x64_vfnmadd132<C: Context>(
9061
0
    ctx: &mut C,
9062
0
    arg0: Type,
9063
0
    arg1: Xmm,
9064
0
    arg2: Xmm,
9065
0
    arg3: &XmmMem,
9066
0
) -> Xmm {
9067
0
    match arg0 {
9068
        F32 => {
9069
0
            let v5 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132ss, arg1, arg2, arg3);
9070
0
            // Rule at src/isa/x64/inst.isle line 4278.
9071
0
            return v5;
9072
        }
9073
        F64 => {
9074
0
            let v7 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132sd, arg1, arg2, arg3);
9075
0
            // Rule at src/isa/x64/inst.isle line 4279.
9076
0
            return v7;
9077
        }
9078
        F32X4 => {
9079
0
            let v9 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132ps, arg1, arg2, arg3);
9080
0
            // Rule at src/isa/x64/inst.isle line 4280.
9081
0
            return v9;
9082
        }
9083
        F64X2 => {
9084
0
            let v11 = constructor_xmm_rmr_vex3(ctx, &AvxOpcode::Vfnmadd132pd, arg1, arg2, arg3);
9085
0
            // Rule at src/isa/x64/inst.isle line 4281.
9086
0
            return v11;
9087
        }
9088
0
        _ => {}
9089
0
    }
9090
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_vfnmadd132", "src/isa/x64/inst.isle line 4277")
9091
0
}
9092
9093
// Generated as internal constructor for term x64_sqrtss.
9094
0
pub fn constructor_x64_sqrtss<C: Context>(
9095
0
    ctx: &mut C,
9096
0
    arg0: Xmm,
9097
0
    arg1: &XmmMem,
9098
0
) -> Xmm {
9099
0
    let v4 = C::use_avx(ctx);
9100
0
    if v4 == true {
9101
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9102
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsqrtss, arg0, v6);
9103
0
        // Rule at src/isa/x64/inst.isle line 4293.
9104
0
        return v7;
9105
0
    }
9106
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Sqrtss, arg0, arg1);
9107
0
    // Rule at src/isa/x64/inst.isle line 4292.
9108
0
    return v3;
9109
0
}
9110
9111
// Generated as internal constructor for term x64_sqrtsd.
9112
0
pub fn constructor_x64_sqrtsd<C: Context>(
9113
0
    ctx: &mut C,
9114
0
    arg0: Xmm,
9115
0
    arg1: &XmmMem,
9116
0
) -> Xmm {
9117
0
    let v4 = C::use_avx(ctx);
9118
0
    if v4 == true {
9119
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9120
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vsqrtsd, arg0, v6);
9121
0
        // Rule at src/isa/x64/inst.isle line 4302.
9122
0
        return v7;
9123
0
    }
9124
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Sqrtsd, arg0, arg1);
9125
0
    // Rule at src/isa/x64/inst.isle line 4301.
9126
0
    return v3;
9127
0
}
9128
9129
// Generated as internal constructor for term x64_sqrtps.
9130
0
pub fn constructor_x64_sqrtps<C: Context>(
9131
0
    ctx: &mut C,
9132
0
    arg0: &XmmMem,
9133
0
) -> Xmm {
9134
0
    let v4 = C::use_avx(ctx);
9135
0
    if v4 == true {
9136
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtps, arg0);
9137
0
        // Rule at src/isa/x64/inst.isle line 4309.
9138
0
        return v6;
9139
0
    }
9140
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9141
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Sqrtps, v2);
9142
0
    // Rule at src/isa/x64/inst.isle line 4308.
9143
0
    return v3;
9144
0
}
9145
9146
// Generated as internal constructor for term x64_sqrtpd.
9147
0
pub fn constructor_x64_sqrtpd<C: Context>(
9148
0
    ctx: &mut C,
9149
0
    arg0: &XmmMem,
9150
0
) -> Xmm {
9151
0
    let v4 = C::use_avx(ctx);
9152
0
    if v4 == true {
9153
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vsqrtpd, arg0);
9154
0
        // Rule at src/isa/x64/inst.isle line 4316.
9155
0
        return v6;
9156
0
    }
9157
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9158
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Sqrtpd, v2);
9159
0
    // Rule at src/isa/x64/inst.isle line 4315.
9160
0
    return v3;
9161
0
}
9162
9163
// Generated as internal constructor for term x64_cvtss2sd.
9164
0
pub fn constructor_x64_cvtss2sd<C: Context>(
9165
0
    ctx: &mut C,
9166
0
    arg0: Xmm,
9167
0
    arg1: &XmmMem,
9168
0
) -> Xmm {
9169
0
    let v4 = C::use_avx(ctx);
9170
0
    if v4 == true {
9171
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9172
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vcvtss2sd, arg0, v6);
9173
0
        // Rule at src/isa/x64/inst.isle line 4325.
9174
0
        return v7;
9175
0
    }
9176
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Cvtss2sd, arg0, arg1);
9177
0
    // Rule at src/isa/x64/inst.isle line 4324.
9178
0
    return v3;
9179
0
}
9180
9181
// Generated as internal constructor for term x64_cvtsd2ss.
9182
0
pub fn constructor_x64_cvtsd2ss<C: Context>(
9183
0
    ctx: &mut C,
9184
0
    arg0: Xmm,
9185
0
    arg1: &XmmMem,
9186
0
) -> Xmm {
9187
0
    let v4 = C::use_avx(ctx);
9188
0
    if v4 == true {
9189
0
        let v6 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9190
0
        let v7 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vcvtsd2ss, arg0, v6);
9191
0
        // Rule at src/isa/x64/inst.isle line 4334.
9192
0
        return v7;
9193
0
    }
9194
0
    let v3 = constructor_xmm_rm_r_unaligned(ctx, &SseOpcode::Cvtsd2ss, arg0, arg1);
9195
0
    // Rule at src/isa/x64/inst.isle line 4333.
9196
0
    return v3;
9197
0
}
9198
9199
// Generated as internal constructor for term x64_cvtdq2ps.
9200
0
pub fn constructor_x64_cvtdq2ps<C: Context>(
9201
0
    ctx: &mut C,
9202
0
    arg0: &XmmMem,
9203
0
) -> Xmm {
9204
0
    let v4 = C::use_avx(ctx);
9205
0
    if v4 == true {
9206
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtdq2ps, arg0);
9207
0
        // Rule at src/isa/x64/inst.isle line 4341.
9208
0
        return v6;
9209
0
    }
9210
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9211
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtdq2ps, v2);
9212
0
    // Rule at src/isa/x64/inst.isle line 4340.
9213
0
    return v3;
9214
0
}
9215
9216
// Generated as internal constructor for term x64_cvtps2pd.
9217
0
pub fn constructor_x64_cvtps2pd<C: Context>(
9218
0
    ctx: &mut C,
9219
0
    arg0: &XmmMem,
9220
0
) -> Xmm {
9221
0
    let v4 = C::use_avx(ctx);
9222
0
    if v4 == true {
9223
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtps2pd, arg0);
9224
0
        // Rule at src/isa/x64/inst.isle line 4348.
9225
0
        return v6;
9226
0
    }
9227
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9228
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtps2pd, v2);
9229
0
    // Rule at src/isa/x64/inst.isle line 4347.
9230
0
    return v3;
9231
0
}
9232
9233
// Generated as internal constructor for term x64_cvtpd2ps.
9234
0
pub fn constructor_x64_cvtpd2ps<C: Context>(
9235
0
    ctx: &mut C,
9236
0
    arg0: &XmmMem,
9237
0
) -> Xmm {
9238
0
    let v4 = C::use_avx(ctx);
9239
0
    if v4 == true {
9240
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtpd2ps, arg0);
9241
0
        // Rule at src/isa/x64/inst.isle line 4355.
9242
0
        return v6;
9243
0
    }
9244
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9245
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtpd2ps, v2);
9246
0
    // Rule at src/isa/x64/inst.isle line 4354.
9247
0
    return v3;
9248
0
}
9249
9250
// Generated as internal constructor for term x64_cvtdq2pd.
9251
0
pub fn constructor_x64_cvtdq2pd<C: Context>(
9252
0
    ctx: &mut C,
9253
0
    arg0: &XmmMem,
9254
0
) -> Xmm {
9255
0
    let v4 = C::use_avx(ctx);
9256
0
    if v4 == true {
9257
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvtdq2pd, arg0);
9258
0
        // Rule at src/isa/x64/inst.isle line 4362.
9259
0
        return v6;
9260
0
    }
9261
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9262
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvtdq2pd, v2);
9263
0
    // Rule at src/isa/x64/inst.isle line 4361.
9264
0
    return v3;
9265
0
}
9266
9267
// Generated as internal constructor for term x64_cvtsi2ss.
9268
0
pub fn constructor_x64_cvtsi2ss<C: Context>(
9269
0
    ctx: &mut C,
9270
0
    arg0: Type,
9271
0
    arg1: Xmm,
9272
0
    arg2: &GprMem,
9273
0
) -> Xmm {
9274
0
    let v6 = C::use_avx(ctx);
9275
0
    if v6 == true {
9276
0
        let v4 = &C::raw_operand_size_of_type(ctx, arg0);
9277
0
        let v8 = constructor_cvt_int_to_float_vex(ctx, &AvxOpcode::Vcvtsi2ss, arg1, arg2, v4);
9278
0
        // Rule at src/isa/x64/inst.isle line 4370.
9279
0
        return v8;
9280
0
    }
9281
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
9282
0
    let v5 = constructor_cvt_int_to_float(ctx, &SseOpcode::Cvtsi2ss, arg1, arg2, v4);
9283
0
    // Rule at src/isa/x64/inst.isle line 4368.
9284
0
    return v5;
9285
0
}
9286
9287
// Generated as internal constructor for term x64_cvtsi2sd.
9288
0
pub fn constructor_x64_cvtsi2sd<C: Context>(
9289
0
    ctx: &mut C,
9290
0
    arg0: Type,
9291
0
    arg1: Xmm,
9292
0
    arg2: &GprMem,
9293
0
) -> Xmm {
9294
0
    let v6 = C::use_avx(ctx);
9295
0
    if v6 == true {
9296
0
        let v4 = &C::raw_operand_size_of_type(ctx, arg0);
9297
0
        let v8 = constructor_cvt_int_to_float_vex(ctx, &AvxOpcode::Vcvtsi2sd, arg1, arg2, v4);
9298
0
        // Rule at src/isa/x64/inst.isle line 4378.
9299
0
        return v8;
9300
0
    }
9301
0
    let v4 = &C::raw_operand_size_of_type(ctx, arg0);
9302
0
    let v5 = constructor_cvt_int_to_float(ctx, &SseOpcode::Cvtsi2sd, arg1, arg2, v4);
9303
0
    // Rule at src/isa/x64/inst.isle line 4376.
9304
0
    return v5;
9305
0
}
9306
9307
// Generated as internal constructor for term x64_cvttps2dq.
9308
0
pub fn constructor_x64_cvttps2dq<C: Context>(
9309
0
    ctx: &mut C,
9310
0
    arg0: &XmmMem,
9311
0
) -> Xmm {
9312
0
    let v4 = C::use_avx(ctx);
9313
0
    if v4 == true {
9314
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvttps2dq, arg0);
9315
0
        // Rule at src/isa/x64/inst.isle line 4386.
9316
0
        return v6;
9317
0
    }
9318
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9319
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvttps2dq, v2);
9320
0
    // Rule at src/isa/x64/inst.isle line 4384.
9321
0
    return v3;
9322
0
}
9323
9324
// Generated as internal constructor for term x64_cvttpd2dq.
9325
0
pub fn constructor_x64_cvttpd2dq<C: Context>(
9326
0
    ctx: &mut C,
9327
0
    arg0: &XmmMem,
9328
0
) -> Xmm {
9329
0
    let v4 = C::use_avx(ctx);
9330
0
    if v4 == true {
9331
0
        let v6 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vcvttpd2dq, arg0);
9332
0
        // Rule at src/isa/x64/inst.isle line 4394.
9333
0
        return v6;
9334
0
    }
9335
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg0);
9336
0
    let v3 = constructor_xmm_unary_rm_r(ctx, &SseOpcode::Cvttpd2dq, v2);
9337
0
    // Rule at src/isa/x64/inst.isle line 4392.
9338
0
    return v3;
9339
0
}
9340
9341
// Generated as internal constructor for term x64_pcmpeq.
9342
0
pub fn constructor_x64_pcmpeq<C: Context>(
9343
0
    ctx: &mut C,
9344
0
    arg0: Type,
9345
0
    arg1: Xmm,
9346
0
    arg2: &XmmMem,
9347
0
) -> Xmm {
9348
0
    match arg0 {
9349
        I8X16 => {
9350
0
            let v3 = constructor_x64_pcmpeqb(ctx, arg1, arg2);
9351
0
            // Rule at src/isa/x64/inst.isle line 4400.
9352
0
            return v3;
9353
        }
9354
        I16X8 => {
9355
0
            let v4 = constructor_x64_pcmpeqw(ctx, arg1, arg2);
9356
0
            // Rule at src/isa/x64/inst.isle line 4401.
9357
0
            return v4;
9358
        }
9359
        I32X4 => {
9360
0
            let v5 = constructor_x64_pcmpeqd(ctx, arg1, arg2);
9361
0
            // Rule at src/isa/x64/inst.isle line 4402.
9362
0
            return v5;
9363
        }
9364
        I64X2 => {
9365
0
            let v6 = C::use_sse41(ctx);
9366
0
            if v6 == true {
9367
0
                let v7 = constructor_x64_pcmpeqq(ctx, arg1, arg2);
9368
0
                // Rule at src/isa/x64/inst.isle line 4403.
9369
0
                return v7;
9370
0
            }
9371
0
            let v5 = constructor_x64_pcmpeqd(ctx, arg1, arg2);
9372
0
            let v8 = &C::xmm_to_xmm_mem(ctx, v5);
9373
0
            let v10 = constructor_x64_pshufd(ctx, v8, 0xB1);
9374
0
            let v11 = &C::xmm_to_xmm_mem(ctx, v10);
9375
0
            let v12 = constructor_x64_pand(ctx, v5, v11);
9376
0
            // Rule at src/isa/x64/inst.isle line 4412.
9377
0
            return v12;
9378
        }
9379
0
        _ => {}
9380
0
    }
9381
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pcmpeq", "src/isa/x64/inst.isle line 4399")
9382
0
}
9383
9384
// Generated as internal constructor for term x64_pcmpeqb.
9385
0
pub fn constructor_x64_pcmpeqb<C: Context>(
9386
0
    ctx: &mut C,
9387
0
    arg0: Xmm,
9388
0
    arg1: &XmmMem,
9389
0
) -> Xmm {
9390
0
    let v5 = C::use_avx(ctx);
9391
0
    if v5 == true {
9392
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9393
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqb, arg0, v7);
9394
0
        // Rule at src/isa/x64/inst.isle line 4419.
9395
0
        return v8;
9396
0
    }
9397
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9398
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqb, arg0, v3);
9399
0
    // Rule at src/isa/x64/inst.isle line 4418.
9400
0
    return v4;
9401
0
}
9402
9403
// Generated as internal constructor for term x64_pcmpeqw.
9404
0
pub fn constructor_x64_pcmpeqw<C: Context>(
9405
0
    ctx: &mut C,
9406
0
    arg0: Xmm,
9407
0
    arg1: &XmmMem,
9408
0
) -> Xmm {
9409
0
    let v5 = C::use_avx(ctx);
9410
0
    if v5 == true {
9411
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9412
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqw, arg0, v7);
9413
0
        // Rule at src/isa/x64/inst.isle line 4424.
9414
0
        return v8;
9415
0
    }
9416
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9417
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqw, arg0, v3);
9418
0
    // Rule at src/isa/x64/inst.isle line 4423.
9419
0
    return v4;
9420
0
}
9421
9422
// Generated as internal constructor for term x64_pcmpeqd.
9423
0
pub fn constructor_x64_pcmpeqd<C: Context>(
9424
0
    ctx: &mut C,
9425
0
    arg0: Xmm,
9426
0
    arg1: &XmmMem,
9427
0
) -> Xmm {
9428
0
    let v5 = C::use_avx(ctx);
9429
0
    if v5 == true {
9430
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9431
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqd, arg0, v7);
9432
0
        // Rule at src/isa/x64/inst.isle line 4429.
9433
0
        return v8;
9434
0
    }
9435
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9436
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqd, arg0, v3);
9437
0
    // Rule at src/isa/x64/inst.isle line 4428.
9438
0
    return v4;
9439
0
}
9440
9441
// Generated as internal constructor for term x64_pcmpeqq.
9442
0
pub fn constructor_x64_pcmpeqq<C: Context>(
9443
0
    ctx: &mut C,
9444
0
    arg0: Xmm,
9445
0
    arg1: &XmmMem,
9446
0
) -> Xmm {
9447
0
    let v5 = C::use_avx(ctx);
9448
0
    if v5 == true {
9449
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9450
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpeqq, arg0, v7);
9451
0
        // Rule at src/isa/x64/inst.isle line 4434.
9452
0
        return v8;
9453
0
    }
9454
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9455
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpeqq, arg0, v3);
9456
0
    // Rule at src/isa/x64/inst.isle line 4433.
9457
0
    return v4;
9458
0
}
9459
9460
// Generated as internal constructor for term x64_pcmpgt.
9461
0
pub fn constructor_x64_pcmpgt<C: Context>(
9462
0
    ctx: &mut C,
9463
0
    arg0: Type,
9464
0
    arg1: Xmm,
9465
0
    arg2: &XmmMem,
9466
0
) -> Xmm {
9467
0
    match arg0 {
9468
        I8X16 => {
9469
0
            let v3 = constructor_x64_pcmpgtb(ctx, arg1, arg2);
9470
0
            // Rule at src/isa/x64/inst.isle line 4440.
9471
0
            return v3;
9472
        }
9473
        I16X8 => {
9474
0
            let v4 = constructor_x64_pcmpgtw(ctx, arg1, arg2);
9475
0
            // Rule at src/isa/x64/inst.isle line 4441.
9476
0
            return v4;
9477
        }
9478
        I32X4 => {
9479
0
            let v5 = constructor_x64_pcmpgtd(ctx, arg1, arg2);
9480
0
            // Rule at src/isa/x64/inst.isle line 4442.
9481
0
            return v5;
9482
        }
9483
        I64X2 => {
9484
0
            let v6 = C::use_sse42(ctx);
9485
0
            if v6 == true {
9486
0
                let v7 = constructor_x64_pcmpgtq(ctx, arg1, arg2);
9487
0
                // Rule at src/isa/x64/inst.isle line 4446.
9488
0
                return v7;
9489
0
            }
9490
0
            let v9 = C::emit_u128_le_const(ctx, 0x800000000000000080000000);
9491
0
            let v10 = &constructor_const_to_xmm_mem(ctx, v9);
9492
0
            let v11 = constructor_x64_movdqu_load(ctx, v10);
9493
0
            let v12 = &C::xmm_to_xmm_mem(ctx, arg1);
9494
0
            let v13 = constructor_x64_pxor(ctx, v11, v12);
9495
0
            let v14 = constructor_x64_pxor(ctx, v11, arg2);
9496
0
            let v15 = &C::xmm_to_xmm_mem(ctx, v14);
9497
0
            let v16 = constructor_x64_pcmpgtd(ctx, v13, v15);
9498
0
            let v17 = &C::xmm_to_xmm_mem(ctx, v16);
9499
0
            let v19 = constructor_x64_pshufd(ctx, v17, 0xA0);
9500
0
            let v20 = &C::xmm_to_xmm_mem(ctx, v16);
9501
0
            let v22 = constructor_x64_pshufd(ctx, v20, 0xF5);
9502
0
            let v23 = &C::xmm_to_xmm_mem(ctx, v14);
9503
0
            let v24 = constructor_x64_pcmpeqd(ctx, v13, v23);
9504
0
            let v25 = &C::xmm_to_xmm_mem(ctx, v24);
9505
0
            let v26 = constructor_x64_pshufd(ctx, v25, 0xF5);
9506
0
            let v27 = &C::xmm_to_xmm_mem(ctx, v26);
9507
0
            let v28 = constructor_x64_pand(ctx, v19, v27);
9508
0
            let v29 = &C::xmm_to_xmm_mem(ctx, v22);
9509
0
            let v30 = constructor_x64_por(ctx, v28, v29);
9510
0
            // Rule at src/isa/x64/inst.isle line 4475.
9511
0
            return v30;
9512
        }
9513
0
        _ => {}
9514
0
    }
9515
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_pcmpgt", "src/isa/x64/inst.isle line 4439")
9516
0
}
9517
9518
// Generated as internal constructor for term x64_pcmpgtb.
9519
0
pub fn constructor_x64_pcmpgtb<C: Context>(
9520
0
    ctx: &mut C,
9521
0
    arg0: Xmm,
9522
0
    arg1: &XmmMem,
9523
0
) -> Xmm {
9524
0
    let v5 = C::use_avx(ctx);
9525
0
    if v5 == true {
9526
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9527
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtb, arg0, v7);
9528
0
        // Rule at src/isa/x64/inst.isle line 4491.
9529
0
        return v8;
9530
0
    }
9531
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9532
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtb, arg0, v3);
9533
0
    // Rule at src/isa/x64/inst.isle line 4490.
9534
0
    return v4;
9535
0
}
9536
9537
// Generated as internal constructor for term x64_pcmpgtw.
9538
0
pub fn constructor_x64_pcmpgtw<C: Context>(
9539
0
    ctx: &mut C,
9540
0
    arg0: Xmm,
9541
0
    arg1: &XmmMem,
9542
0
) -> Xmm {
9543
0
    let v5 = C::use_avx(ctx);
9544
0
    if v5 == true {
9545
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9546
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtw, arg0, v7);
9547
0
        // Rule at src/isa/x64/inst.isle line 4496.
9548
0
        return v8;
9549
0
    }
9550
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9551
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtw, arg0, v3);
9552
0
    // Rule at src/isa/x64/inst.isle line 4495.
9553
0
    return v4;
9554
0
}
9555
9556
// Generated as internal constructor for term x64_pcmpgtd.
9557
0
pub fn constructor_x64_pcmpgtd<C: Context>(
9558
0
    ctx: &mut C,
9559
0
    arg0: Xmm,
9560
0
    arg1: &XmmMem,
9561
0
) -> Xmm {
9562
0
    let v5 = C::use_avx(ctx);
9563
0
    if v5 == true {
9564
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9565
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtd, arg0, v7);
9566
0
        // Rule at src/isa/x64/inst.isle line 4501.
9567
0
        return v8;
9568
0
    }
9569
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9570
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtd, arg0, v3);
9571
0
    // Rule at src/isa/x64/inst.isle line 4500.
9572
0
    return v4;
9573
0
}
9574
9575
// Generated as internal constructor for term x64_pcmpgtq.
9576
0
pub fn constructor_x64_pcmpgtq<C: Context>(
9577
0
    ctx: &mut C,
9578
0
    arg0: Xmm,
9579
0
    arg1: &XmmMem,
9580
0
) -> Xmm {
9581
0
    let v5 = C::use_avx(ctx);
9582
0
    if v5 == true {
9583
0
        let v7 = &C::xmm_mem_to_xmm_mem_imm(ctx, arg1);
9584
0
        let v8 = constructor_xmm_rmir_vex(ctx, &AvxOpcode::Vpcmpgtq, arg0, v7);
9585
0
        // Rule at src/isa/x64/inst.isle line 4506.
9586
0
        return v8;
9587
0
    }
9588
0
    let v3 = &C::xmm_mem_to_xmm_mem_aligned(ctx, arg1);
9589
0
    let v4 = constructor_xmm_rm_r(ctx, &SseOpcode::Pcmpgtq, arg0, v3);
9590
0
    // Rule at src/isa/x64/inst.isle line 4505.
9591
0
    return v4;
9592
0
}
9593
9594
// Generated as internal constructor for term alu_rm.
9595
1.86k
pub fn constructor_alu_rm<C: Context>(
9596
1.86k
    ctx: &mut C,
9597
1.86k
    arg0: Type,
9598
1.86k
    arg1: &AluRmiROpcode,
9599
1.86k
    arg2: &Amode,
9600
1.86k
    arg3: Gpr,
9601
1.86k
) -> SideEffectNoResult {
9602
1.86k
    let v4 = &C::operand_size_of_type_32_64(ctx, arg0);
9603
1.86k
    let v5 = &C::amode_to_synthetic_amode(ctx, arg2);
9604
1.86k
    let v6 = MInst::AluRM {
9605
1.86k
        size: v4.clone(),
9606
1.86k
        op: arg1.clone(),
9607
1.86k
        src1_dst: v5.clone(),
9608
1.86k
        src2: arg3,
9609
1.86k
    };
9610
1.86k
    let v7 = SideEffectNoResult::Inst {
9611
1.86k
        inst: v6,
9612
1.86k
    };
9613
1.86k
    // Rule at src/isa/x64/inst.isle line 4512.
9614
1.86k
    return v7;
9615
1.86k
}
9616
9617
// Generated as internal constructor for term x64_add_mem.
9618
1.86k
pub fn constructor_x64_add_mem<C: Context>(
9619
1.86k
    ctx: &mut C,
9620
1.86k
    arg0: Type,
9621
1.86k
    arg1: &Amode,
9622
1.86k
    arg2: Gpr,
9623
1.86k
) -> SideEffectNoResult {
9624
1.86k
    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Add, arg1, arg2);
9625
1.86k
    // Rule at src/isa/x64/inst.isle line 4517.
9626
1.86k
    return v4.clone();
9627
1.86k
}
9628
9629
// Generated as internal constructor for term x64_sub_mem.
9630
7
pub fn constructor_x64_sub_mem<C: Context>(
9631
7
    ctx: &mut C,
9632
7
    arg0: Type,
9633
7
    arg1: &Amode,
9634
7
    arg2: Gpr,
9635
7
) -> SideEffectNoResult {
9636
7
    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Sub, arg1, arg2);
9637
7
    // Rule at src/isa/x64/inst.isle line 4521.
9638
7
    return v4.clone();
9639
7
}
9640
9641
// Generated as internal constructor for term x64_and_mem.
9642
0
pub fn constructor_x64_and_mem<C: Context>(
9643
0
    ctx: &mut C,
9644
0
    arg0: Type,
9645
0
    arg1: &Amode,
9646
0
    arg2: Gpr,
9647
0
) -> SideEffectNoResult {
9648
0
    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::And, arg1, arg2);
9649
0
    // Rule at src/isa/x64/inst.isle line 4525.
9650
0
    return v4.clone();
9651
0
}
9652
9653
// Generated as internal constructor for term x64_or_mem.
9654
0
pub fn constructor_x64_or_mem<C: Context>(
9655
0
    ctx: &mut C,
9656
0
    arg0: Type,
9657
0
    arg1: &Amode,
9658
0
    arg2: Gpr,
9659
0
) -> SideEffectNoResult {
9660
0
    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Or, arg1, arg2);
9661
0
    // Rule at src/isa/x64/inst.isle line 4529.
9662
0
    return v4.clone();
9663
0
}
9664
9665
// Generated as internal constructor for term x64_xor_mem.
9666
0
pub fn constructor_x64_xor_mem<C: Context>(
9667
0
    ctx: &mut C,
9668
0
    arg0: Type,
9669
0
    arg1: &Amode,
9670
0
    arg2: Gpr,
9671
0
) -> SideEffectNoResult {
9672
0
    let v4 = &constructor_alu_rm(ctx, arg0, &AluRmiROpcode::Xor, arg1, arg2);
9673
0
    // Rule at src/isa/x64/inst.isle line 4533.
9674
0
    return v4.clone();
9675
0
}
9676
9677
// Generated as internal constructor for term trap_if.
9678
0
pub fn constructor_trap_if<C: Context>(
9679
0
    ctx: &mut C,
9680
0
    arg0: &CC,
9681
0
    arg1: &TrapCode,
9682
0
) -> ConsumesFlags {
9683
0
    let v2 = MInst::TrapIf {
9684
0
        cc: arg0.clone(),
9685
0
        trap_code: arg1.clone(),
9686
0
    };
9687
0
    let v3 = ConsumesFlags::ConsumesFlagsSideEffect {
9688
0
        inst: v2,
9689
0
    };
9690
0
    // Rule at src/isa/x64/inst.isle line 4538.
9691
0
    return v3;
9692
0
}
9693
9694
// Generated as internal constructor for term trap_if_and.
9695
0
pub fn constructor_trap_if_and<C: Context>(
9696
0
    ctx: &mut C,
9697
0
    arg0: &CC,
9698
0
    arg1: &CC,
9699
0
    arg2: &TrapCode,
9700
0
) -> ConsumesFlags {
9701
0
    let v3 = MInst::TrapIfAnd {
9702
0
        cc1: arg0.clone(),
9703
0
        cc2: arg1.clone(),
9704
0
        trap_code: arg2.clone(),
9705
0
    };
9706
0
    let v4 = ConsumesFlags::ConsumesFlagsSideEffect {
9707
0
        inst: v3,
9708
0
    };
9709
0
    // Rule at src/isa/x64/inst.isle line 4543.
9710
0
    return v4;
9711
0
}
9712
9713
// Generated as internal constructor for term trap_if_or.
9714
0
pub fn constructor_trap_if_or<C: Context>(
9715
0
    ctx: &mut C,
9716
0
    arg0: &CC,
9717
0
    arg1: &CC,
9718
0
    arg2: &TrapCode,
9719
0
) -> ConsumesFlags {
9720
0
    let v3 = MInst::TrapIfOr {
9721
0
        cc1: arg0.clone(),
9722
0
        cc2: arg1.clone(),
9723
0
        trap_code: arg2.clone(),
9724
0
    };
9725
0
    let v4 = ConsumesFlags::ConsumesFlagsSideEffect {
9726
0
        inst: v3,
9727
0
    };
9728
0
    // Rule at src/isa/x64/inst.isle line 4548.
9729
0
    return v4;
9730
0
}
9731
9732
// Generated as internal constructor for term trap_if_icmp.
9733
0
pub fn constructor_trap_if_icmp<C: Context>(
9734
0
    ctx: &mut C,
9735
0
    arg0: &IcmpCondResult,
9736
0
    arg1: &TrapCode,
9737
0
) -> SideEffectNoResult {
9738
0
    if let &IcmpCondResult::Condition {
9739
0
        producer: ref v1,
9740
0
        cc: ref v2,
9741
0
    } = arg0 {
9742
0
        let v4 = &constructor_trap_if(ctx, v2, arg1);
9743
0
        let v5 = &constructor_with_flags_side_effect(ctx, v1, v4);
9744
0
        // Rule at src/isa/x64/inst.isle line 4552.
9745
0
        return v5.clone();
9746
0
    }
9747
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "trap_if_icmp", "src/isa/x64/inst.isle line 4551")
9748
0
}
9749
9750
// Generated as internal constructor for term trap_if_fcmp.
9751
0
pub fn constructor_trap_if_fcmp<C: Context>(
9752
0
    ctx: &mut C,
9753
0
    arg0: &FcmpCondResult,
9754
0
    arg1: &TrapCode,
9755
0
) -> SideEffectNoResult {
9756
0
    match arg0 {
9757
        &FcmpCondResult::Condition {
9758
0
            producer: ref v1,
9759
0
            cc: ref v2,
9760
0
        } => {
9761
0
            let v4 = &constructor_trap_if(ctx, v2, arg1);
9762
0
            let v5 = &constructor_with_flags_side_effect(ctx, v1, v4);
9763
0
            // Rule at src/isa/x64/inst.isle line 4556.
9764
0
            return v5.clone();
9765
        }
9766
        &FcmpCondResult::AndCondition {
9767
0
            producer: ref v6,
9768
0
            cc1: ref v7,
9769
0
            cc2: ref v8,
9770
0
        } => {
9771
0
            let v9 = &constructor_trap_if_and(ctx, v7, v8, arg1);
9772
0
            let v10 = &constructor_with_flags_side_effect(ctx, v6, v9);
9773
0
            // Rule at src/isa/x64/inst.isle line 4558.
9774
0
            return v10.clone();
9775
        }
9776
        &FcmpCondResult::OrCondition {
9777
0
            producer: ref v11,
9778
0
            cc1: ref v12,
9779
0
            cc2: ref v13,
9780
0
        } => {
9781
0
            let v14 = &constructor_trap_if_or(ctx, v12, v13, arg1);
9782
0
            let v15 = &constructor_with_flags_side_effect(ctx, v11, v14);
9783
0
            // Rule at src/isa/x64/inst.isle line 4560.
9784
0
            return v15.clone();
9785
        }
9786
0
        _ => {}
9787
0
    }
9788
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "trap_if_fcmp", "src/isa/x64/inst.isle line 4555")
9789
0
}
9790
9791
// Generated as internal constructor for term x64_movddup.
9792
0
pub fn constructor_x64_movddup<C: Context>(
9793
0
    ctx: &mut C,
9794
0
    arg0: &XmmMem,
9795
0
) -> Xmm {
9796
0
    let v3 = C::use_avx(ctx);
9797
0
    if v3 == true {
9798
0
        let v5 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vmovddup, arg0);
9799
0
        // Rule at src/isa/x64/inst.isle line 4567.
9800
0
        return v5;
9801
0
    }
9802
0
    let v2 = constructor_xmm_unary_rm_r_unaligned(ctx, &SseOpcode::Movddup, arg0);
9803
0
    // Rule at src/isa/x64/inst.isle line 4565.
9804
0
    return v2;
9805
0
}
9806
9807
// Generated as internal constructor for term x64_vpbroadcastb.
9808
0
pub fn constructor_x64_vpbroadcastb<C: Context>(
9809
0
    ctx: &mut C,
9810
0
    arg0: &XmmMem,
9811
0
) -> Xmm {
9812
0
    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpbroadcastb, arg0);
9813
0
    // Rule at src/isa/x64/inst.isle line 4573.
9814
0
    return v2;
9815
0
}
9816
9817
// Generated as internal constructor for term x64_vpbroadcastw.
9818
0
pub fn constructor_x64_vpbroadcastw<C: Context>(
9819
0
    ctx: &mut C,
9820
0
    arg0: &XmmMem,
9821
0
) -> Xmm {
9822
0
    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpbroadcastw, arg0);
9823
0
    // Rule at src/isa/x64/inst.isle line 4578.
9824
0
    return v2;
9825
0
}
9826
9827
// Generated as internal constructor for term x64_vpbroadcastd.
9828
0
pub fn constructor_x64_vpbroadcastd<C: Context>(
9829
0
    ctx: &mut C,
9830
0
    arg0: &XmmMem,
9831
0
) -> Xmm {
9832
0
    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vpbroadcastd, arg0);
9833
0
    // Rule at src/isa/x64/inst.isle line 4583.
9834
0
    return v2;
9835
0
}
9836
9837
// Generated as internal constructor for term x64_vbroadcastss.
9838
0
pub fn constructor_x64_vbroadcastss<C: Context>(
9839
0
    ctx: &mut C,
9840
0
    arg0: &XmmMem,
9841
0
) -> Xmm {
9842
0
    let v2 = constructor_xmm_unary_rm_r_vex(ctx, &AvxOpcode::Vbroadcastss, arg0);
9843
0
    // Rule at src/isa/x64/inst.isle line 4588.
9844
0
    return v2;
9845
0
}
9846
9847
// Generated as internal constructor for term jmp_known.
9848
306k
pub fn constructor_jmp_known<C: Context>(
9849
306k
    ctx: &mut C,
9850
306k
    arg0: MachLabel,
9851
306k
) -> SideEffectNoResult {
9852
306k
    let v1 = MInst::JmpKnown {
9853
306k
        dst: arg0,
9854
306k
    };
9855
306k
    let v2 = SideEffectNoResult::Inst {
9856
306k
        inst: v1,
9857
306k
    };
9858
306k
    // Rule at src/isa/x64/inst.isle line 4595.
9859
306k
    return v2;
9860
306k
}
9861
9862
// Generated as internal constructor for term jmp_if.
9863
0
pub fn constructor_jmp_if<C: Context>(
9864
0
    ctx: &mut C,
9865
0
    arg0: &CC,
9866
0
    arg1: MachLabel,
9867
0
) -> ConsumesFlags {
9868
0
    let v2 = MInst::JmpIf {
9869
0
        cc: arg0.clone(),
9870
0
        taken: arg1,
9871
0
    };
9872
0
    let v3 = ConsumesFlags::ConsumesFlagsSideEffect {
9873
0
        inst: v2,
9874
0
    };
9875
0
    // Rule at src/isa/x64/inst.isle line 4599.
9876
0
    return v3;
9877
0
}
9878
9879
// Generated as internal constructor for term jmp_cond.
9880
406k
pub fn constructor_jmp_cond<C: Context>(
9881
406k
    ctx: &mut C,
9882
406k
    arg0: &CC,
9883
406k
    arg1: MachLabel,
9884
406k
    arg2: MachLabel,
9885
406k
) -> ConsumesFlags {
9886
406k
    let v3 = MInst::JmpCond {
9887
406k
        cc: arg0.clone(),
9888
406k
        taken: arg1,
9889
406k
        not_taken: arg2,
9890
406k
    };
9891
406k
    let v4 = ConsumesFlags::ConsumesFlagsSideEffect {
9892
406k
        inst: v3,
9893
406k
    };
9894
406k
    // Rule at src/isa/x64/inst.isle line 4604.
9895
406k
    return v4;
9896
406k
}
9897
9898
// Generated as internal constructor for term jmp_cond_icmp.
9899
303k
pub fn constructor_jmp_cond_icmp<C: Context>(
9900
303k
    ctx: &mut C,
9901
303k
    arg0: &IcmpCondResult,
9902
303k
    arg1: MachLabel,
9903
303k
    arg2: MachLabel,
9904
303k
) -> SideEffectNoResult {
9905
303k
    if let &IcmpCondResult::Condition {
9906
303k
        producer: ref v1,
9907
303k
        cc: ref v2,
9908
303k
    } = arg0 {
9909
303k
        let v5 = &constructor_jmp_cond(ctx, v2, arg1, arg2);
9910
303k
        let v6 = &constructor_with_flags_side_effect(ctx, v1, v5);
9911
303k
        // Rule at src/isa/x64/inst.isle line 4609.
9912
303k
        return v6.clone();
9913
303k
    }
9914
303k
unreachable!("no rule matched for term {} at {}; should it be partial?", "jmp_cond_icmp", "src/isa/x64/inst.isle line 4608")
9915
303k
}
9916
9917
// Generated as internal constructor for term jmp_cond_fcmp.
9918
0
pub fn constructor_jmp_cond_fcmp<C: Context>(
9919
0
    ctx: &mut C,
9920
0
    arg0: &FcmpCondResult,
9921
0
    arg1: MachLabel,
9922
0
    arg2: MachLabel,
9923
0
) -> SideEffectNoResult {
9924
0
    match arg0 {
9925
        &FcmpCondResult::Condition {
9926
0
            producer: ref v1,
9927
0
            cc: ref v2,
9928
0
        } => {
9929
0
            let v5 = &constructor_jmp_cond(ctx, v2, arg1, arg2);
9930
0
            let v6 = &constructor_with_flags_side_effect(ctx, v1, v5);
9931
0
            // Rule at src/isa/x64/inst.isle line 4614.
9932
0
            return v6.clone();
9933
        }
9934
        &FcmpCondResult::AndCondition {
9935
0
            producer: ref v7,
9936
0
            cc1: ref v8,
9937
0
            cc2: ref v9,
9938
0
        } => {
9939
0
            let v10 = &C::cc_invert(ctx, v8);
9940
0
            let v11 = &constructor_jmp_if(ctx, v10, arg2);
9941
0
            let v12 = &C::cc_invert(ctx, v9);
9942
0
            let v13 = &constructor_jmp_cond(ctx, v12, arg2, arg1);
9943
0
            let v14 = &constructor_consumes_flags_concat(ctx, v11, v13);
9944
0
            let v15 = &constructor_with_flags_side_effect(ctx, v7, v14);
9945
0
            // Rule at src/isa/x64/inst.isle line 4616.
9946
0
            return v15.clone();
9947
        }
9948
        &FcmpCondResult::OrCondition {
9949
0
            producer: ref v16,
9950
0
            cc1: ref v17,
9951
0
            cc2: ref v18,
9952
0
        } => {
9953
0
            let v19 = &constructor_jmp_if(ctx, v17, arg1);
9954
0
            let v20 = &constructor_jmp_cond(ctx, v18, arg1, arg2);
9955
0
            let v21 = &constructor_consumes_flags_concat(ctx, v19, v20);
9956
0
            let v22 = &constructor_with_flags_side_effect(ctx, v16, v21);
9957
0
            // Rule at src/isa/x64/inst.isle line 4621.
9958
0
            return v22.clone();
9959
        }
9960
0
        _ => {}
9961
0
    }
9962
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "jmp_cond_fcmp", "src/isa/x64/inst.isle line 4613")
9963
0
}
9964
9965
// Generated as internal constructor for term jmp_table_seq.
9966
15.0k
pub fn constructor_jmp_table_seq<C: Context>(
9967
15.0k
    ctx: &mut C,
9968
15.0k
    arg0: Type,
9969
15.0k
    arg1: Gpr,
9970
15.0k
    arg2: MachLabel,
9971
15.0k
    arg3: &BoxVecMachLabel,
9972
15.0k
) -> SideEffectNoResult {
9973
15.0k
    let v4 = C::temp_writable_gpr(ctx);
9974
15.0k
    let v5 = C::temp_writable_gpr(ctx);
9975
15.0k
    let v6 = C::gpr_to_reg(ctx, arg1);
9976
15.0k
    let v7 = C::writable_gpr_to_reg(ctx, v4);
9977
15.0k
    let v8 = C::writable_gpr_to_reg(ctx, v5);
9978
15.0k
    let v9 = MInst::JmpTableSeq {
9979
15.0k
        idx: v6,
9980
15.0k
        tmp1: v7,
9981
15.0k
        tmp2: v8,
9982
15.0k
        default_target: arg2,
9983
15.0k
        targets: arg3.clone(),
9984
15.0k
    };
9985
15.0k
    let v10 = SideEffectNoResult::Inst {
9986
15.0k
        inst: v9,
9987
15.0k
    };
9988
15.0k
    // Rule at src/isa/x64/inst.isle line 4641.
9989
15.0k
    return v10;
9990
15.0k
}
9991
9992
// Generated as internal constructor for term icmp_cond_result.
9993
364k
pub fn constructor_icmp_cond_result<C: Context>(
9994
364k
    ctx: &mut C,
9995
364k
    arg0: &ProducesFlags,
9996
364k
    arg1: &CC,
9997
364k
) -> IcmpCondResult {
9998
364k
    let v2 = IcmpCondResult::Condition {
9999
364k
        producer: arg0.clone(),
10000
364k
        cc: arg1.clone(),
10001
364k
    };
10002
364k
    // Rule at src/isa/x64/inst.isle line 4660.
10003
364k
    return v2;
10004
364k
}
10005
10006
// Generated as internal constructor for term invert_icmp_cond_result.
10007
0
pub fn constructor_invert_icmp_cond_result<C: Context>(
10008
0
    ctx: &mut C,
10009
0
    arg0: &IcmpCondResult,
10010
0
) -> IcmpCondResult {
10011
0
    if let &IcmpCondResult::Condition {
10012
0
        producer: ref v1,
10013
0
        cc: ref v2,
10014
0
    } = arg0 {
10015
0
        let v3 = &C::cc_invert(ctx, v2);
10016
0
        let v4 = &constructor_icmp_cond_result(ctx, v1, v3);
10017
0
        // Rule at src/isa/x64/inst.isle line 4663.
10018
0
        return v4.clone();
10019
0
    }
10020
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "invert_icmp_cond_result", "src/isa/x64/inst.isle line 4662")
10021
0
}
10022
10023
// Generated as internal constructor for term lower_icmp_bool.
10024
17.5k
pub fn constructor_lower_icmp_bool<C: Context>(
10025
17.5k
    ctx: &mut C,
10026
17.5k
    arg0: &IcmpCondResult,
10027
17.5k
) -> ValueRegs {
10028
17.5k
    if let &IcmpCondResult::Condition {
10029
17.5k
        producer: ref v1,
10030
17.5k
        cc: ref v2,
10031
17.5k
    } = arg0 {
10032
17.5k
        let v3 = &constructor_x64_setcc(ctx, v2);
10033
17.5k
        let v4 = constructor_with_flags(ctx, v1, v3);
10034
17.5k
        // Rule at src/isa/x64/inst.isle line 4668.
10035
17.5k
        return v4;
10036
17.5k
    }
10037
17.5k
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_icmp_bool", "src/isa/x64/inst.isle line 4667")
10038
17.5k
}
10039
10040
// Generated as internal constructor for term select_icmp.
10041
29.9k
pub fn constructor_select_icmp<C: Context>(
10042
29.9k
    ctx: &mut C,
10043
29.9k
    arg0: &IcmpCondResult,
10044
29.9k
    arg1: Value,
10045
29.9k
    arg2: Value,
10046
29.9k
) -> ValueRegs {
10047
29.9k
    if let &IcmpCondResult::Condition {
10048
29.9k
        producer: ref v1,
10049
29.9k
        cc: ref v2,
10050
29.9k
    } = arg0 {
10051
29.9k
        let v4 = C::value_type(ctx, arg1);
10052
29.9k
        let v5 = &C::type_register_class(ctx, v4);
10053
29.9k
        if let Some(v6) = v5 {
10054
            if let &RegisterClass::Gpr {
10055
29.9k
                single_register: v7,
10056
29.9k
            } = v6 {
10057
29.9k
                if v7 == true {
10058
29.9k
                    let v9 = constructor_put_in_gpr(ctx, arg1);
10059
29.9k
                    let v10 = &C::gpr_to_gpr_mem(ctx, v9);
10060
29.9k
                    let v11 = constructor_put_in_gpr(ctx, arg2);
10061
29.9k
                    let v12 = &constructor_cmove(ctx, v4, v2, v10, v11);
10062
29.9k
                    let v13 = constructor_with_flags(ctx, v1, v12);
10063
29.9k
                    // Rule at src/isa/x64/inst.isle line 4677.
10064
29.9k
                    return v13;
10065
0
                }
10066
0
            }
10067
0
        }
10068
0
        let v14 = &constructor_cmove_from_values(ctx, v4, v2, arg1, arg2);
10069
0
        let v15 = constructor_with_flags(ctx, v1, v14);
10070
0
        // Rule at src/isa/x64/inst.isle line 4681.
10071
0
        return v15;
10072
    }
10073
unreachable!("no rule matched for term {} at {}; should it be partial?", "select_icmp", "src/isa/x64/inst.isle line 4672")
10074
29.9k
}
10075
10076
// Generated as internal constructor for term emit_cmp.
10077
364k
pub fn constructor_emit_cmp<C: Context>(
10078
364k
    ctx: &mut C,
10079
364k
    arg0: &IntCC,
10080
364k
    arg1: Value,
10081
364k
    arg2: Value,
10082
364k
) -> IcmpCondResult {
10083
364k
    let v2 = C::value_type(ctx, arg1);
10084
364k
    if v2 == I128 {
10085
0
        match arg0 {
10086
            &IntCC::Equal => {
10087
0
                let v44 = C::put_in_regs(ctx, arg1);
10088
0
                let v46 = constructor_value_regs_get_gpr(ctx, v44, 0x0);
10089
0
                let v47 = C::put_in_regs(ctx, arg1);
10090
0
                let v49 = constructor_value_regs_get_gpr(ctx, v47, 0x1);
10091
0
                let v50 = C::put_in_regs(ctx, arg2);
10092
0
                let v51 = constructor_value_regs_get_gpr(ctx, v50, 0x0);
10093
0
                let v52 = C::put_in_regs(ctx, arg2);
10094
0
                let v53 = constructor_value_regs_get_gpr(ctx, v52, 0x1);
10095
0
                let v55 = &C::gpr_to_gpr_mem_imm(ctx, v51);
10096
0
                let v56 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v55, v46);
10097
0
                let v58 = &constructor_x64_setcc(ctx, &CC::Z);
10098
0
                let v59 = constructor_with_flags_reg(ctx, v56, v58);
10099
0
                let v60 = &C::gpr_to_gpr_mem_imm(ctx, v53);
10100
0
                let v61 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v60, v49);
10101
0
                let v62 = &constructor_x64_setcc(ctx, &CC::Z);
10102
0
                let v63 = constructor_with_flags_reg(ctx, v61, v62);
10103
0
                let v65 = C::gpr_new(ctx, v59);
10104
0
                let v66 = &constructor_reg_to_gpr_mem_imm(ctx, v63);
10105
0
                let v67 = constructor_x64_and(ctx, I64, v65, v66);
10106
0
                let v68 = C::gpr_to_reg(ctx, v67);
10107
0
                let v70 = RegMemImm::Imm {
10108
0
                    simm32: 0x1,
10109
0
                };
10110
0
                let v71 = &C::gpr_mem_imm_new(ctx, &v70);
10111
0
                let v72 = C::gpr_new(ctx, v68);
10112
0
                let v73 = &constructor_x64_test(ctx, &OperandSize::Size64, v71, v72);
10113
0
                let v75 = &constructor_icmp_cond_result(ctx, v73, &CC::NZ);
10114
0
                // Rule at src/isa/x64/inst.isle line 4713.
10115
0
                return v75.clone();
10116
            }
10117
            &IntCC::NotEqual => {
10118
0
                let v44 = C::put_in_regs(ctx, arg1);
10119
0
                let v46 = constructor_value_regs_get_gpr(ctx, v44, 0x0);
10120
0
                let v47 = C::put_in_regs(ctx, arg1);
10121
0
                let v49 = constructor_value_regs_get_gpr(ctx, v47, 0x1);
10122
0
                let v50 = C::put_in_regs(ctx, arg2);
10123
0
                let v51 = constructor_value_regs_get_gpr(ctx, v50, 0x0);
10124
0
                let v52 = C::put_in_regs(ctx, arg2);
10125
0
                let v53 = constructor_value_regs_get_gpr(ctx, v52, 0x1);
10126
0
                let v55 = &C::gpr_to_gpr_mem_imm(ctx, v51);
10127
0
                let v56 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v55, v46);
10128
0
                let v76 = &constructor_x64_setcc(ctx, &CC::NZ);
10129
0
                let v77 = constructor_with_flags_reg(ctx, v56, v76);
10130
0
                let v60 = &C::gpr_to_gpr_mem_imm(ctx, v53);
10131
0
                let v61 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v60, v49);
10132
0
                let v78 = &constructor_x64_setcc(ctx, &CC::NZ);
10133
0
                let v79 = constructor_with_flags_reg(ctx, v61, v78);
10134
0
                let v80 = C::gpr_new(ctx, v77);
10135
0
                let v81 = &constructor_reg_to_gpr_mem_imm(ctx, v79);
10136
0
                let v82 = constructor_x64_or(ctx, I64, v80, v81);
10137
0
                let v83 = C::gpr_to_reg(ctx, v82);
10138
0
                let v70 = RegMemImm::Imm {
10139
0
                    simm32: 0x1,
10140
0
                };
10141
0
                let v71 = &C::gpr_mem_imm_new(ctx, &v70);
10142
0
                let v84 = C::gpr_new(ctx, v83);
10143
0
                let v85 = &constructor_x64_test(ctx, &OperandSize::Size64, v71, v84);
10144
0
                let v86 = &constructor_icmp_cond_result(ctx, v85, &CC::NZ);
10145
0
                // Rule at src/isa/x64/inst.isle line 4734.
10146
0
                return v86.clone();
10147
            }
10148
0
            _ => {}
10149
0
        }
10150
0
        let v44 = C::put_in_regs(ctx, arg1);
10151
0
        let v46 = constructor_value_regs_get_gpr(ctx, v44, 0x0);
10152
0
        let v47 = C::put_in_regs(ctx, arg1);
10153
0
        let v49 = constructor_value_regs_get_gpr(ctx, v47, 0x1);
10154
0
        let v50 = C::put_in_regs(ctx, arg2);
10155
0
        let v51 = constructor_value_regs_get_gpr(ctx, v50, 0x0);
10156
0
        let v52 = C::put_in_regs(ctx, arg2);
10157
0
        let v53 = constructor_value_regs_get_gpr(ctx, v52, 0x1);
10158
0
        let v87 = &C::gpr_to_gpr_mem_imm(ctx, v53);
10159
0
        let v88 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v87, v49);
10160
0
        let v89 = &C::intcc_without_eq(ctx, arg0);
10161
0
        let v90 = &C::intcc_to_cc(ctx, v89);
10162
0
        let v91 = &constructor_x64_setcc(ctx, v90);
10163
0
        let v92 = &constructor_x64_setcc(ctx, &CC::Z);
10164
0
        let v93 = &constructor_consumes_flags_concat(ctx, v91, v92);
10165
0
        let v94 = constructor_with_flags(ctx, v88, v93);
10166
0
        let v95 = C::value_regs_get(ctx, v94, 0x0);
10167
0
        let v96 = C::value_regs_get(ctx, v94, 0x1);
10168
0
        let v97 = &C::gpr_to_gpr_mem_imm(ctx, v51);
10169
0
        let v98 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v97, v46);
10170
0
        let v99 = &C::intcc_unsigned(ctx, arg0);
10171
0
        let v100 = &C::intcc_to_cc(ctx, v99);
10172
0
        let v101 = &constructor_x64_setcc(ctx, v100);
10173
0
        let v102 = constructor_with_flags_reg(ctx, v98, v101);
10174
0
        let v103 = C::gpr_new(ctx, v96);
10175
0
        let v104 = &constructor_reg_to_gpr_mem_imm(ctx, v102);
10176
0
        let v105 = constructor_x64_and(ctx, I64, v103, v104);
10177
0
        let v106 = C::gpr_to_reg(ctx, v105);
10178
0
        let v107 = C::gpr_new(ctx, v95);
10179
0
        let v108 = &constructor_reg_to_gpr_mem_imm(ctx, v106);
10180
0
        let v109 = constructor_x64_or(ctx, I64, v107, v108);
10181
0
        let v110 = C::gpr_to_reg(ctx, v109);
10182
0
        let v70 = RegMemImm::Imm {
10183
0
            simm32: 0x1,
10184
0
        };
10185
0
        let v111 = &C::gpr_mem_imm_new(ctx, &v70);
10186
0
        let v112 = C::gpr_new(ctx, v110);
10187
0
        let v113 = &constructor_x64_test(ctx, &OperandSize::Size64, v111, v112);
10188
0
        let v114 = &constructor_icmp_cond_result(ctx, v113, &CC::NZ);
10189
0
        // Rule at src/isa/x64/inst.isle line 4749.
10190
0
        return v114.clone();
10191
364k
    }
10192
364k
    let v29 = C::def_inst(ctx, arg1);
10193
364k
    if let Some(
v30343k
) = v29 {
10194
343k
        let v31 = &C::inst_data(ctx, v30);
10195
        if let &InstructionData::UnaryImm {
10196
0
            opcode: ref v32,
10197
0
            imm: v33,
10198
343k
        } = v31 {
10199
0
            if let &Opcode::Iconst = v32 {
10200
0
                let v34 = C::u64_from_imm64(ctx, v33);
10201
0
                if v34 == 0x0 {
10202
0
                    let v35 = C::value_type(ctx, arg2);
10203
0
                    let v36 = &C::raw_operand_size_of_type(ctx, v35);
10204
0
                    let v37 = C::put_in_reg(ctx, arg2);
10205
0
                    let v38 = C::gpr_new(ctx, v37);
10206
0
                    let v39 = &C::gpr_to_gpr_mem_imm(ctx, v38);
10207
0
                    let v40 = &constructor_x64_test(ctx, v36, v39, v38);
10208
0
                    let v41 = &C::intcc_swap_args(ctx, arg0);
10209
0
                    let v42 = &C::intcc_to_cc(ctx, v41);
10210
0
                    let v43 = &constructor_icmp_cond_result(ctx, v40, v42);
10211
0
                    // Rule at src/isa/x64/inst.isle line 4706.
10212
0
                    return v43.clone();
10213
0
                }
10214
0
            }
10215
343k
        }
10216
21.1k
    }
10217
364k
    let v17 = C::def_inst(ctx, arg2);
10218
364k
    if let Some(
v18352k
) = v17 {
10219
352k
        let v19 = &C::inst_data(ctx, v18);
10220
        if let &InstructionData::UnaryImm {
10221
201k
            opcode: ref v20,
10222
201k
            imm: v21,
10223
352k
        } = v19 {
10224
201k
            if let &Opcode::Iconst = v20 {
10225
201k
                let v22 = C::u64_from_imm64(ctx, v21);
10226
201k
                if v22 == 0x0 {
10227
118k
                    let v4 = &C::raw_operand_size_of_type(ctx, v2);
10228
118k
                    let v23 = C::put_in_reg(ctx, arg1);
10229
118k
                    let v24 = C::gpr_new(ctx, v23);
10230
118k
                    let v25 = &C::gpr_to_gpr_mem_imm(ctx, v24);
10231
118k
                    let v26 = &constructor_x64_test(ctx, v4, v25, v24);
10232
118k
                    let v27 = &C::intcc_to_cc(ctx, arg0);
10233
118k
                    let v28 = &constructor_icmp_cond_result(ctx, v26, v27);
10234
118k
                    // Rule at src/isa/x64/inst.isle line 4701.
10235
118k
                    return v28.clone();
10236
83.0k
                }
10237
0
            }
10238
150k
        }
10239
12.5k
    }
10240
245k
    let v10 = &C::simm32_from_value(ctx, arg1);
10241
245k
    if let Some(
v110
) = v10 {
10242
0
        let v4 = &C::raw_operand_size_of_type(ctx, v2);
10243
0
        let v12 = constructor_put_in_gpr(ctx, arg2);
10244
0
        let v13 = &constructor_x64_cmp(ctx, v4, v11, v12);
10245
0
        let v14 = &C::intcc_swap_args(ctx, arg0);
10246
0
        let v15 = &C::intcc_to_cc(ctx, v14);
10247
0
        let v16 = &constructor_icmp_cond_result(ctx, v13, v15);
10248
0
        // Rule at src/isa/x64/inst.isle line 4696.
10249
0
        return v16.clone();
10250
245k
    }
10251
245k
    let v4 = &C::raw_operand_size_of_type(ctx, v2);
10252
245k
    let v5 = &constructor_put_in_gpr_mem_imm(ctx, arg2);
10253
245k
    let v6 = constructor_put_in_gpr(ctx, arg1);
10254
245k
    let v7 = &constructor_x64_cmp(ctx, v4, v5, v6);
10255
245k
    let v8 = &C::intcc_to_cc(ctx, arg0);
10256
245k
    let v9 = &constructor_icmp_cond_result(ctx, v7, v8);
10257
245k
    // Rule at src/isa/x64/inst.isle line 4689.
10258
245k
    return v9.clone();
10259
364k
}
10260
10261
// Generated as internal constructor for term lower_fcmp_bool.
10262
0
pub fn constructor_lower_fcmp_bool<C: Context>(
10263
0
    ctx: &mut C,
10264
0
    arg0: &FcmpCondResult,
10265
0
) -> ValueRegs {
10266
0
    match arg0 {
10267
        &FcmpCondResult::Condition {
10268
0
            producer: ref v1,
10269
0
            cc: ref v2,
10270
0
        } => {
10271
0
            let v3 = &constructor_x64_setcc(ctx, v2);
10272
0
            let v4 = constructor_with_flags(ctx, v1, v3);
10273
0
            // Rule at src/isa/x64/inst.isle line 4784.
10274
0
            return v4;
10275
        }
10276
        &FcmpCondResult::AndCondition {
10277
0
            producer: ref v5,
10278
0
            cc1: ref v6,
10279
0
            cc2: ref v7,
10280
0
        } => {
10281
0
            let v8 = &constructor_x64_setcc(ctx, v6);
10282
0
            let v9 = &constructor_x64_setcc(ctx, v7);
10283
0
            let v10 = &constructor_consumes_flags_concat(ctx, v8, v9);
10284
0
            let v11 = constructor_with_flags(ctx, v5, v10);
10285
0
            let v13 = constructor_value_regs_get_gpr(ctx, v11, 0x0);
10286
0
            let v15 = constructor_value_regs_get_gpr(ctx, v11, 0x1);
10287
0
            let v17 = &C::gpr_to_gpr_mem_imm(ctx, v15);
10288
0
            let v18 = constructor_x64_and(ctx, I8, v13, v17);
10289
0
            let v19 = C::gpr_to_reg(ctx, v18);
10290
0
            let v20 = C::value_reg(ctx, v19);
10291
0
            // Rule at src/isa/x64/inst.isle line 4787.
10292
0
            return v20;
10293
        }
10294
        &FcmpCondResult::OrCondition {
10295
0
            producer: ref v21,
10296
0
            cc1: ref v22,
10297
0
            cc2: ref v23,
10298
0
        } => {
10299
0
            let v24 = &constructor_x64_setcc(ctx, v22);
10300
0
            let v25 = &constructor_x64_setcc(ctx, v23);
10301
0
            let v26 = &constructor_consumes_flags_concat(ctx, v24, v25);
10302
0
            let v27 = constructor_with_flags(ctx, v21, v26);
10303
0
            let v28 = constructor_value_regs_get_gpr(ctx, v27, 0x0);
10304
0
            let v29 = constructor_value_regs_get_gpr(ctx, v27, 0x1);
10305
0
            let v30 = &C::gpr_to_gpr_mem_imm(ctx, v29);
10306
0
            let v31 = constructor_x64_or(ctx, I8, v28, v30);
10307
0
            let v32 = C::gpr_to_reg(ctx, v31);
10308
0
            let v33 = C::value_reg(ctx, v32);
10309
0
            // Rule at src/isa/x64/inst.isle line 4796.
10310
0
            return v33;
10311
        }
10312
0
        _ => {}
10313
0
    }
10314
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_fcmp_bool", "src/isa/x64/inst.isle line 4782")
10315
0
}
10316
10317
// Generated as internal constructor for term emit_fcmp.
10318
0
pub fn constructor_emit_fcmp<C: Context>(
10319
0
    ctx: &mut C,
10320
0
    arg0: &FloatCC,
10321
0
    arg1: Value,
10322
0
    arg2: Value,
10323
0
) -> FcmpCondResult {
10324
0
    match arg0 {
10325
        &FloatCC::Equal => {
10326
0
            let v2 = C::value_type(ctx, arg1);
10327
0
            let v3 = C::ty_scalar_float(ctx, v2);
10328
0
            if let Some(v4) = v3 {
10329
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10330
0
                let v9 = FcmpCondResult::AndCondition {
10331
0
                    producer: v6.clone(),
10332
0
                    cc1: CC::NP,
10333
0
                    cc2: CC::Z,
10334
0
                };
10335
0
                // Rule at src/isa/x64/inst.isle line 4823.
10336
0
                return v9;
10337
0
            }
10338
        }
10339
        &FloatCC::GreaterThan => {
10340
0
            let v2 = C::value_type(ctx, arg1);
10341
0
            let v3 = C::ty_scalar_float(ctx, v2);
10342
0
            if let Some(v4) = v3 {
10343
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10344
0
                let v18 = FcmpCondResult::Condition {
10345
0
                    producer: v6.clone(),
10346
0
                    cc: CC::NBE,
10347
0
                };
10348
0
                // Rule at src/isa/x64/inst.isle line 4839.
10349
0
                return v18;
10350
0
            }
10351
        }
10352
        &FloatCC::GreaterThanOrEqual => {
10353
0
            let v2 = C::value_type(ctx, arg1);
10354
0
            let v3 = C::ty_scalar_float(ctx, v2);
10355
0
            if let Some(v4) = v3 {
10356
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10357
0
                let v20 = FcmpCondResult::Condition {
10358
0
                    producer: v6.clone(),
10359
0
                    cc: CC::NB,
10360
0
                };
10361
0
                // Rule at src/isa/x64/inst.isle line 4841.
10362
0
                return v20;
10363
0
            }
10364
        }
10365
        &FloatCC::LessThan => {
10366
0
            let v2 = C::value_type(ctx, arg1);
10367
0
            let v3 = C::ty_scalar_float(ctx, v2);
10368
0
            if let Some(v4) = v3 {
10369
0
                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
10370
0
                let v26 = FcmpCondResult::Condition {
10371
0
                    producer: v25.clone(),
10372
0
                    cc: CC::NBE,
10373
0
                };
10374
0
                // Rule at src/isa/x64/inst.isle line 4851.
10375
0
                return v26;
10376
0
            }
10377
        }
10378
        &FloatCC::LessThanOrEqual => {
10379
0
            let v2 = C::value_type(ctx, arg1);
10380
0
            let v3 = C::ty_scalar_float(ctx, v2);
10381
0
            if let Some(v4) = v3 {
10382
0
                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
10383
0
                let v27 = FcmpCondResult::Condition {
10384
0
                    producer: v25.clone(),
10385
0
                    cc: CC::NB,
10386
0
                };
10387
0
                // Rule at src/isa/x64/inst.isle line 4854.
10388
0
                return v27;
10389
0
            }
10390
        }
10391
        &FloatCC::NotEqual => {
10392
0
            let v2 = C::value_type(ctx, arg1);
10393
0
            let v3 = C::ty_scalar_float(ctx, v2);
10394
0
            if let Some(v4) = v3 {
10395
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10396
0
                let v12 = FcmpCondResult::OrCondition {
10397
0
                    producer: v6.clone(),
10398
0
                    cc1: CC::P,
10399
0
                    cc2: CC::NZ,
10400
0
                };
10401
0
                // Rule at src/isa/x64/inst.isle line 4826.
10402
0
                return v12;
10403
0
            }
10404
        }
10405
        &FloatCC::Ordered => {
10406
0
            let v2 = C::value_type(ctx, arg1);
10407
0
            let v3 = C::ty_scalar_float(ctx, v2);
10408
0
            if let Some(v4) = v3 {
10409
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10410
0
                let v13 = FcmpCondResult::Condition {
10411
0
                    producer: v6.clone(),
10412
0
                    cc: CC::NP,
10413
0
                };
10414
0
                // Rule at src/isa/x64/inst.isle line 4831.
10415
0
                return v13;
10416
0
            }
10417
        }
10418
        &FloatCC::OrderedNotEqual => {
10419
0
            let v2 = C::value_type(ctx, arg1);
10420
0
            let v3 = C::ty_scalar_float(ctx, v2);
10421
0
            if let Some(v4) = v3 {
10422
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10423
0
                let v15 = FcmpCondResult::Condition {
10424
0
                    producer: v6.clone(),
10425
0
                    cc: CC::NZ,
10426
0
                };
10427
0
                // Rule at src/isa/x64/inst.isle line 4835.
10428
0
                return v15;
10429
0
            }
10430
        }
10431
        &FloatCC::Unordered => {
10432
0
            let v2 = C::value_type(ctx, arg1);
10433
0
            let v3 = C::ty_scalar_float(ctx, v2);
10434
0
            if let Some(v4) = v3 {
10435
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10436
0
                let v14 = FcmpCondResult::Condition {
10437
0
                    producer: v6.clone(),
10438
0
                    cc: CC::P,
10439
0
                };
10440
0
                // Rule at src/isa/x64/inst.isle line 4833.
10441
0
                return v14;
10442
0
            }
10443
        }
10444
        &FloatCC::UnorderedOrEqual => {
10445
0
            let v2 = C::value_type(ctx, arg1);
10446
0
            let v3 = C::ty_scalar_float(ctx, v2);
10447
0
            if let Some(v4) = v3 {
10448
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10449
0
                let v16 = FcmpCondResult::Condition {
10450
0
                    producer: v6.clone(),
10451
0
                    cc: CC::Z,
10452
0
                };
10453
0
                // Rule at src/isa/x64/inst.isle line 4837.
10454
0
                return v16;
10455
0
            }
10456
        }
10457
        &FloatCC::UnorderedOrGreaterThan => {
10458
0
            let v2 = C::value_type(ctx, arg1);
10459
0
            let v3 = C::ty_scalar_float(ctx, v2);
10460
0
            if let Some(v4) = v3 {
10461
0
                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
10462
0
                let v28 = FcmpCondResult::Condition {
10463
0
                    producer: v25.clone(),
10464
0
                    cc: CC::B,
10465
0
                };
10466
0
                // Rule at src/isa/x64/inst.isle line 4857.
10467
0
                return v28;
10468
0
            }
10469
        }
10470
        &FloatCC::UnorderedOrGreaterThanOrEqual => {
10471
0
            let v2 = C::value_type(ctx, arg1);
10472
0
            let v3 = C::ty_scalar_float(ctx, v2);
10473
0
            if let Some(v4) = v3 {
10474
0
                let v25 = &constructor_x64_ucomis(ctx, arg1, arg2);
10475
0
                let v29 = FcmpCondResult::Condition {
10476
0
                    producer: v25.clone(),
10477
0
                    cc: CC::BE,
10478
0
                };
10479
0
                // Rule at src/isa/x64/inst.isle line 4860.
10480
0
                return v29;
10481
0
            }
10482
        }
10483
        &FloatCC::UnorderedOrLessThan => {
10484
0
            let v2 = C::value_type(ctx, arg1);
10485
0
            let v3 = C::ty_scalar_float(ctx, v2);
10486
0
            if let Some(v4) = v3 {
10487
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10488
0
                let v22 = FcmpCondResult::Condition {
10489
0
                    producer: v6.clone(),
10490
0
                    cc: CC::B,
10491
0
                };
10492
0
                // Rule at src/isa/x64/inst.isle line 4843.
10493
0
                return v22;
10494
0
            }
10495
        }
10496
        &FloatCC::UnorderedOrLessThanOrEqual => {
10497
0
            let v2 = C::value_type(ctx, arg1);
10498
0
            let v3 = C::ty_scalar_float(ctx, v2);
10499
0
            if let Some(v4) = v3 {
10500
0
                let v6 = &constructor_x64_ucomis(ctx, arg2, arg1);
10501
0
                let v24 = FcmpCondResult::Condition {
10502
0
                    producer: v6.clone(),
10503
0
                    cc: CC::BE,
10504
0
                };
10505
0
                // Rule at src/isa/x64/inst.isle line 4845.
10506
0
                return v24;
10507
0
            }
10508
        }
10509
0
        _ => {}
10510
    }
10511
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "emit_fcmp", "src/isa/x64/inst.isle line 4821")
10512
0
}
10513
10514
// Generated as internal constructor for term x64_mfence.
10515
0
pub fn constructor_x64_mfence<C: Context>(
10516
0
    ctx: &mut C,
10517
0
) -> SideEffectNoResult {
10518
0
    let v1 = MInst::Fence {
10519
0
        kind: FenceKind::MFence,
10520
0
    };
10521
0
    let v2 = SideEffectNoResult::Inst {
10522
0
        inst: v1,
10523
0
    };
10524
0
    // Rule at src/isa/x64/inst.isle line 4873.
10525
0
    return v2;
10526
0
}
10527
10528
// Generated as internal constructor for term x64_cmpxchg.
10529
0
pub fn constructor_x64_cmpxchg<C: Context>(
10530
0
    ctx: &mut C,
10531
0
    arg0: Type,
10532
0
    arg1: Gpr,
10533
0
    arg2: Gpr,
10534
0
    arg3: &SyntheticAmode,
10535
0
) -> Gpr {
10536
0
    let v4 = C::temp_writable_gpr(ctx);
10537
0
    let v5 = C::gpr_to_reg(ctx, arg2);
10538
0
    let v6 = C::gpr_to_reg(ctx, arg1);
10539
0
    let v7 = C::writable_gpr_to_reg(ctx, v4);
10540
0
    let v8 = MInst::LockCmpxchg {
10541
0
        ty: arg0,
10542
0
        replacement: v5,
10543
0
        expected: v6,
10544
0
        mem: arg3.clone(),
10545
0
        dst_old: v7,
10546
0
    };
10547
0
    let v9 = C::emit(ctx, &v8);
10548
0
    let v10 = C::writable_gpr_to_gpr(ctx, v4);
10549
0
    // Rule at src/isa/x64/inst.isle line 4877.
10550
0
    return v10;
10551
0
}
10552
10553
// Generated as internal constructor for term x64_atomic_rmw_seq.
10554
0
pub fn constructor_x64_atomic_rmw_seq<C: Context>(
10555
0
    ctx: &mut C,
10556
0
    arg0: Type,
10557
0
    arg1: &MachAtomicRmwOp,
10558
0
    arg2: &SyntheticAmode,
10559
0
    arg3: Gpr,
10560
0
) -> Gpr {
10561
0
    let v4 = C::temp_writable_gpr(ctx);
10562
0
    let v5 = C::temp_writable_gpr(ctx);
10563
0
    let v6 = C::gpr_to_reg(ctx, arg3);
10564
0
    let v7 = C::writable_gpr_to_reg(ctx, v5);
10565
0
    let v8 = C::writable_gpr_to_reg(ctx, v4);
10566
0
    let v9 = MInst::AtomicRmwSeq {
10567
0
        ty: arg0,
10568
0
        op: arg1.clone(),
10569
0
        mem: arg2.clone(),
10570
0
        operand: v6,
10571
0
        temp: v7,
10572
0
        dst_old: v8,
10573
0
    };
10574
0
    let v10 = C::emit(ctx, &v9);
10575
0
    let v11 = C::writable_gpr_to_gpr(ctx, v4);
10576
0
    // Rule at src/isa/x64/inst.isle line 4883.
10577
0
    return v11;
10578
0
}
10579
10580
// Generated as internal constructor for term bitcast_xmm_to_gpr.
10581
0
pub fn constructor_bitcast_xmm_to_gpr<C: Context>(
10582
0
    ctx: &mut C,
10583
0
    arg0: Type,
10584
0
    arg1: Xmm,
10585
0
) -> Gpr {
10586
0
    match arg0 {
10587
        F32 => {
10588
0
            let v2 = constructor_x64_movd_to_gpr(ctx, arg1);
10589
0
            // Rule at src/isa/x64/inst.isle line 4898.
10590
0
            return v2;
10591
        }
10592
        F64 => {
10593
0
            let v3 = constructor_x64_movq_to_gpr(ctx, arg1);
10594
0
            // Rule at src/isa/x64/inst.isle line 4900.
10595
0
            return v3;
10596
        }
10597
0
        _ => {}
10598
0
    }
10599
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "bitcast_xmm_to_gpr", "src/isa/x64/inst.isle line 4897")
10600
0
}
10601
10602
// Generated as internal constructor for term bitcast_gpr_to_xmm.
10603
0
pub fn constructor_bitcast_gpr_to_xmm<C: Context>(
10604
0
    ctx: &mut C,
10605
0
    arg0: Type,
10606
0
    arg1: Gpr,
10607
0
) -> Xmm {
10608
0
    match arg0 {
10609
        I32 => {
10610
0
            let v2 = &C::gpr_to_gpr_mem(ctx, arg1);
10611
0
            let v3 = constructor_x64_movd_to_xmm(ctx, v2);
10612
0
            // Rule at src/isa/x64/inst.isle line 4904.
10613
0
            return v3;
10614
        }
10615
        I64 => {
10616
0
            let v2 = &C::gpr_to_gpr_mem(ctx, arg1);
10617
0
            let v4 = constructor_x64_movq_to_xmm(ctx, v2);
10618
0
            // Rule at src/isa/x64/inst.isle line 4906.
10619
0
            return v4;
10620
        }
10621
0
        _ => {}
10622
0
    }
10623
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "bitcast_gpr_to_xmm", "src/isa/x64/inst.isle line 4903")
10624
0
}
10625
10626
// Generated as internal constructor for term stack_addr_impl.
10627
1.81k
pub fn constructor_stack_addr_impl<C: Context>(
10628
1.81k
    ctx: &mut C,
10629
1.81k
    arg0: StackSlot,
10630
1.81k
    arg1: Offset32,
10631
1.81k
) -> Gpr {
10632
1.81k
    let v2 = C::temp_writable_gpr(ctx);
10633
1.81k
    let v3 = C::writable_gpr_to_reg(ctx, v2);
10634
1.81k
    let v4 = &C::abi_stackslot_addr(ctx, v3, arg0, arg1);
10635
1.81k
    let v5 = C::emit(ctx, v4);
10636
1.81k
    let v6 = C::writable_gpr_to_gpr(ctx, v2);
10637
1.81k
    // Rule at src/isa/x64/inst.isle line 4912.
10638
1.81k
    return v6;
10639
1.81k
}
10640
10641
// Generated as internal constructor for term x64_checked_srem_seq.
10642
0
pub fn constructor_x64_checked_srem_seq<C: Context>(
10643
0
    ctx: &mut C,
10644
0
    arg0: &OperandSize,
10645
0
    arg1: Gpr,
10646
0
    arg2: Gpr,
10647
0
    arg3: Gpr,
10648
0
) -> ValueRegs {
10649
0
    let v4 = C::temp_writable_gpr(ctx);
10650
0
    let v5 = C::temp_writable_gpr(ctx);
10651
0
    let v6 = MInst::CheckedSRemSeq {
10652
0
        size: arg0.clone(),
10653
0
        dividend_lo: arg1,
10654
0
        dividend_hi: arg2,
10655
0
        divisor: arg3,
10656
0
        dst_quotient: v4,
10657
0
        dst_remainder: v5,
10658
0
    };
10659
0
    let v7 = C::emit(ctx, &v6);
10660
0
    let v8 = constructor_writable_gpr_to_r_reg(ctx, v4);
10661
0
    let v9 = constructor_writable_gpr_to_r_reg(ctx, v5);
10662
0
    let v10 = C::value_regs(ctx, v8, v9);
10663
0
    // Rule at src/isa/x64/inst.isle line 4921.
10664
0
    return v10;
10665
0
}
10666
10667
// Generated as internal constructor for term x64_checked_srem_seq8.
10668
0
pub fn constructor_x64_checked_srem_seq8<C: Context>(
10669
0
    ctx: &mut C,
10670
0
    arg0: Gpr,
10671
0
    arg1: Gpr,
10672
0
) -> Gpr {
10673
0
    let v2 = C::temp_writable_gpr(ctx);
10674
0
    let v3 = MInst::CheckedSRemSeq8 {
10675
0
        dividend: arg0,
10676
0
        divisor: arg1,
10677
0
        dst: v2,
10678
0
    };
10679
0
    let v4 = C::emit(ctx, &v3);
10680
0
    let v5 = C::writable_gpr_to_gpr(ctx, v2);
10681
0
    // Rule at src/isa/x64/inst.isle line 4928.
10682
0
    return v5;
10683
0
}
10684
10685
// Generated as internal constructor for term x64_div8.
10686
0
pub fn constructor_x64_div8<C: Context>(
10687
0
    ctx: &mut C,
10688
0
    arg0: Gpr,
10689
0
    arg1: &GprMem,
10690
0
    arg2: &DivSignedness,
10691
0
    arg3: &TrapCode,
10692
0
) -> Gpr {
10693
0
    let v4 = C::temp_writable_gpr(ctx);
10694
0
    let v5 = MInst::Div8 {
10695
0
        sign: arg2.clone(),
10696
0
        trap: arg3.clone(),
10697
0
        divisor: arg1.clone(),
10698
0
        dividend: arg0,
10699
0
        dst: v4,
10700
0
    };
10701
0
    let v6 = C::emit(ctx, &v5);
10702
0
    let v7 = C::writable_gpr_to_gpr(ctx, v4);
10703
0
    // Rule at src/isa/x64/inst.isle line 4935.
10704
0
    return v7;
10705
0
}
10706
10707
// Generated as internal constructor for term x64_div.
10708
4.24k
pub fn constructor_x64_div<C: Context>(
10709
4.24k
    ctx: &mut C,
10710
4.24k
    arg0: Gpr,
10711
4.24k
    arg1: Gpr,
10712
4.24k
    arg2: &GprMem,
10713
4.24k
    arg3: &OperandSize,
10714
4.24k
    arg4: &DivSignedness,
10715
4.24k
    arg5: &TrapCode,
10716
4.24k
) -> ValueRegs {
10717
4.24k
    let v6 = C::temp_writable_gpr(ctx);
10718
4.24k
    let v7 = C::temp_writable_gpr(ctx);
10719
4.24k
    let v8 = MInst::Div {
10720
4.24k
        size: arg3.clone(),
10721
4.24k
        sign: arg4.clone(),
10722
4.24k
        trap: arg5.clone(),
10723
4.24k
        divisor: arg2.clone(),
10724
4.24k
        dividend_lo: arg0,
10725
4.24k
        dividend_hi: arg1,
10726
4.24k
        dst_quotient: v6,
10727
4.24k
        dst_remainder: v7,
10728
4.24k
    };
10729
4.24k
    let v9 = C::emit(ctx, &v8);
10730
4.24k
    let v10 = constructor_writable_gpr_to_r_reg(ctx, v6);
10731
4.24k
    let v11 = constructor_writable_gpr_to_r_reg(ctx, v7);
10732
4.24k
    let v12 = C::value_regs(ctx, v10, v11);
10733
4.24k
    // Rule at src/isa/x64/inst.isle line 4945.
10734
4.24k
    return v12;
10735
4.24k
}
10736
10737
// Generated as internal constructor for term x64_div_quotient.
10738
3.53k
pub fn constructor_x64_div_quotient<C: Context>(
10739
3.53k
    ctx: &mut C,
10740
3.53k
    arg0: Gpr,
10741
3.53k
    arg1: Gpr,
10742
3.53k
    arg2: &GprMem,
10743
3.53k
    arg3: &OperandSize,
10744
3.53k
    arg4: &DivSignedness,
10745
3.53k
    arg5: &TrapCode,
10746
3.53k
) -> ValueRegs {
10747
3.53k
    let v6 = constructor_x64_div(ctx, arg0, arg1, arg2, arg3, arg4, arg5);
10748
3.53k
    let v8 = C::value_regs_get(ctx, v6, 0x0);
10749
3.53k
    let v9 = C::value_reg(ctx, v8);
10750
3.53k
    // Rule at src/isa/x64/inst.isle line 4953.
10751
3.53k
    return v9;
10752
3.53k
}
10753
10754
// Generated as internal constructor for term x64_div_remainder.
10755
708
pub fn constructor_x64_div_remainder<C: Context>(
10756
708
    ctx: &mut C,
10757
708
    arg0: Gpr,
10758
708
    arg1: Gpr,
10759
708
    arg2: &GprMem,
10760
708
    arg3: &OperandSize,
10761
708
    arg4: &DivSignedness,
10762
708
    arg5: &TrapCode,
10763
708
) -> ValueRegs {
10764
708
    let v6 = constructor_x64_div(ctx, arg0, arg1, arg2, arg3, arg4, arg5);
10765
708
    let v8 = C::value_regs_get(ctx, v6, 0x1);
10766
708
    let v9 = C::value_reg(ctx, v8);
10767
708
    // Rule at src/isa/x64/inst.isle line 4958.
10768
708
    return v9;
10769
708
}
10770
10771
// Generated as internal constructor for term x64_sign_extend_data.
10772
454
pub fn constructor_x64_sign_extend_data<C: Context>(
10773
454
    ctx: &mut C,
10774
454
    arg0: Gpr,
10775
454
    arg1: &OperandSize,
10776
454
) -> Gpr {
10777
454
    let v2 = C::temp_writable_gpr(ctx);
10778
454
    let v3 = MInst::SignExtendData {
10779
454
        size: arg1.clone(),
10780
454
        src: arg0,
10781
454
        dst: v2,
10782
454
    };
10783
454
    let v4 = C::emit(ctx, &v3);
10784
454
    let v5 = C::writable_gpr_to_gpr(ctx, v2);
10785
454
    // Rule at src/isa/x64/inst.isle line 4963.
10786
454
    return v5;
10787
454
}
10788
10789
// Generated as internal constructor for term read_pinned_gpr.
10790
0
pub fn constructor_read_pinned_gpr<C: Context>(
10791
0
    ctx: &mut C,
10792
0
) -> Gpr {
10793
0
    let v0 = C::preg_pinned(ctx);
10794
0
    let v1 = constructor_mov_from_preg(ctx, v0);
10795
0
    let v2 = C::gpr_new(ctx, v1);
10796
0
    // Rule at src/isa/x64/inst.isle line 4971.
10797
0
    return v2;
10798
0
}
10799
10800
// Generated as internal constructor for term write_pinned_gpr.
10801
0
pub fn constructor_write_pinned_gpr<C: Context>(
10802
0
    ctx: &mut C,
10803
0
    arg0: Gpr,
10804
0
) -> SideEffectNoResult {
10805
0
    let v1 = C::preg_pinned(ctx);
10806
0
    let v2 = &constructor_mov_to_preg(ctx, v1, arg0);
10807
0
    // Rule at src/isa/x64/inst.isle line 4975.
10808
0
    return v2.clone();
10809
0
}
10810
10811
// Generated as internal constructor for term elf_tls_get_addr.
10812
0
pub fn constructor_elf_tls_get_addr<C: Context>(
10813
0
    ctx: &mut C,
10814
0
    arg0: ExternalName,
10815
0
) -> Gpr {
10816
0
    let v1 = C::temp_writable_gpr(ctx);
10817
0
    let v2 = MInst::ElfTlsGetAddr {
10818
0
        symbol: arg0,
10819
0
        dst: v1,
10820
0
    };
10821
0
    let v3 = C::emit(ctx, &v2);
10822
0
    let v4 = C::writable_gpr_to_gpr(ctx, v1);
10823
0
    // Rule at src/isa/x64/inst.isle line 5017.
10824
0
    return v4;
10825
0
}
10826
10827
// Generated as internal constructor for term macho_tls_get_addr.
10828
0
pub fn constructor_macho_tls_get_addr<C: Context>(
10829
0
    ctx: &mut C,
10830
0
    arg0: ExternalName,
10831
0
) -> Gpr {
10832
0
    let v1 = C::temp_writable_gpr(ctx);
10833
0
    let v2 = MInst::MachOTlsGetAddr {
10834
0
        symbol: arg0,
10835
0
        dst: v1,
10836
0
    };
10837
0
    let v3 = C::emit(ctx, &v2);
10838
0
    let v4 = C::writable_gpr_to_gpr(ctx, v1);
10839
0
    // Rule at src/isa/x64/inst.isle line 5024.
10840
0
    return v4;
10841
0
}
10842
10843
// Generated as internal constructor for term coff_tls_get_addr.
10844
0
pub fn constructor_coff_tls_get_addr<C: Context>(
10845
0
    ctx: &mut C,
10846
0
    arg0: ExternalName,
10847
0
) -> Gpr {
10848
0
    let v1 = C::temp_writable_gpr(ctx);
10849
0
    let v2 = C::temp_writable_gpr(ctx);
10850
0
    let v3 = MInst::CoffTlsGetAddr {
10851
0
        symbol: arg0,
10852
0
        dst: v1,
10853
0
        tmp: v2,
10854
0
    };
10855
0
    let v4 = C::emit(ctx, &v3);
10856
0
    let v5 = C::writable_gpr_to_gpr(ctx, v1);
10857
0
    // Rule at src/isa/x64/inst.isle line 5031.
10858
0
    return v5;
10859
0
}
10860
10861
// Generated as internal constructor for term reg_to_xmm_mem.
10862
0
pub fn constructor_reg_to_xmm_mem<C: Context>(
10863
0
    ctx: &mut C,
10864
0
    arg0: Reg,
10865
0
) -> XmmMem {
10866
0
    let v1 = C::xmm_new(ctx, arg0);
10867
0
    let v2 = &C::xmm_to_xmm_mem(ctx, v1);
10868
0
    // Rule at src/isa/x64/inst.isle line 5118.
10869
0
    return v2.clone();
10870
0
}
10871
10872
// Generated as internal constructor for term xmm_to_reg_mem.
10873
0
pub fn constructor_xmm_to_reg_mem<C: Context>(
10874
0
    ctx: &mut C,
10875
0
    arg0: Reg,
10876
0
) -> XmmMem {
10877
0
    let v1 = C::xmm_new(ctx, arg0);
10878
0
    let v2 = C::xmm_to_reg(ctx, v1);
10879
0
    let v3 = RegMem::Reg {
10880
0
        reg: v2,
10881
0
    };
10882
0
    let v4 = &C::reg_mem_to_xmm_mem(ctx, &v3);
10883
0
    // Rule at src/isa/x64/inst.isle line 5121.
10884
0
    return v4.clone();
10885
0
}
10886
10887
// Generated as internal constructor for term writable_gpr_to_r_reg.
10888
1.25M
pub fn constructor_writable_gpr_to_r_reg<C: Context>(
10889
1.25M
    ctx: &mut C,
10890
1.25M
    arg0: WritableGpr,
10891
1.25M
) -> Reg {
10892
1.25M
    let v1 = C::writable_gpr_to_reg(ctx, arg0);
10893
1.25M
    let v2 = C::writable_reg_to_reg(ctx, v1);
10894
1.25M
    // Rule at src/isa/x64/inst.isle line 5125.
10895
1.25M
    return v2;
10896
1.25M
}
10897
10898
// Generated as internal constructor for term writable_gpr_to_gpr_mem.
10899
0
pub fn constructor_writable_gpr_to_gpr_mem<C: Context>(
10900
0
    ctx: &mut C,
10901
0
    arg0: WritableGpr,
10902
0
) -> GprMem {
10903
0
    let v1 = C::writable_gpr_to_gpr(ctx, arg0);
10904
0
    let v2 = &C::gpr_to_gpr_mem(ctx, v1);
10905
0
    // Rule at src/isa/x64/inst.isle line 5128.
10906
0
    return v2.clone();
10907
0
}
10908
10909
// Generated as internal constructor for term writable_gpr_to_value_regs.
10910
0
pub fn constructor_writable_gpr_to_value_regs<C: Context>(
10911
0
    ctx: &mut C,
10912
0
    arg0: WritableGpr,
10913
0
) -> ValueRegs {
10914
0
    let v1 = constructor_writable_gpr_to_r_reg(ctx, arg0);
10915
0
    let v2 = C::value_reg(ctx, v1);
10916
0
    // Rule at src/isa/x64/inst.isle line 5131.
10917
0
    return v2;
10918
0
}
10919
10920
// Generated as internal constructor for term writable_xmm_to_r_reg.
10921
0
pub fn constructor_writable_xmm_to_r_reg<C: Context>(
10922
0
    ctx: &mut C,
10923
0
    arg0: WritableXmm,
10924
0
) -> Reg {
10925
0
    let v1 = C::writable_xmm_to_reg(ctx, arg0);
10926
0
    let v2 = C::writable_reg_to_reg(ctx, v1);
10927
0
    // Rule at src/isa/x64/inst.isle line 5134.
10928
0
    return v2;
10929
0
}
10930
10931
// Generated as internal constructor for term writable_xmm_to_xmm_mem.
10932
0
pub fn constructor_writable_xmm_to_xmm_mem<C: Context>(
10933
0
    ctx: &mut C,
10934
0
    arg0: WritableXmm,
10935
0
) -> XmmMem {
10936
0
    let v1 = C::writable_xmm_to_xmm(ctx, arg0);
10937
0
    let v2 = &C::xmm_to_xmm_mem(ctx, v1);
10938
0
    // Rule at src/isa/x64/inst.isle line 5137.
10939
0
    return v2.clone();
10940
0
}
10941
10942
// Generated as internal constructor for term writable_xmm_to_value_regs.
10943
0
pub fn constructor_writable_xmm_to_value_regs<C: Context>(
10944
0
    ctx: &mut C,
10945
0
    arg0: WritableXmm,
10946
0
) -> ValueRegs {
10947
0
    let v1 = constructor_writable_xmm_to_r_reg(ctx, arg0);
10948
0
    let v2 = C::value_reg(ctx, v1);
10949
0
    // Rule at src/isa/x64/inst.isle line 5140.
10950
0
    return v2;
10951
0
}
10952
10953
// Generated as internal constructor for term synthetic_amode_to_gpr_mem.
10954
649k
pub fn constructor_synthetic_amode_to_gpr_mem<C: Context>(
10955
649k
    ctx: &mut C,
10956
649k
    arg0: &SyntheticAmode,
10957
649k
) -> GprMem {
10958
649k
    let v1 = &C::synthetic_amode_to_reg_mem(ctx, arg0);
10959
649k
    let v2 = &C::reg_mem_to_gpr_mem(ctx, v1);
10960
649k
    // Rule at src/isa/x64/inst.isle line 5147.
10961
649k
    return v2.clone();
10962
649k
}
10963
10964
// Generated as internal constructor for term amode_to_gpr_mem.
10965
649k
pub fn constructor_amode_to_gpr_mem<C: Context>(
10966
649k
    ctx: &mut C,
10967
649k
    arg0: &Amode,
10968
649k
) -> GprMem {
10969
649k
    let v1 = &C::amode_to_synthetic_amode(ctx, arg0);
10970
649k
    let v2 = &constructor_synthetic_amode_to_gpr_mem(ctx, v1);
10971
649k
    // Rule at src/isa/x64/inst.isle line 5145.
10972
649k
    return v2.clone();
10973
649k
}
10974
10975
// Generated as internal constructor for term amode_to_xmm_mem.
10976
0
pub fn constructor_amode_to_xmm_mem<C: Context>(
10977
0
    ctx: &mut C,
10978
0
    arg0: &Amode,
10979
0
) -> XmmMem {
10980
0
    let v1 = &C::amode_to_synthetic_amode(ctx, arg0);
10981
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, v1);
10982
0
    // Rule at src/isa/x64/inst.isle line 5150.
10983
0
    return v2.clone();
10984
0
}
10985
10986
// Generated as internal constructor for term synthetic_amode_to_xmm_mem.
10987
0
pub fn constructor_synthetic_amode_to_xmm_mem<C: Context>(
10988
0
    ctx: &mut C,
10989
0
    arg0: &SyntheticAmode,
10990
0
) -> XmmMem {
10991
0
    let v1 = &C::synthetic_amode_to_reg_mem(ctx, arg0);
10992
0
    let v2 = &C::reg_mem_to_xmm_mem(ctx, v1);
10993
0
    // Rule at src/isa/x64/inst.isle line 5153.
10994
0
    return v2.clone();
10995
0
}
10996
10997
// Generated as internal constructor for term const_to_xmm_mem.
10998
0
pub fn constructor_const_to_xmm_mem<C: Context>(
10999
0
    ctx: &mut C,
11000
0
    arg0: VCodeConstant,
11001
0
) -> XmmMem {
11002
0
    let v1 = &C::const_to_synthetic_amode(ctx, arg0);
11003
0
    let v2 = &constructor_synthetic_amode_to_xmm_mem(ctx, v1);
11004
0
    // Rule at src/isa/x64/inst.isle line 5158.
11005
0
    return v2.clone();
11006
0
}
11007
11008
// Generated as internal constructor for term const_to_reg_mem.
11009
0
pub fn constructor_const_to_reg_mem<C: Context>(
11010
0
    ctx: &mut C,
11011
0
    arg0: VCodeConstant,
11012
0
) -> RegMem {
11013
0
    let v1 = &C::const_to_synthetic_amode(ctx, arg0);
11014
0
    let v2 = RegMem::Mem {
11015
0
        addr: v1.clone(),
11016
0
    };
11017
0
    // Rule at src/isa/x64/inst.isle line 5160.
11018
0
    return v2;
11019
0
}
11020
11021
// Generated as internal constructor for term xmm_to_xmm_mem_aligned.
11022
0
pub fn constructor_xmm_to_xmm_mem_aligned<C: Context>(
11023
0
    ctx: &mut C,
11024
0
    arg0: Xmm,
11025
0
) -> XmmMemAligned {
11026
0
    let v1 = &C::xmm_to_xmm_mem(ctx, arg0);
11027
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
11028
0
    // Rule at src/isa/x64/inst.isle line 5163.
11029
0
    return v2.clone();
11030
0
}
11031
11032
// Generated as internal constructor for term amode_to_xmm_mem_aligned.
11033
0
pub fn constructor_amode_to_xmm_mem_aligned<C: Context>(
11034
0
    ctx: &mut C,
11035
0
    arg0: &Amode,
11036
0
) -> XmmMemAligned {
11037
0
    let v1 = &constructor_amode_to_xmm_mem(ctx, arg0);
11038
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
11039
0
    // Rule at src/isa/x64/inst.isle line 5165.
11040
0
    return v2.clone();
11041
0
}
11042
11043
// Generated as internal constructor for term synthetic_amode_to_xmm_mem_aligned.
11044
0
pub fn constructor_synthetic_amode_to_xmm_mem_aligned<C: Context>(
11045
0
    ctx: &mut C,
11046
0
    arg0: &SyntheticAmode,
11047
0
) -> XmmMemAligned {
11048
0
    let v1 = &constructor_synthetic_amode_to_xmm_mem(ctx, arg0);
11049
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
11050
0
    // Rule at src/isa/x64/inst.isle line 5167.
11051
0
    return v2.clone();
11052
0
}
11053
11054
// Generated as internal constructor for term put_in_xmm_mem_aligned.
11055
0
pub fn constructor_put_in_xmm_mem_aligned<C: Context>(
11056
0
    ctx: &mut C,
11057
0
    arg0: Value,
11058
0
) -> XmmMemAligned {
11059
0
    let v1 = &C::put_in_xmm_mem(ctx, arg0);
11060
0
    let v2 = &C::xmm_mem_to_xmm_mem_aligned(ctx, v1);
11061
0
    // Rule at src/isa/x64/inst.isle line 5169.
11062
0
    return v2.clone();
11063
0
}
11064
11065
// Generated as internal constructor for term mov_to_preg.
11066
0
pub fn constructor_mov_to_preg<C: Context>(
11067
0
    ctx: &mut C,
11068
0
    arg0: PReg,
11069
0
    arg1: Gpr,
11070
0
) -> SideEffectNoResult {
11071
0
    let v2 = MInst::MovToPReg {
11072
0
        src: arg1,
11073
0
        dst: arg0,
11074
0
    };
11075
0
    let v3 = SideEffectNoResult::Inst {
11076
0
        inst: v2,
11077
0
    };
11078
0
    // Rule at src/isa/x64/inst.isle line 5172.
11079
0
    return v3;
11080
0
}
11081
11082
// Generated as internal constructor for term x64_rbp.
11083
4.37k
pub fn constructor_x64_rbp<C: Context>(
11084
4.37k
    ctx: &mut C,
11085
4.37k
) -> Reg {
11086
4.37k
    let v0 = C::preg_rbp(ctx);
11087
4.37k
    let v1 = constructor_mov_from_preg(ctx, v0);
11088
4.37k
    // Rule at src/isa/x64/inst.isle line 5185.
11089
4.37k
    return v1;
11090
4.37k
}
11091
11092
// Generated as internal constructor for term x64_rsp.
11093
15.9k
pub fn constructor_x64_rsp<C: Context>(
11094
15.9k
    ctx: &mut C,
11095
15.9k
) -> Reg {
11096
15.9k
    let v0 = C::preg_rsp(ctx);
11097
15.9k
    let v1 = constructor_mov_from_preg(ctx, v0);
11098
15.9k
    // Rule at src/isa/x64/inst.isle line 5189.
11099
15.9k
    return v1;
11100
15.9k
}
11101
11102
// Generated as internal constructor for term lower.
11103
5.47M
pub fn constructor_lower<C: Context>(
11104
5.47M
    ctx: &mut C,
11105
5.47M
    arg0: Inst,
11106
5.47M
) -> Option<InstOutput> {
11107
5.47M
    let v6 = &C::inst_data(ctx, arg0);
11108
5.47M
    match v6 {
11109
        &InstructionData::AtomicCas {
11110
0
            opcode: ref v1743,
11111
0
            args: ref v1744,
11112
0
            flags: v1745,
11113
0
        } => {
11114
0
            if let &Opcode::AtomicCas = v1743 {
11115
0
                let v1 = C::first_result(ctx, arg0);
11116
0
                if let Some(v2) = v1 {
11117
0
                    let v3 = C::value_type(ctx, v2);
11118
0
                    let v4 = C::fits_in_64(ctx, v3);
11119
0
                    if let Some(v5) = v4 {
11120
0
                        let v1718 = C::ty_int(ctx, v3);
11121
0
                        if let Some(v1719) = v1718 {
11122
0
                            let v1746 = C::unpack_value_array_3(ctx, v1744);
11123
0
                            let v1750 = constructor_put_in_gpr(ctx, v1746.1);
11124
0
                            let v1751 = constructor_put_in_gpr(ctx, v1746.2);
11125
0
                            let v1752 = C::zero_offset(ctx);
11126
0
                            let v1753 = &constructor_to_amode(ctx, v1745, v1746.0, v1752);
11127
0
                            let v1754 = &C::amode_to_synthetic_amode(ctx, v1753);
11128
0
                            let v1755 = constructor_x64_cmpxchg(ctx, v5, v1750, v1751, v1754);
11129
0
                            let v1756 = constructor_output_gpr(ctx, v1755);
11130
0
                            // Rule at src/isa/x64/lower.isle line 3239.
11131
0
                            return Some(v1756);
11132
0
                        }
11133
0
                    }
11134
0
                }
11135
0
            }
11136
        }
11137
        &InstructionData::AtomicRmw {
11138
0
            opcode: ref v1757,
11139
0
            args: ref v1758,
11140
0
            flags: v1759,
11141
0
            op: ref v1760,
11142
0
        } => {
11143
0
            if let &Opcode::AtomicRmw = v1757 {
11144
0
                let v1 = C::first_result(ctx, arg0);
11145
0
                if let Some(v2) = v1 {
11146
0
                    let v3 = C::value_type(ctx, v2);
11147
0
                    let v4 = C::fits_in_64(ctx, v3);
11148
0
                    if let Some(v5) = v4 {
11149
0
                        let v1718 = C::ty_int(ctx, v3);
11150
0
                        if let Some(v1719) = v1718 {
11151
0
                            let v1764 = &C::atomic_rmw_op_to_mach_atomic_rmw_op(ctx, v1760);
11152
0
                            let v1720 = C::zero_offset(ctx);
11153
0
                            let v1761 = C::unpack_value_array_2(ctx, v1758);
11154
0
                            let v1765 = &constructor_to_amode(ctx, v1759, v1761.0, v1720);
11155
0
                            let v1766 = &C::amode_to_synthetic_amode(ctx, v1765);
11156
0
                            let v1767 = constructor_put_in_gpr(ctx, v1761.1);
11157
0
                            let v1768 = constructor_x64_atomic_rmw_seq(ctx, v5, v1764, v1766, v1767);
11158
0
                            let v1769 = constructor_output_gpr(ctx, v1768);
11159
0
                            // Rule at src/isa/x64/lower.isle line 3255.
11160
0
                            return Some(v1769);
11161
0
                        }
11162
0
                    }
11163
0
                }
11164
0
            }
11165
        }
11166
        &InstructionData::Binary {
11167
1.26M
            opcode: ref v36,
11168
1.26M
            args: ref v37,
11169
1.26M
        } => {
11170
1.26M
            match v36 {
11171
                &Opcode::Swizzle => {
11172
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
11173
0
                    let v1261 = constructor_put_in_xmm(ctx, v38.1);
11174
0
                    let v2368 = C::emit_u128_le_const(ctx, 0x70707070707070707070707070707070);
11175
0
                    let v2369 = &constructor_const_to_xmm_mem(ctx, v2368);
11176
0
                    let v2370 = constructor_x64_paddusb(ctx, v1261, v2369);
11177
0
                    let v343 = constructor_put_in_xmm(ctx, v38.0);
11178
0
                    let v2371 = C::xmm_to_reg(ctx, v2370);
11179
0
                    let v2372 = &constructor_xmm_to_reg_mem(ctx, v2371);
11180
0
                    let v2373 = &C::xmm_mem_to_reg_mem(ctx, v2372);
11181
0
                    let v2374 = constructor_lower_pshufb(ctx, v343, v2373);
11182
0
                    let v2375 = constructor_output_xmm(ctx, v2374);
11183
0
                    // Rule at src/isa/x64/lower.isle line 4363.
11184
0
                    return Some(v2375);
11185
                }
11186
                &Opcode::X86Pshufb => {
11187
0
                    let v525 = C::use_ssse3(ctx);
11188
0
                    if v525 == true {
11189
0
                        let v38 = C::unpack_value_array_2(ctx, v37);
11190
0
                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11191
0
                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11192
0
                        let v2376 = constructor_x64_pshufb(ctx, v68, v69);
11193
0
                        let v2377 = constructor_output_xmm(ctx, v2376);
11194
0
                        // Rule at src/isa/x64/lower.isle line 4369.
11195
0
                        return Some(v2377);
11196
0
                    }
11197
                }
11198
                &Opcode::Smin => {
11199
0
                    let v1 = C::first_result(ctx, arg0);
11200
0
                    if let Some(v2) = v1 {
11201
0
                        let v3 = C::value_type(ctx, v2);
11202
0
                        let v758 = C::ty_vec128(ctx, v3);
11203
0
                        if let Some(v759) = v758 {
11204
0
                            let v762 = constructor_has_pmins(ctx, v759);
11205
0
                            if v762 == true {
11206
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
11207
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
11208
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11209
0
                                let v763 = constructor_x64_pmins(ctx, v759, v68, v69);
11210
0
                                let v764 = constructor_output_xmm(ctx, v763);
11211
0
                                // Rule at src/isa/x64/lower.isle line 1708.
11212
0
                                return Some(v764);
11213
0
                            }
11214
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11215
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11216
0
                            let v444 = constructor_put_in_xmm(ctx, v38.1);
11217
0
                            let v316 = &C::xmm_to_xmm_mem(ctx, v68);
11218
0
                            let v765 = constructor_x64_pcmpgt(ctx, v759, v444, v316);
11219
0
                            let v318 = &C::xmm_to_xmm_mem(ctx, v68);
11220
0
                            let v766 = constructor_x64_pand(ctx, v765, v318);
11221
0
                            let v449 = &C::xmm_to_xmm_mem(ctx, v444);
11222
0
                            let v767 = constructor_x64_pandn(ctx, v765, v449);
11223
0
                            let v768 = &C::xmm_to_xmm_mem(ctx, v767);
11224
0
                            let v769 = constructor_x64_por(ctx, v766, v768);
11225
0
                            let v770 = constructor_output_xmm(ctx, v769);
11226
0
                            // Rule at src/isa/x64/lower.isle line 1712.
11227
0
                            return Some(v770);
11228
0
                        }
11229
0
                        let v4 = C::fits_in_64(ctx, v3);
11230
0
                        if let Some(v5) = v4 {
11231
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11232
0
                            let v753 = constructor_cmp_and_choose(ctx, v5, &CC::L, v38.0, v38.1);
11233
0
                            let v754 = C::output(ctx, v753);
11234
0
                            // Rule at src/isa/x64/lower.isle line 1658.
11235
0
                            return Some(v754);
11236
0
                        }
11237
0
                    }
11238
                }
11239
                &Opcode::Umin => {
11240
1.72k
                    let v1 = C::first_result(ctx, arg0);
11241
1.72k
                    if let Some(v2) = v1 {
11242
1.72k
                        let v3 = C::value_type(ctx, v2);
11243
1.72k
                        let v758 = C::ty_vec128(ctx, v3);
11244
1.72k
                        if let Some(
v7590
) = v758 {
11245
0
                            let v792 = constructor_has_pminu(ctx, v759);
11246
0
                            if v792 == true {
11247
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
11248
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
11249
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11250
0
                                let v793 = constructor_x64_pminu(ctx, v759, v68, v69);
11251
0
                                let v794 = constructor_output_xmm(ctx, v793);
11252
0
                                // Rule at src/isa/x64/lower.isle line 1760.
11253
0
                                return Some(v794);
11254
0
                            }
11255
1.72k
                        }
11256
1.72k
                        if v3 == I16X8 {
11257
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11258
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11259
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11260
0
                            let v150 = constructor_x64_psubusw(ctx, v68, v69);
11261
0
                            let v795 = &C::xmm_to_xmm_mem(ctx, v150);
11262
0
                            let v796 = constructor_x64_psubw(ctx, v68, v795);
11263
0
                            let v797 = constructor_output_xmm(ctx, v796);
11264
0
                            // Rule at src/isa/x64/lower.isle line 1766.
11265
0
                            return Some(v797);
11266
1.72k
                        }
11267
1.72k
                        if let Some(
v7590
) = v758 {
11268
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11269
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11270
0
                            let v444 = constructor_put_in_xmm(ctx, v38.1);
11271
0
                            let v778 = constructor_flip_high_bit_mask(ctx, v759);
11272
0
                            let v779 = &C::xmm_to_xmm_mem(ctx, v778);
11273
0
                            let v780 = constructor_x64_pxor(ctx, v68, v779);
11274
0
                            let v781 = &C::xmm_to_xmm_mem(ctx, v778);
11275
0
                            let v782 = constructor_x64_pxor(ctx, v444, v781);
11276
0
                            let v798 = &C::xmm_to_xmm_mem(ctx, v780);
11277
0
                            let v799 = constructor_x64_pcmpgt(ctx, v759, v782, v798);
11278
0
                            let v785 = &C::xmm_to_xmm_mem(ctx, v68);
11279
0
                            let v800 = constructor_x64_pand(ctx, v799, v785);
11280
0
                            let v787 = &C::xmm_to_xmm_mem(ctx, v444);
11281
0
                            let v801 = constructor_x64_pandn(ctx, v799, v787);
11282
0
                            let v802 = &C::xmm_to_xmm_mem(ctx, v801);
11283
0
                            let v803 = constructor_x64_por(ctx, v800, v802);
11284
0
                            let v804 = constructor_output_xmm(ctx, v803);
11285
0
                            // Rule at src/isa/x64/lower.isle line 1771.
11286
0
                            return Some(v804);
11287
1.72k
                        }
11288
1.72k
                        let v4 = C::fits_in_64(ctx, v3);
11289
1.72k
                        if let Some(v5) = v4 {
11290
1.72k
                            let v38 = C::unpack_value_array_2(ctx, v37);
11291
1.72k
                            let v747 = constructor_cmp_and_choose(ctx, v5, &CC::B, v38.0, v38.1);
11292
1.72k
                            let v748 = C::output(ctx, v747);
11293
1.72k
                            // Rule at src/isa/x64/lower.isle line 1652.
11294
1.72k
                            return Some(v748);
11295
0
                        }
11296
0
                    }
11297
                }
11298
                &Opcode::Smax => {
11299
0
                    let v1 = C::first_result(ctx, arg0);
11300
0
                    if let Some(v2) = v1 {
11301
0
                        let v3 = C::value_type(ctx, v2);
11302
0
                        let v758 = C::ty_vec128(ctx, v3);
11303
0
                        if let Some(v759) = v758 {
11304
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11305
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11306
0
                            let v444 = constructor_put_in_xmm(ctx, v38.1);
11307
0
                            let v760 = constructor_lower_vec_smax(ctx, v759, v68, v444);
11308
0
                            let v761 = constructor_output_xmm(ctx, v760);
11309
0
                            // Rule at src/isa/x64/lower.isle line 1688.
11310
0
                            return Some(v761);
11311
0
                        }
11312
0
                        let v4 = C::fits_in_64(ctx, v3);
11313
0
                        if let Some(v5) = v4 {
11314
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11315
0
                            let v756 = constructor_cmp_and_choose(ctx, v5, &CC::NL, v38.0, v38.1);
11316
0
                            let v757 = C::output(ctx, v756);
11317
0
                            // Rule at src/isa/x64/lower.isle line 1661.
11318
0
                            return Some(v757);
11319
0
                        }
11320
0
                    }
11321
                }
11322
                &Opcode::Umax => {
11323
2.82k
                    let v1 = C::first_result(ctx, arg0);
11324
2.82k
                    if let Some(v2) = v1 {
11325
2.82k
                        let v3 = C::value_type(ctx, v2);
11326
2.82k
                        let v758 = C::ty_vec128(ctx, v3);
11327
2.82k
                        if let Some(
v7590
) = v758 {
11328
0
                            let v771 = constructor_has_pmaxu(ctx, v759);
11329
0
                            if v771 == true {
11330
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
11331
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
11332
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11333
0
                                let v772 = constructor_x64_pmaxu(ctx, v759, v68, v69);
11334
0
                                let v773 = constructor_output_xmm(ctx, v772);
11335
0
                                // Rule at src/isa/x64/lower.isle line 1724.
11336
0
                                return Some(v773);
11337
0
                            }
11338
2.82k
                        }
11339
2.82k
                        if v3 == I16X8 {
11340
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11341
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11342
0
                            let v444 = constructor_put_in_xmm(ctx, v38.1);
11343
0
                            let v316 = &C::xmm_to_xmm_mem(ctx, v68);
11344
0
                            let v774 = constructor_x64_psubusw(ctx, v444, v316);
11345
0
                            let v775 = &C::xmm_to_xmm_mem(ctx, v774);
11346
0
                            let v776 = constructor_x64_paddw(ctx, v68, v775);
11347
0
                            let v777 = constructor_output_xmm(ctx, v776);
11348
0
                            // Rule at src/isa/x64/lower.isle line 1730.
11349
0
                            return Some(v777);
11350
2.82k
                        }
11351
2.82k
                        if let Some(
v7590
) = v758 {
11352
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11353
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11354
0
                            let v444 = constructor_put_in_xmm(ctx, v38.1);
11355
0
                            let v778 = constructor_flip_high_bit_mask(ctx, v759);
11356
0
                            let v779 = &C::xmm_to_xmm_mem(ctx, v778);
11357
0
                            let v780 = constructor_x64_pxor(ctx, v68, v779);
11358
0
                            let v781 = &C::xmm_to_xmm_mem(ctx, v778);
11359
0
                            let v782 = constructor_x64_pxor(ctx, v444, v781);
11360
0
                            let v783 = &C::xmm_to_xmm_mem(ctx, v782);
11361
0
                            let v784 = constructor_x64_pcmpgt(ctx, v759, v780, v783);
11362
0
                            let v785 = &C::xmm_to_xmm_mem(ctx, v68);
11363
0
                            let v786 = constructor_x64_pand(ctx, v784, v785);
11364
0
                            let v787 = &C::xmm_to_xmm_mem(ctx, v444);
11365
0
                            let v788 = constructor_x64_pandn(ctx, v784, v787);
11366
0
                            let v789 = &C::xmm_to_xmm_mem(ctx, v788);
11367
0
                            let v790 = constructor_x64_por(ctx, v786, v789);
11368
0
                            let v791 = constructor_output_xmm(ctx, v790);
11369
0
                            // Rule at src/isa/x64/lower.isle line 1737.
11370
0
                            return Some(v791);
11371
2.82k
                        }
11372
2.82k
                        let v4 = C::fits_in_64(ctx, v3);
11373
2.82k
                        if let Some(v5) = v4 {
11374
2.82k
                            let v38 = C::unpack_value_array_2(ctx, v37);
11375
2.82k
                            let v750 = constructor_cmp_and_choose(ctx, v5, &CC::NB, v38.0, v38.1);
11376
2.82k
                            let v751 = C::output(ctx, v750);
11377
2.82k
                            // Rule at src/isa/x64/lower.isle line 1655.
11378
2.82k
                            return Some(v751);
11379
0
                        }
11380
0
                    }
11381
                }
11382
                &Opcode::AvgRound => {
11383
0
                    let v1 = C::first_result(ctx, arg0);
11384
0
                    if let Some(v2) = v1 {
11385
0
                        let v3 = C::value_type(ctx, v2);
11386
0
                        let v64 = C::multi_lane(ctx, v3);
11387
0
                        if let Some(v65) = v64 {
11388
0
                            match v65.0 {
11389
                                0x8 => {
11390
0
                                    if v65.1 == 0x10 {
11391
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11392
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11393
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11394
0
                                        let v415 = constructor_x64_pavgb(ctx, v68, v69);
11395
0
                                        let v416 = constructor_output_xmm(ctx, v415);
11396
0
                                        // Rule at src/isa/x64/lower.isle line 956.
11397
0
                                        return Some(v416);
11398
0
                                    }
11399
                                }
11400
                                0x10 => {
11401
0
                                    if v65.1 == 0x8 {
11402
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11403
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11404
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11405
0
                                        let v417 = constructor_x64_pavgw(ctx, v68, v69);
11406
0
                                        let v418 = constructor_output_xmm(ctx, v417);
11407
0
                                        // Rule at src/isa/x64/lower.isle line 960.
11408
0
                                        return Some(v418);
11409
0
                                    }
11410
                                }
11411
0
                                _ => {}
11412
                            }
11413
0
                        }
11414
0
                    }
11415
                }
11416
                &Opcode::UaddSat => {
11417
0
                    let v1 = C::first_result(ctx, arg0);
11418
0
                    if let Some(v2) = v1 {
11419
0
                        let v3 = C::value_type(ctx, v2);
11420
0
                        let v64 = C::multi_lane(ctx, v3);
11421
0
                        if let Some(v65) = v64 {
11422
0
                            match v65.0 {
11423
                                0x8 => {
11424
0
                                    if v65.1 == 0x10 {
11425
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11426
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11427
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11428
0
                                        let v126 = constructor_x64_paddusb(ctx, v68, v69);
11429
0
                                        let v127 = constructor_output_xmm(ctx, v126);
11430
0
                                        // Rule at src/isa/x64/lower.isle line 194.
11431
0
                                        return Some(v127);
11432
0
                                    }
11433
                                }
11434
                                0x10 => {
11435
0
                                    if v65.1 == 0x8 {
11436
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11437
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11438
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11439
0
                                        let v128 = constructor_x64_paddusw(ctx, v68, v69);
11440
0
                                        let v129 = constructor_output_xmm(ctx, v128);
11441
0
                                        // Rule at src/isa/x64/lower.isle line 198.
11442
0
                                        return Some(v129);
11443
0
                                    }
11444
                                }
11445
0
                                _ => {}
11446
                            }
11447
0
                        }
11448
0
                    }
11449
                }
11450
                &Opcode::SaddSat => {
11451
0
                    let v1 = C::first_result(ctx, arg0);
11452
0
                    if let Some(v2) = v1 {
11453
0
                        let v3 = C::value_type(ctx, v2);
11454
0
                        let v64 = C::multi_lane(ctx, v3);
11455
0
                        if let Some(v65) = v64 {
11456
0
                            match v65.0 {
11457
                                0x8 => {
11458
0
                                    if v65.1 == 0x10 {
11459
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11460
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11461
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11462
0
                                        let v122 = constructor_x64_paddsb(ctx, v68, v69);
11463
0
                                        let v123 = constructor_output_xmm(ctx, v122);
11464
0
                                        // Rule at src/isa/x64/lower.isle line 184.
11465
0
                                        return Some(v123);
11466
0
                                    }
11467
                                }
11468
                                0x10 => {
11469
0
                                    if v65.1 == 0x8 {
11470
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11471
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11472
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11473
0
                                        let v124 = constructor_x64_paddsw(ctx, v68, v69);
11474
0
                                        let v125 = constructor_output_xmm(ctx, v124);
11475
0
                                        // Rule at src/isa/x64/lower.isle line 188.
11476
0
                                        return Some(v125);
11477
0
                                    }
11478
                                }
11479
0
                                _ => {}
11480
                            }
11481
0
                        }
11482
0
                    }
11483
                }
11484
                &Opcode::UsubSat => {
11485
0
                    let v1 = C::first_result(ctx, arg0);
11486
0
                    if let Some(v2) = v1 {
11487
0
                        let v3 = C::value_type(ctx, v2);
11488
0
                        let v64 = C::multi_lane(ctx, v3);
11489
0
                        if let Some(v65) = v64 {
11490
0
                            match v65.0 {
11491
                                0x8 => {
11492
0
                                    if v65.1 == 0x10 {
11493
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11494
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11495
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11496
0
                                        let v148 = constructor_x64_psubusb(ctx, v68, v69);
11497
0
                                        let v149 = constructor_output_xmm(ctx, v148);
11498
0
                                        // Rule at src/isa/x64/lower.isle line 255.
11499
0
                                        return Some(v149);
11500
0
                                    }
11501
                                }
11502
                                0x10 => {
11503
0
                                    if v65.1 == 0x8 {
11504
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11505
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11506
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11507
0
                                        let v150 = constructor_x64_psubusw(ctx, v68, v69);
11508
0
                                        let v151 = constructor_output_xmm(ctx, v150);
11509
0
                                        // Rule at src/isa/x64/lower.isle line 259.
11510
0
                                        return Some(v151);
11511
0
                                    }
11512
                                }
11513
0
                                _ => {}
11514
                            }
11515
0
                        }
11516
0
                    }
11517
                }
11518
                &Opcode::SsubSat => {
11519
0
                    let v1 = C::first_result(ctx, arg0);
11520
0
                    if let Some(v2) = v1 {
11521
0
                        let v3 = C::value_type(ctx, v2);
11522
0
                        let v64 = C::multi_lane(ctx, v3);
11523
0
                        if let Some(v65) = v64 {
11524
0
                            match v65.0 {
11525
                                0x8 => {
11526
0
                                    if v65.1 == 0x10 {
11527
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11528
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11529
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11530
0
                                        let v144 = constructor_x64_psubsb(ctx, v68, v69);
11531
0
                                        let v145 = constructor_output_xmm(ctx, v144);
11532
0
                                        // Rule at src/isa/x64/lower.isle line 245.
11533
0
                                        return Some(v145);
11534
0
                                    }
11535
                                }
11536
                                0x10 => {
11537
0
                                    if v65.1 == 0x8 {
11538
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11539
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11540
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11541
0
                                        let v146 = constructor_x64_psubsw(ctx, v68, v69);
11542
0
                                        let v147 = constructor_output_xmm(ctx, v146);
11543
0
                                        // Rule at src/isa/x64/lower.isle line 249.
11544
0
                                        return Some(v147);
11545
0
                                    }
11546
                                }
11547
0
                                _ => {}
11548
                            }
11549
0
                        }
11550
0
                    }
11551
                }
11552
                &Opcode::Iadd => {
11553
1.00M
                    let v1 = C::first_result(ctx, arg0);
11554
1.00M
                    if let Some(v2) = v1 {
11555
1.00M
                        let v3 = C::value_type(ctx, v2);
11556
1.00M
                        if v3 == I128 {
11557
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11558
0
                            let v78 = C::put_in_regs(ctx, v38.0);
11559
0
                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
11560
0
                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
11561
0
                            let v83 = C::put_in_regs(ctx, v38.1);
11562
0
                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
11563
0
                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
11564
0
                            let v86 = &C::gpr_to_gpr_mem_imm(ctx, v84);
11565
0
                            let v87 = &constructor_x64_add_with_flags_paired(ctx, I64, v80, v86);
11566
0
                            let v88 = &C::gpr_to_gpr_mem_imm(ctx, v85);
11567
0
                            let v89 = &constructor_x64_adc_paired(ctx, I64, v82, v88);
11568
0
                            let v90 = constructor_with_flags(ctx, v87, v89);
11569
0
                            let v91 = C::output(ctx, v90);
11570
0
                            // Rule at src/isa/x64/lower.isle line 88.
11571
0
                            return Some(v91);
11572
1.00M
                        }
11573
1.00M
                        let v64 = C::multi_lane(ctx, v3);
11574
1.00M
                        if let Some(
v650
) = v64 {
11575
0
                            match v65.0 {
11576
                                0x8 => {
11577
0
                                    if v65.1 == 0x10 {
11578
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11579
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11580
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11581
0
                                        let v70 = constructor_x64_paddb(ctx, v68, v69);
11582
0
                                        let v71 = constructor_output_xmm(ctx, v70);
11583
0
                                        // Rule at src/isa/x64/lower.isle line 71.
11584
0
                                        return Some(v71);
11585
0
                                    }
11586
                                }
11587
                                0x10 => {
11588
0
                                    if v65.1 == 0x8 {
11589
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11590
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11591
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11592
0
                                        let v72 = constructor_x64_paddw(ctx, v68, v69);
11593
0
                                        let v73 = constructor_output_xmm(ctx, v72);
11594
0
                                        // Rule at src/isa/x64/lower.isle line 75.
11595
0
                                        return Some(v73);
11596
0
                                    }
11597
                                }
11598
                                0x20 => {
11599
0
                                    if v65.1 == 0x4 {
11600
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11601
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11602
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11603
0
                                        let v74 = constructor_x64_paddd(ctx, v68, v69);
11604
0
                                        let v75 = constructor_output_xmm(ctx, v74);
11605
0
                                        // Rule at src/isa/x64/lower.isle line 79.
11606
0
                                        return Some(v75);
11607
0
                                    }
11608
                                }
11609
                                0x40 => {
11610
0
                                    if v65.1 == 0x2 {
11611
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11612
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11613
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11614
0
                                        let v76 = constructor_x64_paddq(ctx, v68, v69);
11615
0
                                        let v77 = constructor_output_xmm(ctx, v76);
11616
0
                                        // Rule at src/isa/x64/lower.isle line 83.
11617
0
                                        return Some(v77);
11618
0
                                    }
11619
                                }
11620
0
                                _ => {}
11621
                            }
11622
1.00M
                        }
11623
1.00M
                        let v4 = C::fits_in_64(ctx, v3);
11624
1.00M
                        if let Some(v5) = v4 {
11625
1.00M
                            let v38 = C::unpack_value_array_2(ctx, v37);
11626
1.00M
                            let v58 = &C::sinkable_load(ctx, v38.0);
11627
1.00M
                            if let Some(
v5915.0k
) = v58 {
11628
15.0k
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
11629
15.0k
                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
11630
15.0k
                                let v62 = constructor_x64_add(ctx, v5, v60, v61);
11631
15.0k
                                let v63 = constructor_output_gpr(ctx, v62);
11632
15.0k
                                // Rule at src/isa/x64/lower.isle line 65.
11633
15.0k
                                return Some(v63);
11634
988k
                            }
11635
988k
                            let v53 = &C::sinkable_load(ctx, v38.1);
11636
988k
                            if let Some(
v54141
) = v53 {
11637
141
                                let v41 = constructor_put_in_gpr(ctx, v38.0);
11638
141
                                let v55 = &constructor_sink_load_to_gpr_mem_imm(ctx, v54);
11639
141
                                let v56 = constructor_x64_add(ctx, v5, v41, v55);
11640
141
                                let v57 = constructor_output_gpr(ctx, v56);
11641
141
                                // Rule at src/isa/x64/lower.isle line 62.
11642
141
                                return Some(v57);
11643
988k
                            }
11644
0
                        }
11645
988k
                        let v45 = C::ty_32_or_64(ctx, v3);
11646
988k
                        if let Some(v46) = v45 {
11647
988k
                            let v48 = C::zero_offset(ctx);
11648
988k
                            let v47 = C::mem_flags_trusted(ctx);
11649
988k
                            let v38 = C::unpack_value_array_2(ctx, v37);
11650
988k
                            let v49 = &constructor_to_amode_add(ctx, v47, v38.0, v38.1, v48);
11651
988k
                            let v50 = &C::amode_to_synthetic_amode(ctx, v49);
11652
988k
                            let v51 = constructor_x64_lea(ctx, v46, v50);
11653
988k
                            let v52 = constructor_output_gpr(ctx, v51);
11654
988k
                            // Rule at src/isa/x64/lower.isle line 56.
11655
988k
                            return Some(v52);
11656
0
                        }
11657
0
                        let v34 = C::fits_in_16(ctx, v3);
11658
0
                        if let Some(v35) = v34 {
11659
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11660
0
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
11661
0
                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
11662
0
                            let v43 = constructor_x64_add(ctx, v35, v41, v42);
11663
0
                            let v44 = constructor_output_gpr(ctx, v43);
11664
0
                            // Rule at src/isa/x64/lower.isle line 45.
11665
0
                            return Some(v44);
11666
0
                        }
11667
0
                    }
11668
                }
11669
                &Opcode::Isub => {
11670
63.3k
                    let v1 = C::first_result(ctx, arg0);
11671
63.3k
                    if let Some(v2) = v1 {
11672
63.3k
                        let v3 = C::value_type(ctx, v2);
11673
63.3k
                        if v3 == I128 {
11674
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11675
0
                            let v78 = C::put_in_regs(ctx, v38.0);
11676
0
                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
11677
0
                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
11678
0
                            let v83 = C::put_in_regs(ctx, v38.1);
11679
0
                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
11680
0
                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
11681
0
                            let v86 = &C::gpr_to_gpr_mem_imm(ctx, v84);
11682
0
                            let v140 = &constructor_x64_sub_with_flags_paired(ctx, I64, v80, v86);
11683
0
                            let v88 = &C::gpr_to_gpr_mem_imm(ctx, v85);
11684
0
                            let v141 = &constructor_x64_sbb_paired(ctx, I64, v82, v88);
11685
0
                            let v142 = constructor_with_flags(ctx, v140, v141);
11686
0
                            let v143 = C::output(ctx, v142);
11687
0
                            // Rule at src/isa/x64/lower.isle line 230.
11688
0
                            return Some(v143);
11689
63.3k
                        }
11690
63.3k
                        let v64 = C::multi_lane(ctx, v3);
11691
63.3k
                        if let Some(
v650
) = v64 {
11692
0
                            match v65.0 {
11693
                                0x8 => {
11694
0
                                    if v65.1 == 0x10 {
11695
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11696
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11697
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11698
0
                                        let v132 = constructor_x64_psubb(ctx, v68, v69);
11699
0
                                        let v133 = constructor_output_xmm(ctx, v132);
11700
0
                                        // Rule at src/isa/x64/lower.isle line 213.
11701
0
                                        return Some(v133);
11702
0
                                    }
11703
                                }
11704
                                0x10 => {
11705
0
                                    if v65.1 == 0x8 {
11706
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11707
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11708
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11709
0
                                        let v134 = constructor_x64_psubw(ctx, v68, v69);
11710
0
                                        let v135 = constructor_output_xmm(ctx, v134);
11711
0
                                        // Rule at src/isa/x64/lower.isle line 217.
11712
0
                                        return Some(v135);
11713
0
                                    }
11714
                                }
11715
                                0x20 => {
11716
0
                                    if v65.1 == 0x4 {
11717
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11718
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11719
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11720
0
                                        let v136 = constructor_x64_psubd(ctx, v68, v69);
11721
0
                                        let v137 = constructor_output_xmm(ctx, v136);
11722
0
                                        // Rule at src/isa/x64/lower.isle line 221.
11723
0
                                        return Some(v137);
11724
0
                                    }
11725
                                }
11726
                                0x40 => {
11727
0
                                    if v65.1 == 0x2 {
11728
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11729
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11730
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11731
0
                                        let v138 = constructor_x64_psubq(ctx, v68, v69);
11732
0
                                        let v139 = constructor_output_xmm(ctx, v138);
11733
0
                                        // Rule at src/isa/x64/lower.isle line 225.
11734
0
                                        return Some(v139);
11735
0
                                    }
11736
                                }
11737
0
                                _ => {}
11738
                            }
11739
63.3k
                        }
11740
63.3k
                        let v4 = C::fits_in_64(ctx, v3);
11741
63.3k
                        if let Some(v5) = v4 {
11742
63.3k
                            let v38 = C::unpack_value_array_2(ctx, v37);
11743
63.3k
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
11744
63.3k
                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
11745
63.3k
                            let v130 = constructor_x64_sub(ctx, v5, v41, v42);
11746
63.3k
                            let v131 = constructor_output_gpr(ctx, v130);
11747
63.3k
                            // Rule at src/isa/x64/lower.isle line 207.
11748
63.3k
                            return Some(v131);
11749
0
                        }
11750
0
                    }
11751
                }
11752
                &Opcode::Imul => {
11753
58.9k
                    let v1 = C::first_result(ctx, arg0);
11754
58.9k
                    if let Some(v2) = v1 {
11755
58.9k
                        let v3 = C::value_type(ctx, v2);
11756
58.9k
                        let v64 = C::multi_lane(ctx, v3);
11757
58.9k
                        if let Some(
v650
) = v64 {
11758
0
                            if v65.0 == 0x40 {
11759
0
                                if v65.1 == 0x2 {
11760
0
                                    let v332 = C::use_avx512vl(ctx);
11761
0
                                    if v332 == true {
11762
0
                                        let v461 = C::use_avx512dq(ctx);
11763
0
                                        if v461 == true {
11764
0
                                            let v38 = C::unpack_value_array_2(ctx, v37);
11765
0
                                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11766
0
                                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11767
0
                                            let v462 = constructor_x64_vpmullq(ctx, v68, v69);
11768
0
                                            let v463 = constructor_output_xmm(ctx, v462);
11769
0
                                            // Rule at src/isa/x64/lower.isle line 1047.
11770
0
                                            return Some(v463);
11771
0
                                        }
11772
0
                                    }
11773
0
                                }
11774
0
                            }
11775
58.9k
                        }
11776
58.9k
                        if v3 == I128 {
11777
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
11778
0
                            let v78 = C::put_in_regs(ctx, v38.0);
11779
0
                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
11780
0
                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
11781
0
                            let v83 = C::put_in_regs(ctx, v38.1);
11782
0
                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
11783
0
                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
11784
0
                            let v425 = &C::gpr_to_gpr_mem_imm(ctx, v85);
11785
0
                            let v426 = constructor_x64_mul(ctx, I64, v80, v425);
11786
0
                            let v427 = &C::gpr_to_gpr_mem_imm(ctx, v84);
11787
0
                            let v428 = constructor_x64_mul(ctx, I64, v82, v427);
11788
0
                            let v429 = &C::gpr_to_gpr_mem_imm(ctx, v428);
11789
0
                            let v430 = constructor_x64_add(ctx, I64, v426, v429);
11790
0
                            let v431 = &C::gpr_to_gpr_mem(ctx, v84);
11791
0
                            let v432 = constructor_mulhi_u(ctx, I64, v80, v431);
11792
0
                            let v433 = constructor_value_regs_get_gpr(ctx, v432, 0x0);
11793
0
                            let v434 = constructor_value_regs_get_gpr(ctx, v432, 0x1);
11794
0
                            let v435 = &C::gpr_to_gpr_mem_imm(ctx, v434);
11795
0
                            let v436 = constructor_x64_add(ctx, I64, v430, v435);
11796
0
                            let v437 = constructor_value_gprs(ctx, v433, v436);
11797
0
                            let v438 = C::output(ctx, v437);
11798
0
                            // Rule at src/isa/x64/lower.isle line 997.
11799
0
                            return Some(v438);
11800
58.9k
                        }
11801
58.9k
                        if let Some(
v650
) = v64 {
11802
0
                            match v65.0 {
11803
                                0x10 => {
11804
0
                                    if v65.1 == 0x8 {
11805
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11806
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11807
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11808
0
                                        let v439 = constructor_x64_pmullw(ctx, v68, v69);
11809
0
                                        let v440 = constructor_output_xmm(ctx, v439);
11810
0
                                        // Rule at src/isa/x64/lower.isle line 1024.
11811
0
                                        return Some(v440);
11812
0
                                    }
11813
                                }
11814
                                0x20 => {
11815
0
                                    if v65.1 == 0x4 {
11816
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
11817
0
                                        let v171 = C::def_inst(ctx, v38.1);
11818
0
                                        if let Some(v172) = v171 {
11819
0
                                            let v173 = &C::inst_data(ctx, v172);
11820
                                            if let &InstructionData::Unary {
11821
0
                                                opcode: ref v174,
11822
0
                                                arg: v175,
11823
0
                                            } = v173 {
11824
0
                                                match v174 {
11825
                                                    &Opcode::SwidenLow => {
11826
0
                                                        let v180 = C::def_inst(ctx, v38.0);
11827
0
                                                        if let Some(v181) = v180 {
11828
0
                                                            let v182 = &C::inst_data(ctx, v181);
11829
                                                            if let &InstructionData::Unary {
11830
0
                                                                opcode: ref v183,
11831
0
                                                                arg: v184,
11832
0
                                                            } = v182 {
11833
0
                                                                if let &Opcode::SwidenLow = v183 {
11834
0
                                                                    let v481 = C::value_type(ctx, v184);
11835
0
                                                                    let v482 = C::multi_lane(ctx, v481);
11836
0
                                                                    if let Some(v483) = v482 {
11837
0
                                                                        if v483.0 == 0x10 {
11838
0
                                                                            if v483.1 == 0x8 {
11839
0
                                                                                let v486 = C::value_type(ctx, v175);
11840
0
                                                                                let v487 = C::multi_lane(ctx, v486);
11841
0
                                                                                if let Some(v488) = v487 {
11842
0
                                                                                    if v488.0 == 0x10 {
11843
0
                                                                                        if v488.1 == 0x8 {
11844
0
                                                                                            let v185 = constructor_put_in_xmm(ctx, v184);
11845
0
                                                                                            let v491 = constructor_put_in_xmm(ctx, v175);
11846
0
                                                                                            let v492 = &C::xmm_to_xmm_mem(ctx, v491);
11847
0
                                                                                            let v493 = constructor_x64_pmullw(ctx, v185, v492);
11848
0
                                                                                            let v494 = &C::xmm_to_xmm_mem(ctx, v491);
11849
0
                                                                                            let v495 = constructor_x64_pmulhw(ctx, v185, v494);
11850
0
                                                                                            let v496 = &C::xmm_to_xmm_mem(ctx, v495);
11851
0
                                                                                            let v507 = constructor_x64_punpcklwd(ctx, v493, v496);
11852
0
                                                                                            let v508 = constructor_output_xmm(ctx, v507);
11853
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1117.
11854
0
                                                                                            return Some(v508);
11855
0
                                                                                        }
11856
0
                                                                                    }
11857
0
                                                                                }
11858
0
                                                                            }
11859
0
                                                                        }
11860
0
                                                                    }
11861
0
                                                                }
11862
0
                                                            }
11863
0
                                                        }
11864
                                                    }
11865
                                                    &Opcode::SwidenHigh => {
11866
0
                                                        let v180 = C::def_inst(ctx, v38.0);
11867
0
                                                        if let Some(v181) = v180 {
11868
0
                                                            let v182 = &C::inst_data(ctx, v181);
11869
                                                            if let &InstructionData::Unary {
11870
0
                                                                opcode: ref v183,
11871
0
                                                                arg: v184,
11872
0
                                                            } = v182 {
11873
0
                                                                if let &Opcode::SwidenHigh = v183 {
11874
0
                                                                    let v481 = C::value_type(ctx, v184);
11875
0
                                                                    let v482 = C::multi_lane(ctx, v481);
11876
0
                                                                    if let Some(v483) = v482 {
11877
0
                                                                        if v483.0 == 0x10 {
11878
0
                                                                            if v483.1 == 0x8 {
11879
0
                                                                                let v486 = C::value_type(ctx, v175);
11880
0
                                                                                let v487 = C::multi_lane(ctx, v486);
11881
0
                                                                                if let Some(v488) = v487 {
11882
0
                                                                                    if v488.0 == 0x10 {
11883
0
                                                                                        if v488.1 == 0x8 {
11884
0
                                                                                            let v185 = constructor_put_in_xmm(ctx, v184);
11885
0
                                                                                            let v491 = constructor_put_in_xmm(ctx, v175);
11886
0
                                                                                            let v492 = &C::xmm_to_xmm_mem(ctx, v491);
11887
0
                                                                                            let v493 = constructor_x64_pmullw(ctx, v185, v492);
11888
0
                                                                                            let v494 = &C::xmm_to_xmm_mem(ctx, v491);
11889
0
                                                                                            let v495 = constructor_x64_pmulhw(ctx, v185, v494);
11890
0
                                                                                            let v496 = &C::xmm_to_xmm_mem(ctx, v495);
11891
0
                                                                                            let v497 = constructor_x64_punpckhwd(ctx, v493, v496);
11892
0
                                                                                            let v498 = constructor_output_xmm(ctx, v497);
11893
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1094.
11894
0
                                                                                            return Some(v498);
11895
0
                                                                                        }
11896
0
                                                                                    }
11897
0
                                                                                }
11898
0
                                                                            }
11899
0
                                                                        }
11900
0
                                                                    }
11901
0
                                                                }
11902
0
                                                            }
11903
0
                                                        }
11904
                                                    }
11905
                                                    &Opcode::UwidenLow => {
11906
0
                                                        let v180 = C::def_inst(ctx, v38.0);
11907
0
                                                        if let Some(v181) = v180 {
11908
0
                                                            let v182 = &C::inst_data(ctx, v181);
11909
                                                            if let &InstructionData::Unary {
11910
0
                                                                opcode: ref v183,
11911
0
                                                                arg: v184,
11912
0
                                                            } = v182 {
11913
0
                                                                if let &Opcode::UwidenLow = v183 {
11914
0
                                                                    let v481 = C::value_type(ctx, v184);
11915
0
                                                                    let v482 = C::multi_lane(ctx, v481);
11916
0
                                                                    if let Some(v483) = v482 {
11917
0
                                                                        if v483.0 == 0x10 {
11918
0
                                                                            if v483.1 == 0x8 {
11919
0
                                                                                let v486 = C::value_type(ctx, v175);
11920
0
                                                                                let v487 = C::multi_lane(ctx, v486);
11921
0
                                                                                if let Some(v488) = v487 {
11922
0
                                                                                    if v488.0 == 0x10 {
11923
0
                                                                                        if v488.1 == 0x8 {
11924
0
                                                                                            let v185 = constructor_put_in_xmm(ctx, v184);
11925
0
                                                                                            let v491 = constructor_put_in_xmm(ctx, v175);
11926
0
                                                                                            let v492 = &C::xmm_to_xmm_mem(ctx, v491);
11927
0
                                                                                            let v493 = constructor_x64_pmullw(ctx, v185, v492);
11928
0
                                                                                            let v494 = &C::xmm_to_xmm_mem(ctx, v491);
11929
0
                                                                                            let v515 = constructor_x64_pmulhuw(ctx, v185, v494);
11930
0
                                                                                            let v516 = &C::xmm_to_xmm_mem(ctx, v515);
11931
0
                                                                                            let v521 = constructor_x64_punpcklwd(ctx, v493, v516);
11932
0
                                                                                            let v522 = constructor_output_xmm(ctx, v521);
11933
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1162.
11934
0
                                                                                            return Some(v522);
11935
0
                                                                                        }
11936
0
                                                                                    }
11937
0
                                                                                }
11938
0
                                                                            }
11939
0
                                                                        }
11940
0
                                                                    }
11941
0
                                                                }
11942
0
                                                            }
11943
0
                                                        }
11944
                                                    }
11945
                                                    &Opcode::UwidenHigh => {
11946
0
                                                        let v180 = C::def_inst(ctx, v38.0);
11947
0
                                                        if let Some(v181) = v180 {
11948
0
                                                            let v182 = &C::inst_data(ctx, v181);
11949
                                                            if let &InstructionData::Unary {
11950
0
                                                                opcode: ref v183,
11951
0
                                                                arg: v184,
11952
0
                                                            } = v182 {
11953
0
                                                                if let &Opcode::UwidenHigh = v183 {
11954
0
                                                                    let v481 = C::value_type(ctx, v184);
11955
0
                                                                    let v482 = C::multi_lane(ctx, v481);
11956
0
                                                                    if let Some(v483) = v482 {
11957
0
                                                                        if v483.0 == 0x10 {
11958
0
                                                                            if v483.1 == 0x8 {
11959
0
                                                                                let v486 = C::value_type(ctx, v175);
11960
0
                                                                                let v487 = C::multi_lane(ctx, v486);
11961
0
                                                                                if let Some(v488) = v487 {
11962
0
                                                                                    if v488.0 == 0x10 {
11963
0
                                                                                        if v488.1 == 0x8 {
11964
0
                                                                                            let v185 = constructor_put_in_xmm(ctx, v184);
11965
0
                                                                                            let v491 = constructor_put_in_xmm(ctx, v175);
11966
0
                                                                                            let v492 = &C::xmm_to_xmm_mem(ctx, v491);
11967
0
                                                                                            let v493 = constructor_x64_pmullw(ctx, v185, v492);
11968
0
                                                                                            let v494 = &C::xmm_to_xmm_mem(ctx, v491);
11969
0
                                                                                            let v515 = constructor_x64_pmulhuw(ctx, v185, v494);
11970
0
                                                                                            let v516 = &C::xmm_to_xmm_mem(ctx, v515);
11971
0
                                                                                            let v517 = constructor_x64_punpckhwd(ctx, v493, v516);
11972
0
                                                                                            let v518 = constructor_output_xmm(ctx, v517);
11973
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1140.
11974
0
                                                                                            return Some(v518);
11975
0
                                                                                        }
11976
0
                                                                                    }
11977
0
                                                                                }
11978
0
                                                                            }
11979
0
                                                                        }
11980
0
                                                                    }
11981
0
                                                                }
11982
0
                                                            }
11983
0
                                                        }
11984
                                                    }
11985
0
                                                    _ => {}
11986
                                                }
11987
0
                                            }
11988
0
                                        }
11989
0
                                        let v441 = C::use_sse41(ctx);
11990
0
                                        if v441 == true {
11991
0
                                            let v68 = constructor_put_in_xmm(ctx, v38.0);
11992
0
                                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
11993
0
                                            let v442 = constructor_x64_pmulld(ctx, v68, v69);
11994
0
                                            let v443 = constructor_output_xmm(ctx, v442);
11995
0
                                            // Rule at src/isa/x64/lower.isle line 1027.
11996
0
                                            return Some(v443);
11997
0
                                        }
11998
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
11999
0
                                        let v444 = constructor_put_in_xmm(ctx, v38.1);
12000
0
                                        let v316 = &C::xmm_to_xmm_mem(ctx, v68);
12001
0
                                        let v446 = constructor_x64_pshufd(ctx, v316, 0x31);
12002
0
                                        let v447 = &C::xmm_to_xmm_mem(ctx, v444);
12003
0
                                        let v448 = constructor_x64_pshufd(ctx, v447, 0x31);
12004
0
                                        let v449 = &C::xmm_to_xmm_mem(ctx, v444);
12005
0
                                        let v450 = constructor_x64_pmuludq(ctx, v68, v449);
12006
0
                                        let v451 = &C::xmm_to_xmm_mem(ctx, v450);
12007
0
                                        let v453 = constructor_x64_pshufd(ctx, v451, 0x8);
12008
0
                                        let v454 = &C::xmm_to_xmm_mem(ctx, v448);
12009
0
                                        let v455 = constructor_x64_pmuludq(ctx, v446, v454);
12010
0
                                        let v456 = &C::xmm_to_xmm_mem(ctx, v455);
12011
0
                                        let v457 = constructor_x64_pshufd(ctx, v456, 0x8);
12012
0
                                        let v458 = &C::xmm_to_xmm_mem(ctx, v457);
12013
0
                                        let v459 = constructor_x64_punpckldq(ctx, v453, v458);
12014
0
                                        let v460 = constructor_output_xmm(ctx, v459);
12015
0
                                        // Rule at src/isa/x64/lower.isle line 1034.
12016
0
                                        return Some(v460);
12017
0
                                    }
12018
                                }
12019
                                0x40 => {
12020
0
                                    if v65.1 == 0x2 {
12021
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
12022
0
                                        let v171 = C::def_inst(ctx, v38.1);
12023
0
                                        if let Some(v172) = v171 {
12024
0
                                            let v173 = &C::inst_data(ctx, v172);
12025
                                            if let &InstructionData::Unary {
12026
0
                                                opcode: ref v174,
12027
0
                                                arg: v175,
12028
0
                                            } = v173 {
12029
0
                                                match v174 {
12030
                                                    &Opcode::SwidenLow => {
12031
0
                                                        let v180 = C::def_inst(ctx, v38.0);
12032
0
                                                        if let Some(v181) = v180 {
12033
0
                                                            let v182 = &C::inst_data(ctx, v181);
12034
                                                            if let &InstructionData::Unary {
12035
0
                                                                opcode: ref v183,
12036
0
                                                                arg: v184,
12037
0
                                                            } = v182 {
12038
0
                                                                if let &Opcode::SwidenLow = v183 {
12039
0
                                                                    let v441 = C::use_sse41(ctx);
12040
0
                                                                    if v441 == true {
12041
0
                                                                        let v481 = C::value_type(ctx, v184);
12042
0
                                                                        let v482 = C::multi_lane(ctx, v481);
12043
0
                                                                        if let Some(v483) = v482 {
12044
0
                                                                            if v483.0 == 0x20 {
12045
0
                                                                                if v483.1 == 0x4 {
12046
0
                                                                                    let v486 = C::value_type(ctx, v175);
12047
0
                                                                                    let v487 = C::multi_lane(ctx, v486);
12048
0
                                                                                    if let Some(v488) = v487 {
12049
0
                                                                                        if v488.0 == 0x20 {
12050
0
                                                                                            if v488.1 == 0x4 {
12051
0
                                                                                                let v499 = &C::put_in_xmm_mem(ctx, v184);
12052
0
                                                                                                let v510 = constructor_x64_pshufd(ctx, v499, 0x50);
12053
0
                                                                                                let v502 = &C::put_in_xmm_mem(ctx, v175);
12054
0
                                                                                                let v511 = constructor_x64_pshufd(ctx, v502, 0x50);
12055
0
                                                                                                let v512 = &C::xmm_to_xmm_mem(ctx, v511);
12056
0
                                                                                                let v513 = constructor_x64_pmuldq(ctx, v510, v512);
12057
0
                                                                                                let v514 = constructor_output_xmm(ctx, v513);
12058
0
                                                                                                // Rule at src/isa/x64/lower.isle line 1129.
12059
0
                                                                                                return Some(v514);
12060
0
                                                                                            }
12061
0
                                                                                        }
12062
0
                                                                                    }
12063
0
                                                                                }
12064
0
                                                                            }
12065
0
                                                                        }
12066
0
                                                                    }
12067
0
                                                                }
12068
0
                                                            }
12069
0
                                                        }
12070
                                                    }
12071
                                                    &Opcode::SwidenHigh => {
12072
0
                                                        let v180 = C::def_inst(ctx, v38.0);
12073
0
                                                        if let Some(v181) = v180 {
12074
0
                                                            let v182 = &C::inst_data(ctx, v181);
12075
                                                            if let &InstructionData::Unary {
12076
0
                                                                opcode: ref v183,
12077
0
                                                                arg: v184,
12078
0
                                                            } = v182 {
12079
0
                                                                if let &Opcode::SwidenHigh = v183 {
12080
0
                                                                    let v441 = C::use_sse41(ctx);
12081
0
                                                                    if v441 == true {
12082
0
                                                                        let v481 = C::value_type(ctx, v184);
12083
0
                                                                        let v482 = C::multi_lane(ctx, v481);
12084
0
                                                                        if let Some(v483) = v482 {
12085
0
                                                                            if v483.0 == 0x20 {
12086
0
                                                                                if v483.1 == 0x4 {
12087
0
                                                                                    let v486 = C::value_type(ctx, v175);
12088
0
                                                                                    let v487 = C::multi_lane(ctx, v486);
12089
0
                                                                                    if let Some(v488) = v487 {
12090
0
                                                                                        if v488.0 == 0x20 {
12091
0
                                                                                            if v488.1 == 0x4 {
12092
0
                                                                                                let v499 = &C::put_in_xmm_mem(ctx, v184);
12093
0
                                                                                                let v501 = constructor_x64_pshufd(ctx, v499, 0xFA);
12094
0
                                                                                                let v502 = &C::put_in_xmm_mem(ctx, v175);
12095
0
                                                                                                let v503 = constructor_x64_pshufd(ctx, v502, 0xFA);
12096
0
                                                                                                let v504 = &C::xmm_to_xmm_mem(ctx, v503);
12097
0
                                                                                                let v505 = constructor_x64_pmuldq(ctx, v501, v504);
12098
0
                                                                                                let v506 = constructor_output_xmm(ctx, v505);
12099
0
                                                                                                // Rule at src/isa/x64/lower.isle line 1106.
12100
0
                                                                                                return Some(v506);
12101
0
                                                                                            }
12102
0
                                                                                        }
12103
0
                                                                                    }
12104
0
                                                                                }
12105
0
                                                                            }
12106
0
                                                                        }
12107
0
                                                                    }
12108
0
                                                                }
12109
0
                                                            }
12110
0
                                                        }
12111
                                                    }
12112
                                                    &Opcode::UwidenLow => {
12113
0
                                                        let v180 = C::def_inst(ctx, v38.0);
12114
0
                                                        if let Some(v181) = v180 {
12115
0
                                                            let v182 = &C::inst_data(ctx, v181);
12116
                                                            if let &InstructionData::Unary {
12117
0
                                                                opcode: ref v183,
12118
0
                                                                arg: v184,
12119
0
                                                            } = v182 {
12120
0
                                                                if let &Opcode::UwidenLow = v183 {
12121
0
                                                                    let v481 = C::value_type(ctx, v184);
12122
0
                                                                    let v482 = C::multi_lane(ctx, v481);
12123
0
                                                                    if let Some(v483) = v482 {
12124
0
                                                                        if v483.0 == 0x20 {
12125
0
                                                                            if v483.1 == 0x4 {
12126
0
                                                                                let v486 = C::value_type(ctx, v175);
12127
0
                                                                                let v487 = C::multi_lane(ctx, v486);
12128
0
                                                                                if let Some(v488) = v487 {
12129
0
                                                                                    if v488.0 == 0x20 {
12130
0
                                                                                        if v488.1 == 0x4 {
12131
0
                                                                                            let v499 = &C::put_in_xmm_mem(ctx, v184);
12132
0
                                                                                            let v510 = constructor_x64_pshufd(ctx, v499, 0x50);
12133
0
                                                                                            let v502 = &C::put_in_xmm_mem(ctx, v175);
12134
0
                                                                                            let v511 = constructor_x64_pshufd(ctx, v502, 0x50);
12135
0
                                                                                            let v512 = &C::xmm_to_xmm_mem(ctx, v511);
12136
0
                                                                                            let v523 = constructor_x64_pmuludq(ctx, v510, v512);
12137
0
                                                                                            let v524 = constructor_output_xmm(ctx, v523);
12138
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1174.
12139
0
                                                                                            return Some(v524);
12140
0
                                                                                        }
12141
0
                                                                                    }
12142
0
                                                                                }
12143
0
                                                                            }
12144
0
                                                                        }
12145
0
                                                                    }
12146
0
                                                                }
12147
0
                                                            }
12148
0
                                                        }
12149
                                                    }
12150
                                                    &Opcode::UwidenHigh => {
12151
0
                                                        let v180 = C::def_inst(ctx, v38.0);
12152
0
                                                        if let Some(v181) = v180 {
12153
0
                                                            let v182 = &C::inst_data(ctx, v181);
12154
                                                            if let &InstructionData::Unary {
12155
0
                                                                opcode: ref v183,
12156
0
                                                                arg: v184,
12157
0
                                                            } = v182 {
12158
0
                                                                if let &Opcode::UwidenHigh = v183 {
12159
0
                                                                    let v481 = C::value_type(ctx, v184);
12160
0
                                                                    let v482 = C::multi_lane(ctx, v481);
12161
0
                                                                    if let Some(v483) = v482 {
12162
0
                                                                        if v483.0 == 0x20 {
12163
0
                                                                            if v483.1 == 0x4 {
12164
0
                                                                                let v486 = C::value_type(ctx, v175);
12165
0
                                                                                let v487 = C::multi_lane(ctx, v486);
12166
0
                                                                                if let Some(v488) = v487 {
12167
0
                                                                                    if v488.0 == 0x20 {
12168
0
                                                                                        if v488.1 == 0x4 {
12169
0
                                                                                            let v499 = &C::put_in_xmm_mem(ctx, v184);
12170
0
                                                                                            let v501 = constructor_x64_pshufd(ctx, v499, 0xFA);
12171
0
                                                                                            let v502 = &C::put_in_xmm_mem(ctx, v175);
12172
0
                                                                                            let v503 = constructor_x64_pshufd(ctx, v502, 0xFA);
12173
0
                                                                                            let v504 = &C::xmm_to_xmm_mem(ctx, v503);
12174
0
                                                                                            let v519 = constructor_x64_pmuludq(ctx, v501, v504);
12175
0
                                                                                            let v520 = constructor_output_xmm(ctx, v519);
12176
0
                                                                                            // Rule at src/isa/x64/lower.isle line 1152.
12177
0
                                                                                            return Some(v520);
12178
0
                                                                                        }
12179
0
                                                                                    }
12180
0
                                                                                }
12181
0
                                                                            }
12182
0
                                                                        }
12183
0
                                                                    }
12184
0
                                                                }
12185
0
                                                            }
12186
0
                                                        }
12187
                                                    }
12188
0
                                                    _ => {}
12189
                                                }
12190
0
                                            }
12191
0
                                        }
12192
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
12193
0
                                        let v444 = constructor_put_in_xmm(ctx, v38.1);
12194
0
                                        let v465 = &C::xmi_imm(ctx, 0x20);
12195
0
                                        let v466 = constructor_x64_psrlq(ctx, v68, v465);
12196
0
                                        let v447 = &C::xmm_to_xmm_mem(ctx, v444);
12197
0
                                        let v467 = constructor_x64_pmuludq(ctx, v466, v447);
12198
0
                                        let v468 = &C::xmi_imm(ctx, 0x20);
12199
0
                                        let v469 = constructor_x64_psrlq(ctx, v444, v468);
12200
0
                                        let v470 = &C::xmm_to_xmm_mem(ctx, v469);
12201
0
                                        let v471 = constructor_x64_pmuludq(ctx, v68, v470);
12202
0
                                        let v472 = &C::xmm_to_xmm_mem(ctx, v471);
12203
0
                                        let v473 = constructor_x64_paddq(ctx, v467, v472);
12204
0
                                        let v474 = &C::xmi_imm(ctx, 0x20);
12205
0
                                        let v475 = constructor_x64_psllq(ctx, v473, v474);
12206
0
                                        let v476 = &C::xmm_to_xmm_mem(ctx, v444);
12207
0
                                        let v477 = constructor_x64_pmuludq(ctx, v68, v476);
12208
0
                                        let v478 = &C::xmm_to_xmm_mem(ctx, v475);
12209
0
                                        let v479 = constructor_x64_paddq(ctx, v477, v478);
12210
0
                                        let v480 = constructor_output_xmm(ctx, v479);
12211
0
                                        // Rule at src/isa/x64/lower.isle line 1072.
12212
0
                                        return Some(v480);
12213
0
                                    }
12214
                                }
12215
0
                                _ => {}
12216
                            }
12217
58.9k
                        }
12218
58.9k
                        let v4 = C::fits_in_64(ctx, v3);
12219
58.9k
                        if let Some(v5) = v4 {
12220
58.9k
                            let v38 = C::unpack_value_array_2(ctx, v37);
12221
58.9k
                            let v58 = &C::sinkable_load(ctx, v38.0);
12222
58.9k
                            if let Some(
v59168
) = v58 {
12223
168
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12224
168
                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
12225
168
                                let v423 = constructor_x64_mul(ctx, v5, v60, v61);
12226
168
                                let v424 = constructor_output_gpr(ctx, v423);
12227
168
                                // Rule at src/isa/x64/lower.isle line 978.
12228
168
                                return Some(v424);
12229
58.7k
                            }
12230
58.7k
                            let v158 = &C::simm32_from_value(ctx, v38.0);
12231
58.7k
                            if let Some(
v1590
) = v158 {
12232
0
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12233
0
                                let v421 = constructor_x64_mul(ctx, v5, v60, v159);
12234
0
                                let v422 = constructor_output_gpr(ctx, v421);
12235
0
                                // Rule at src/isa/x64/lower.isle line 975.
12236
0
                                return Some(v422);
12237
58.7k
                            }
12238
58.7k
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
12239
58.7k
                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12240
58.7k
                            let v419 = constructor_x64_mul(ctx, v5, v41, v42);
12241
58.7k
                            let v420 = constructor_output_gpr(ctx, v419);
12242
58.7k
                            // Rule at src/isa/x64/lower.isle line 969.
12243
58.7k
                            return Some(v420);
12244
0
                        }
12245
0
                    }
12246
                }
12247
                &Opcode::Umulhi => {
12248
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12249
0
                    let v2093 = C::value_type(ctx, v38.0);
12250
0
                    if v2093 == I8 {
12251
0
                        let v2233 = constructor_extend_to_gpr(ctx, v38.0, I16, &ExtendKind::Zero);
12252
0
                        let v2234 = constructor_extend_to_gpr(ctx, v38.1, I16, &ExtendKind::Zero);
12253
0
                        let v2235 = &C::gpr_to_gpr_mem_imm(ctx, v2234);
12254
0
                        let v2236 = constructor_x64_mul(ctx, I16, v2233, v2235);
12255
0
                        let v2237 = &C::imm8_to_imm8_gpr(ctx, 0x8);
12256
0
                        let v2238 = constructor_x64_shr(ctx, I64, v2236, v2237);
12257
0
                        let v2239 = constructor_output_gpr(ctx, v2238);
12258
0
                        // Rule at src/isa/x64/lower.isle line 4164.
12259
0
                        return Some(v2239);
12260
0
                    }
12261
0
                    let v41 = constructor_put_in_gpr(ctx, v38.0);
12262
0
                    let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
12263
0
                    let v2240 = constructor_mul_hi(ctx, v2093, false, v41, v109);
12264
0
                    let v2241 = constructor_value_regs_get_gpr(ctx, v2240, 0x1);
12265
0
                    let v2242 = constructor_output_gpr(ctx, v2241);
12266
0
                    // Rule at src/isa/x64/lower.isle line 4171.
12267
0
                    return Some(v2242);
12268
                }
12269
                &Opcode::Smulhi => {
12270
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12271
0
                    let v2093 = C::value_type(ctx, v38.0);
12272
0
                    if v2093 == I8 {
12273
0
                        let v2243 = constructor_extend_to_gpr(ctx, v38.0, I16, &ExtendKind::Sign);
12274
0
                        let v2244 = constructor_extend_to_gpr(ctx, v38.1, I16, &ExtendKind::Sign);
12275
0
                        let v2245 = &C::gpr_to_gpr_mem_imm(ctx, v2244);
12276
0
                        let v2246 = constructor_x64_mul(ctx, I16, v2243, v2245);
12277
0
                        let v2237 = &C::imm8_to_imm8_gpr(ctx, 0x8);
12278
0
                        let v2247 = constructor_x64_sar(ctx, I64, v2246, v2237);
12279
0
                        let v2248 = constructor_output_gpr(ctx, v2247);
12280
0
                        // Rule at src/isa/x64/lower.isle line 4180.
12281
0
                        return Some(v2248);
12282
0
                    }
12283
0
                    let v41 = constructor_put_in_gpr(ctx, v38.0);
12284
0
                    let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
12285
0
                    let v2249 = constructor_mul_hi(ctx, v2093, true, v41, v109);
12286
0
                    let v2250 = constructor_value_regs_get_gpr(ctx, v2249, 0x1);
12287
0
                    let v2251 = constructor_output_gpr(ctx, v2250);
12288
0
                    // Rule at src/isa/x64/lower.isle line 4187.
12289
0
                    return Some(v2251);
12290
                }
12291
                &Opcode::SqmulRoundSat => {
12292
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12293
0
                    let v2093 = C::value_type(ctx, v38.0);
12294
0
                    if v2093 == I16X8 {
12295
0
                        let v525 = C::use_ssse3(ctx);
12296
0
                        if v525 == true {
12297
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12298
0
                            let v444 = constructor_put_in_xmm(ctx, v38.1);
12299
0
                            let v2558 = C::emit_u128_le_const(ctx, 0x80008000800080008000800080008000);
12300
0
                            let v2559 = &constructor_const_to_xmm_mem(ctx, v2558);
12301
0
                            let v447 = &C::xmm_to_xmm_mem(ctx, v444);
12302
0
                            let v2560 = constructor_x64_pmulhrsw(ctx, v68, v447);
12303
0
                            let v2561 = constructor_x64_pcmpeqw(ctx, v2560, v2559);
12304
0
                            let v2562 = &C::xmm_to_xmm_mem(ctx, v2561);
12305
0
                            let v2563 = constructor_x64_pxor(ctx, v2560, v2562);
12306
0
                            let v2564 = constructor_output_xmm(ctx, v2563);
12307
0
                            // Rule at src/isa/x64/lower.isle line 4653.
12308
0
                            return Some(v2564);
12309
0
                        }
12310
0
                        let v68 = constructor_put_in_xmm(ctx, v38.0);
12311
0
                        let v444 = constructor_put_in_xmm(ctx, v38.1);
12312
0
                        let v1976 = &C::xmm_to_xmm_mem(ctx, v444);
12313
0
                        let v2565 = constructor_x64_pmullw(ctx, v68, v1976);
12314
0
                        let v447 = &C::xmm_to_xmm_mem(ctx, v444);
12315
0
                        let v2566 = constructor_x64_pmulhw(ctx, v68, v447);
12316
0
                        let v2567 = &C::xmm_to_xmm_mem(ctx, v2566);
12317
0
                        let v2568 = constructor_x64_punpcklwd(ctx, v2565, v2567);
12318
0
                        let v2569 = &C::xmm_to_xmm_mem(ctx, v2566);
12319
0
                        let v2570 = constructor_x64_punpckhwd(ctx, v2565, v2569);
12320
0
                        let v2572 = C::emit_u128_le_const(ctx, 0x4000000040000000400000004000);
12321
0
                        let v2573 = &constructor_const_to_xmm_mem(ctx, v2572);
12322
0
                        let v2574 = constructor_x64_movdqu_load(ctx, v2573);
12323
0
                        let v2575 = &C::xmm_to_xmm_mem(ctx, v2574);
12324
0
                        let v2576 = constructor_x64_paddd(ctx, v2568, v2575);
12325
0
                        let v2577 = &C::xmm_to_xmm_mem(ctx, v2574);
12326
0
                        let v2578 = constructor_x64_paddd(ctx, v2570, v2577);
12327
0
                        let v2580 = &C::xmi_imm(ctx, 0xF);
12328
0
                        let v2581 = constructor_x64_psrad(ctx, v2576, v2580);
12329
0
                        let v2582 = &C::xmi_imm(ctx, 0xF);
12330
0
                        let v2583 = constructor_x64_psrad(ctx, v2578, v2582);
12331
0
                        let v2584 = &C::xmm_to_xmm_mem(ctx, v2583);
12332
0
                        let v2585 = constructor_x64_packssdw(ctx, v2581, v2584);
12333
0
                        let v2586 = constructor_output_xmm(ctx, v2585);
12334
0
                        // Rule at src/isa/x64/lower.isle line 4669.
12335
0
                        return Some(v2586);
12336
0
                    }
12337
                }
12338
                &Opcode::X86Pmulhrsw => {
12339
0
                    let v525 = C::use_ssse3(ctx);
12340
0
                    if v525 == true {
12341
0
                        let v38 = C::unpack_value_array_2(ctx, v37);
12342
0
                        let v2093 = C::value_type(ctx, v38.0);
12343
0
                        if v2093 == I16X8 {
12344
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12345
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12346
0
                            let v2587 = constructor_x64_pmulhrsw(ctx, v68, v69);
12347
0
                            let v2588 = constructor_output_xmm(ctx, v2587);
12348
0
                            // Rule at src/isa/x64/lower.isle line 4695.
12349
0
                            return Some(v2588);
12350
0
                        }
12351
0
                    }
12352
                }
12353
                &Opcode::Udiv => {
12354
3.08k
                    let v38 = C::unpack_value_array_2(ctx, v37);
12355
3.08k
                    let v2093 = C::value_type(ctx, v38.0);
12356
3.08k
                    if v2093 == I8 {
12357
0
                        let v2177 = constructor_extend_to_gpr(ctx, v38.0, I32, &ExtendKind::Zero);
12358
0
                        let v356 = constructor_put_in_gpr(ctx, v38.1);
12359
0
                        let v2178 = &C::gpr_to_gpr_mem(ctx, v356);
12360
0
                        let v2181 = constructor_x64_div8(ctx, v2177, v2178, &DivSignedness::Unsigned, &TrapCode::IntegerDivisionByZero);
12361
0
                        let v2182 = constructor_output_gpr(ctx, v2181);
12362
0
                        // Rule at src/isa/x64/lower.isle line 4041.
12363
0
                        return Some(v2182);
12364
3.08k
                    }
12365
3.08k
                    let v2183 = C::fits_in_64(ctx, v2093);
12366
3.08k
                    if let Some(v2184) = v2183 {
12367
3.08k
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12368
3.08k
                        let v15 = constructor_imm(ctx, I64, 0x0);
12369
3.08k
                        let v2185 = C::gpr_new(ctx, v15);
12370
3.08k
                        let v2186 = constructor_put_in_gpr(ctx, v38.1);
12371
3.08k
                        let v2187 = &C::gpr_to_gpr_mem(ctx, v2186);
12372
3.08k
                        let v2188 = &C::raw_operand_size_of_type(ctx, v2184);
12373
3.08k
                        let v2189 = constructor_x64_div_quotient(ctx, v41, v2185, v2187, v2188, &DivSignedness::Unsigned, &TrapCode::IntegerDivisionByZero);
12374
3.08k
                        let v2190 = C::output(ctx, v2189);
12375
3.08k
                        // Rule at src/isa/x64/lower.isle line 4050.
12376
3.08k
                        return Some(v2190);
12377
0
                    }
12378
                }
12379
                &Opcode::Sdiv => {
12380
454
                    let v38 = C::unpack_value_array_2(ctx, v37);
12381
454
                    let v2093 = C::value_type(ctx, v38.0);
12382
454
                    if v2093 == I8 {
12383
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12384
0
                        let v2192 = constructor_x64_sign_extend_data(ctx, v41, &OperandSize::Size8);
12385
0
                        let v2193 = constructor_nonzero_sdiv_divisor(ctx, I8, v38.1);
12386
0
                        let v2194 = &C::reg_to_gpr_mem(ctx, v2193);
12387
0
                        let v2197 = constructor_x64_div8(ctx, v2192, v2194, &DivSignedness::Signed, &TrapCode::IntegerOverflow);
12388
0
                        let v2198 = constructor_output_gpr(ctx, v2197);
12389
0
                        // Rule at src/isa/x64/lower.isle line 4060.
12390
0
                        return Some(v2198);
12391
454
                    }
12392
454
                    let v2183 = C::fits_in_64(ctx, v2093);
12393
454
                    if let Some(v2184) = v2183 {
12394
454
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12395
454
                        let v2199 = &C::raw_operand_size_of_type(ctx, v2184);
12396
454
                        let v2200 = constructor_x64_sign_extend_data(ctx, v41, v2199);
12397
454
                        let v2201 = constructor_nonzero_sdiv_divisor(ctx, v2184, v38.1);
12398
454
                        let v2202 = &C::reg_to_gpr_mem(ctx, v2201);
12399
454
                        let v2203 = constructor_x64_div_quotient(ctx, v41, v2200, v2202, v2199, &DivSignedness::Signed, &TrapCode::IntegerOverflow);
12400
454
                        let v2204 = C::output(ctx, v2203);
12401
454
                        // Rule at src/isa/x64/lower.isle line 4066.
12402
454
                        return Some(v2204);
12403
0
                    }
12404
                }
12405
                &Opcode::Urem => {
12406
708
                    let v38 = C::unpack_value_array_2(ctx, v37);
12407
708
                    let v2093 = C::value_type(ctx, v38.0);
12408
708
                    if v2093 == I8 {
12409
0
                        let v2177 = constructor_extend_to_gpr(ctx, v38.0, I32, &ExtendKind::Zero);
12410
0
                        let v356 = constructor_put_in_gpr(ctx, v38.1);
12411
0
                        let v2178 = &C::gpr_to_gpr_mem(ctx, v356);
12412
0
                        let v2181 = constructor_x64_div8(ctx, v2177, v2178, &DivSignedness::Unsigned, &TrapCode::IntegerDivisionByZero);
12413
0
                        let v1216 = Imm8Reg::Imm8 {
12414
0
                            imm: 0x8,
12415
0
                        };
12416
0
                        let v2205 = &C::imm8_reg_to_imm8_gpr(ctx, &v1216);
12417
0
                        let v2206 = constructor_x64_shr(ctx, I64, v2181, v2205);
12418
0
                        let v2207 = constructor_output_gpr(ctx, v2206);
12419
0
                        // Rule at src/isa/x64/lower.isle line 4099.
12420
0
                        return Some(v2207);
12421
708
                    }
12422
708
                    let v2183 = C::fits_in_64(ctx, v2093);
12423
708
                    if let Some(v2184) = v2183 {
12424
708
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12425
708
                        let v15 = constructor_imm(ctx, I64, 0x0);
12426
708
                        let v2185 = C::gpr_new(ctx, v15);
12427
708
                        let v2186 = constructor_put_in_gpr(ctx, v38.1);
12428
708
                        let v2187 = &C::gpr_to_gpr_mem(ctx, v2186);
12429
708
                        let v2188 = &C::raw_operand_size_of_type(ctx, v2184);
12430
708
                        let v2208 = constructor_x64_div_remainder(ctx, v41, v2185, v2187, v2188, &DivSignedness::Unsigned, &TrapCode::IntegerDivisionByZero);
12431
708
                        let v2209 = C::output(ctx, v2208);
12432
708
                        // Rule at src/isa/x64/lower.isle line 4108.
12433
708
                        return Some(v2209);
12434
0
                    }
12435
                }
12436
                &Opcode::Srem => {
12437
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12438
0
                    let v171 = C::def_inst(ctx, v38.1);
12439
0
                    if let Some(v172) = v171 {
12440
0
                        let v173 = &C::inst_data(ctx, v172);
12441
                        if let &InstructionData::UnaryImm {
12442
0
                            opcode: ref v330,
12443
0
                            imm: v331,
12444
0
                        } = v173 {
12445
0
                            if let &Opcode::Iconst = v330 {
12446
0
                                let v2093 = C::value_type(ctx, v38.0);
12447
0
                                if v2093 == I8 {
12448
0
                                    let v2210 = C::safe_divisor_from_imm64(ctx, I8, v331);
12449
0
                                    if let Some(v2211) = v2210 {
12450
0
                                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12451
0
                                        let v2192 = constructor_x64_sign_extend_data(ctx, v41, &OperandSize::Size8);
12452
0
                                        let v2212 = constructor_imm(ctx, I8, v2211);
12453
0
                                        let v2213 = &C::reg_to_gpr_mem(ctx, v2212);
12454
0
                                        let v2214 = constructor_x64_div8(ctx, v2192, v2213, &DivSignedness::Signed, &TrapCode::IntegerDivisionByZero);
12455
0
                                        let v1216 = Imm8Reg::Imm8 {
12456
0
                                            imm: 0x8,
12457
0
                                        };
12458
0
                                        let v2215 = &C::imm8_reg_to_imm8_gpr(ctx, &v1216);
12459
0
                                        let v2216 = constructor_x64_shr(ctx, I64, v2214, v2215);
12460
0
                                        let v2217 = constructor_output_gpr(ctx, v2216);
12461
0
                                        // Rule at src/isa/x64/lower.isle line 4123.
12462
0
                                        return Some(v2217);
12463
0
                                    }
12464
0
                                }
12465
0
                                let v2218 = C::safe_divisor_from_imm64(ctx, v2093, v331);
12466
0
                                if let Some(v2219) = v2218 {
12467
0
                                    let v41 = constructor_put_in_gpr(ctx, v38.0);
12468
0
                                    let v2220 = &C::raw_operand_size_of_type(ctx, v2093);
12469
0
                                    let v2221 = constructor_x64_sign_extend_data(ctx, v41, v2220);
12470
0
                                    let v2222 = constructor_imm(ctx, v2093, v2219);
12471
0
                                    let v2223 = &C::reg_to_gpr_mem(ctx, v2222);
12472
0
                                    let v2224 = constructor_x64_div_remainder(ctx, v41, v2221, v2223, v2220, &DivSignedness::Signed, &TrapCode::IntegerDivisionByZero);
12473
0
                                    let v2225 = C::output(ctx, v2224);
12474
0
                                    // Rule at src/isa/x64/lower.isle line 4132.
12475
0
                                    return Some(v2225);
12476
0
                                }
12477
0
                            }
12478
0
                        }
12479
0
                    }
12480
0
                    let v2093 = C::value_type(ctx, v38.0);
12481
0
                    if v2093 == I8 {
12482
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12483
0
                        let v2192 = constructor_x64_sign_extend_data(ctx, v41, &OperandSize::Size8);
12484
0
                        let v2226 = constructor_put_in_gpr(ctx, v38.1);
12485
0
                        let v2227 = constructor_x64_checked_srem_seq8(ctx, v2192, v2226);
12486
0
                        let v1216 = Imm8Reg::Imm8 {
12487
0
                            imm: 0x8,
12488
0
                        };
12489
0
                        let v2205 = &C::imm8_reg_to_imm8_gpr(ctx, &v1216);
12490
0
                        let v2228 = constructor_x64_shr(ctx, I64, v2227, v2205);
12491
0
                        let v2229 = constructor_output_gpr(ctx, v2228);
12492
0
                        // Rule at src/isa/x64/lower.isle line 4145.
12493
0
                        return Some(v2229);
12494
0
                    }
12495
0
                    let v41 = constructor_put_in_gpr(ctx, v38.0);
12496
0
                    let v2220 = &C::raw_operand_size_of_type(ctx, v2093);
12497
0
                    let v2221 = constructor_x64_sign_extend_data(ctx, v41, v2220);
12498
0
                    let v2186 = constructor_put_in_gpr(ctx, v38.1);
12499
0
                    let v2230 = constructor_x64_checked_srem_seq(ctx, v2220, v41, v2221, v2186);
12500
0
                    let v2231 = C::value_regs_get(ctx, v2230, 0x1);
12501
0
                    let v2232 = constructor_output_reg(ctx, v2231);
12502
0
                    // Rule at src/isa/x64/lower.isle line 4151.
12503
0
                    return Some(v2232);
12504
                }
12505
                &Opcode::UaddOverflow => {
12506
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12507
0
                    let v92 = C::value_type(ctx, v38.1);
12508
0
                    let v93 = C::fits_in_64(ctx, v92);
12509
0
                    if let Some(v94) = v93 {
12510
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12511
0
                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12512
0
                        let v97 = constructor_construct_overflow_op_alu(ctx, v94, &CC::B, &AluRmiROpcode::Add, v41, v42);
12513
0
                        // Rule at src/isa/x64/lower.isle line 137.
12514
0
                        return Some(v97);
12515
0
                    }
12516
0
                    if v92 == I128 {
12517
0
                        let v99 = constructor_construct_overflow_op_alu_128(ctx, &CC::B, &AluRmiROpcode::Add, &AluRmiROpcode::Adc, v38.0, v38.1);
12518
0
                        // Rule at src/isa/x64/lower.isle line 141.
12519
0
                        return Some(v99);
12520
0
                    }
12521
                }
12522
                &Opcode::SaddOverflow => {
12523
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12524
0
                    let v92 = C::value_type(ctx, v38.1);
12525
0
                    let v93 = C::fits_in_64(ctx, v92);
12526
0
                    if let Some(v94) = v93 {
12527
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12528
0
                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12529
0
                        let v101 = constructor_construct_overflow_op_alu(ctx, v94, &CC::O, &AluRmiROpcode::Add, v41, v42);
12530
0
                        // Rule at src/isa/x64/lower.isle line 146.
12531
0
                        return Some(v101);
12532
0
                    }
12533
0
                    if v92 == I128 {
12534
0
                        let v102 = constructor_construct_overflow_op_alu_128(ctx, &CC::O, &AluRmiROpcode::Add, &AluRmiROpcode::Adc, v38.0, v38.1);
12535
0
                        // Rule at src/isa/x64/lower.isle line 149.
12536
0
                        return Some(v102);
12537
0
                    }
12538
                }
12539
                &Opcode::UsubOverflow => {
12540
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12541
0
                    let v92 = C::value_type(ctx, v38.1);
12542
0
                    let v93 = C::fits_in_64(ctx, v92);
12543
0
                    if let Some(v94) = v93 {
12544
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12545
0
                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12546
0
                        let v104 = constructor_construct_overflow_op_alu(ctx, v94, &CC::B, &AluRmiROpcode::Sub, v41, v42);
12547
0
                        // Rule at src/isa/x64/lower.isle line 154.
12548
0
                        return Some(v104);
12549
0
                    }
12550
0
                    if v92 == I128 {
12551
0
                        let v106 = constructor_construct_overflow_op_alu_128(ctx, &CC::B, &AluRmiROpcode::Sub, &AluRmiROpcode::Sbb, v38.0, v38.1);
12552
0
                        // Rule at src/isa/x64/lower.isle line 157.
12553
0
                        return Some(v106);
12554
0
                    }
12555
                }
12556
                &Opcode::SsubOverflow => {
12557
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12558
0
                    let v92 = C::value_type(ctx, v38.1);
12559
0
                    let v93 = C::fits_in_64(ctx, v92);
12560
0
                    if let Some(v94) = v93 {
12561
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12562
0
                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12563
0
                        let v107 = constructor_construct_overflow_op_alu(ctx, v94, &CC::O, &AluRmiROpcode::Sub, v41, v42);
12564
0
                        // Rule at src/isa/x64/lower.isle line 162.
12565
0
                        return Some(v107);
12566
0
                    }
12567
0
                    if v92 == I128 {
12568
0
                        let v108 = constructor_construct_overflow_op_alu_128(ctx, &CC::O, &AluRmiROpcode::Sub, &AluRmiROpcode::Sbb, v38.0, v38.1);
12569
0
                        // Rule at src/isa/x64/lower.isle line 165.
12570
0
                        return Some(v108);
12571
0
                    }
12572
                }
12573
                &Opcode::UmulOverflow => {
12574
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12575
0
                    let v92 = C::value_type(ctx, v38.1);
12576
0
                    let v93 = C::fits_in_64(ctx, v92);
12577
0
                    if let Some(v94) = v93 {
12578
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12579
0
                        let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
12580
0
                        let v110 = &constructor_x64_umullo_with_flags_paired(ctx, v94, v41, v109);
12581
0
                        let v111 = constructor_construct_overflow_op(ctx, &CC::O, v110);
12582
0
                        // Rule at src/isa/x64/lower.isle line 170.
12583
0
                        return Some(v111);
12584
0
                    }
12585
                }
12586
                &Opcode::SmulOverflow => {
12587
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
12588
0
                    let v92 = C::value_type(ctx, v38.1);
12589
0
                    let v112 = C::ty_int_ref_16_to_64(ctx, v92);
12590
0
                    if let Some(v113) = v112 {
12591
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12592
0
                        let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12593
0
                        let v115 = constructor_construct_overflow_op_alu(ctx, v113, &CC::O, &AluRmiROpcode::Mul, v41, v42);
12594
0
                        // Rule at src/isa/x64/lower.isle line 175.
12595
0
                        return Some(v115);
12596
0
                    }
12597
0
                    if v92 == I8 {
12598
0
                        let v41 = constructor_put_in_gpr(ctx, v38.0);
12599
0
                        let v117 = &C::put_in_reg_mem(ctx, v38.1);
12600
0
                        let v118 = &constructor_reg_mem_to_reg_mem_imm(ctx, v117);
12601
0
                        let v119 = &C::gpr_mem_imm_new(ctx, v118);
12602
0
                        let v120 = &constructor_x64_alurmi_with_flags_paired(ctx, &AluRmiROpcode::Mul, I8, v41, v119);
12603
0
                        let v121 = constructor_construct_overflow_op(ctx, &CC::O, v120);
12604
0
                        // Rule at src/isa/x64/lower.isle line 179.
12605
0
                        return Some(v121);
12606
0
                    }
12607
                }
12608
                &Opcode::Band => {
12609
65.0k
                    let v1 = C::first_result(ctx, arg0);
12610
65.0k
                    if let Some(v2) = v1 {
12611
65.0k
                        let v3 = C::value_type(ctx, v2);
12612
65.0k
                        let v45 = C::ty_32_or_64(ctx, v3);
12613
65.0k
                        if let Some(
v4664.1k
) = v45 {
12614
64.1k
                            let v38 = C::unpack_value_array_2(ctx, v37);
12615
64.1k
                            let v196 = constructor_val_minus_one(ctx, v38.1);
12616
64.1k
                            if let Some(
v19784
) = v196 {
12617
84
                                let v211 = C::use_bmi2(ctx);
12618
84
                                if v211 == true {
12619
84
                                    let v212 = C::def_inst(ctx, v197);
12620
84
                                    if let Some(
v21342
) = v212 {
12621
42
                                        let v214 = &C::inst_data(ctx, v213);
12622
                                        if let &InstructionData::Binary {
12623
19
                                            opcode: ref v215,
12624
19
                                            args: ref v216,
12625
42
                                        } = v214 {
12626
19
                                            if let &Opcode::Ishl = v215 {
12627
0
                                                let v217 = C::unpack_value_array_2(ctx, v216);
12628
0
                                                let v220 = C::def_inst(ctx, v217.0);
12629
0
                                                if let Some(v221) = v220 {
12630
0
                                                    let v222 = &C::inst_data(ctx, v221);
12631
                                                    if let &InstructionData::UnaryImm {
12632
0
                                                        opcode: ref v223,
12633
0
                                                        imm: v224,
12634
0
                                                    } = v222 {
12635
0
                                                        if let &Opcode::Iconst = v223 {
12636
0
                                                            let v225 = C::u64_from_imm64(ctx, v224);
12637
0
                                                            if v225 == 0x1 {
12638
0
                                                                let v198 = &constructor_put_in_gpr_mem(ctx, v38.0);
12639
0
                                                                let v226 = constructor_put_in_gpr(ctx, v217.1);
12640
0
                                                                let v227 = C::ty_bits(ctx, v46);
12641
0
                                                                let v228 = C::u8_as_u32(ctx, v227);
12642
0
                                                                let v230 = C::u32_sub(ctx, v228, 0x1);
12643
0
                                                                let v231 = RegMemImm::Imm {
12644
0
                                                                    simm32: v230,
12645
0
                                                                };
12646
0
                                                                let v232 = &C::gpr_mem_imm_new(ctx, &v231);
12647
0
                                                                let v233 = constructor_x64_and(ctx, v46, v226, v232);
12648
0
                                                                let v234 = constructor_x64_bzhi(ctx, v46, v198, v233);
12649
0
                                                                let v235 = constructor_output_gpr(ctx, v234);
12650
0
                                                                // Rule at src/isa/x64/lower.isle line 382.
12651
0
                                                                return Some(v235);
12652
0
                                                            }
12653
0
                                                        }
12654
0
                                                    }
12655
0
                                                }
12656
19
                                            }
12657
23
                                        }
12658
42
                                    }
12659
0
                                }
12660
64.0k
                            }
12661
64.1k
                            let v188 = C::use_bmi1(ctx);
12662
64.1k
                            if v188 == true {
12663
64.1k
                                let v171 = C::def_inst(ctx, v38.1);
12664
64.1k
                                if let Some(
v17263.9k
) = v171 {
12665
63.9k
                                    let v173 = &C::inst_data(ctx, v172);
12666
                                    if let &InstructionData::Unary {
12667
597
                                        opcode: ref v174,
12668
597
                                        arg: v175,
12669
63.9k
                                    } = v173 {
12670
597
                                        if let &Opcode::Ineg = v174 {
12671
309
                                            if v38.0 == v175 {
12672
0
                                                let v198 = &constructor_put_in_gpr_mem(ctx, v38.0);
12673
0
                                                let v209 = constructor_x64_blsi(ctx, v46, v198);
12674
0
                                                let v210 = constructor_output_gpr(ctx, v209);
12675
0
                                                // Rule at src/isa/x64/lower.isle line 369.
12676
0
                                                return Some(v210);
12677
309
                                            }
12678
288
                                        }
12679
63.3k
                                    }
12680
115
                                }
12681
64.1k
                                let v180 = C::def_inst(ctx, v38.0);
12682
64.1k
                                if let Some(
v18157.7k
) = v180 {
12683
57.7k
                                    let v182 = &C::inst_data(ctx, v181);
12684
                                    if let &InstructionData::Unary {
12685
1.47k
                                        opcode: ref v183,
12686
1.47k
                                        arg: v184,
12687
57.7k
                                    } = v182 {
12688
1.47k
                                        if let &Opcode::Ineg = v183 {
12689
145
                                            if v38.1 == v184 {
12690
0
                                                let v206 = &constructor_put_in_gpr_mem(ctx, v184);
12691
0
                                                let v207 = constructor_x64_blsi(ctx, v46, v206);
12692
0
                                                let v208 = constructor_output_gpr(ctx, v207);
12693
0
                                                // Rule at src/isa/x64/lower.isle line 366.
12694
0
                                                return Some(v208);
12695
145
                                            }
12696
1.33k
                                        }
12697
56.3k
                                    }
12698
6.32k
                                }
12699
64.1k
                                let v201 = constructor_val_minus_one(ctx, v38.0);
12700
64.1k
                                if let Some(
v2021.17k
) = v201 {
12701
1.17k
                                    if v38.1 == v202 {
12702
58
                                        let v203 = &constructor_put_in_gpr_mem(ctx, v38.1);
12703
58
                                        let v204 = constructor_x64_blsr(ctx, v46, v203);
12704
58
                                        let v205 = constructor_output_gpr(ctx, v204);
12705
58
                                        // Rule at src/isa/x64/lower.isle line 359.
12706
58
                                        return Some(v205);
12707
1.12k
                                    }
12708
62.9k
                                }
12709
64.0k
                                if let Some(
v19784
) = v196 {
12710
84
                                    if v38.0 == v197 {
12711
0
                                        let v198 = &constructor_put_in_gpr_mem(ctx, v38.0);
12712
0
                                        let v199 = constructor_x64_blsr(ctx, v46, v198);
12713
0
                                        let v200 = constructor_output_gpr(ctx, v199);
12714
0
                                        // Rule at src/isa/x64/lower.isle line 355.
12715
0
                                        return Some(v200);
12716
84
                                    }
12717
63.9k
                                }
12718
0
                            }
12719
905
                        }
12720
64.9k
                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
12721
64.9k
                        if let Some(v153) = v152 {
12722
64.9k
                            let v188 = C::use_bmi1(ctx);
12723
64.9k
                            if v188 == true {
12724
64.9k
                                let v38 = C::unpack_value_array_2(ctx, v37);
12725
64.9k
                                let v180 = C::def_inst(ctx, v38.0);
12726
64.9k
                                if let Some(
v18158.6k
) = v180 {
12727
58.6k
                                    let v182 = &C::inst_data(ctx, v181);
12728
                                    if let &InstructionData::Unary {
12729
1.47k
                                        opcode: ref v183,
12730
1.47k
                                        arg: v184,
12731
58.6k
                                    } = v182 {
12732
1.47k
                                        if let &Opcode::Bnot = v183 {
12733
132
                                            let v193 = constructor_put_in_gpr(ctx, v184);
12734
132
                                            let v109 = &constructor_put_in_gpr_mem(ctx, v38.1);
12735
132
                                            let v194 = constructor_x64_andn(ctx, v3, v193, v109);
12736
132
                                            let v195 = constructor_output_gpr(ctx, v194);
12737
132
                                            // Rule at src/isa/x64/lower.isle line 343.
12738
132
                                            return Some(v195);
12739
1.34k
                                        }
12740
57.1k
                                    }
12741
6.32k
                                }
12742
64.8k
                                let v171 = C::def_inst(ctx, v38.1);
12743
64.8k
                                if let Some(
v17264.7k
) = v171 {
12744
64.7k
                                    let v173 = &C::inst_data(ctx, v172);
12745
                                    if let &InstructionData::Unary {
12746
597
                                        opcode: ref v174,
12747
597
                                        arg: v175,
12748
64.7k
                                    } = v173 {
12749
597
                                        if let &Opcode::Bnot = v174 {
12750
140
                                            let v189 = constructor_put_in_gpr(ctx, v175);
12751
140
                                            let v190 = &constructor_put_in_gpr_mem(ctx, v38.0);
12752
140
                                            let v191 = constructor_x64_andn(ctx, v3, v189, v190);
12753
140
                                            let v192 = constructor_output_gpr(ctx, v191);
12754
140
                                            // Rule at src/isa/x64/lower.isle line 338.
12755
140
                                            return Some(v192);
12756
457
                                        }
12757
64.1k
                                    }
12758
60
                                }
12759
0
                            }
12760
0
                        }
12761
64.6k
                        let v64 = C::multi_lane(ctx, v3);
12762
64.6k
                        if let Some(
v650
) = v64 {
12763
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12764
0
                            let v180 = C::def_inst(ctx, v38.0);
12765
0
                            if let Some(v181) = v180 {
12766
0
                                let v182 = &C::inst_data(ctx, v181);
12767
                                if let &InstructionData::Unary {
12768
0
                                    opcode: ref v183,
12769
0
                                    arg: v184,
12770
0
                                } = v182 {
12771
0
                                    if let &Opcode::Bnot = v183 {
12772
0
                                        let v185 = constructor_put_in_xmm(ctx, v184);
12773
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12774
0
                                        let v186 = constructor_sse_and_not(ctx, v3, v185, v69);
12775
0
                                        let v187 = constructor_output_xmm(ctx, v186);
12776
0
                                        // Rule at src/isa/x64/lower.isle line 335.
12777
0
                                        return Some(v187);
12778
0
                                    }
12779
0
                                }
12780
0
                            }
12781
0
                            let v171 = C::def_inst(ctx, v38.1);
12782
0
                            if let Some(v172) = v171 {
12783
0
                                let v173 = &C::inst_data(ctx, v172);
12784
                                if let &InstructionData::Unary {
12785
0
                                    opcode: ref v174,
12786
0
                                    arg: v175,
12787
0
                                } = v173 {
12788
0
                                    if let &Opcode::Bnot = v174 {
12789
0
                                        let v176 = constructor_put_in_xmm(ctx, v175);
12790
0
                                        let v177 = &C::put_in_xmm_mem(ctx, v38.0);
12791
0
                                        let v178 = constructor_sse_and_not(ctx, v3, v176, v177);
12792
0
                                        let v179 = constructor_output_xmm(ctx, v178);
12793
0
                                        // Rule at src/isa/x64/lower.isle line 333.
12794
0
                                        return Some(v179);
12795
0
                                    }
12796
0
                                }
12797
0
                            }
12798
64.6k
                        }
12799
64.6k
                        if v3 == I128 {
12800
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12801
0
                            let v78 = C::put_in_regs(ctx, v38.0);
12802
0
                            let v168 = C::put_in_regs(ctx, v38.1);
12803
0
                            let v169 = constructor_and_i128(ctx, v78, v168);
12804
0
                            let v170 = C::output(ctx, v169);
12805
0
                            // Rule at src/isa/x64/lower.isle line 314.
12806
0
                            return Some(v170);
12807
64.6k
                        }
12808
64.6k
                        if let Some(
v650
) = v64 {
12809
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12810
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12811
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12812
0
                            let v166 = constructor_sse_and(ctx, v3, v68, v69);
12813
0
                            let v167 = constructor_output_xmm(ctx, v166);
12814
0
                            // Rule at src/isa/x64/lower.isle line 297.
12815
0
                            return Some(v167);
12816
64.6k
                        }
12817
64.6k
                        let v162 = C::ty_scalar_float(ctx, v3);
12818
64.6k
                        if let Some(
v1630
) = v162 {
12819
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12820
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12821
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12822
0
                            let v164 = constructor_sse_and(ctx, v163, v68, v69);
12823
0
                            let v165 = constructor_output_xmm(ctx, v164);
12824
0
                            // Rule at src/isa/x64/lower.isle line 285.
12825
0
                            return Some(v165);
12826
64.6k
                        }
12827
64.6k
                        if let Some(v153) = v152 {
12828
64.6k
                            let v38 = C::unpack_value_array_2(ctx, v37);
12829
64.6k
                            let v158 = &C::simm32_from_value(ctx, v38.0);
12830
64.6k
                            if let Some(
v1590
) = v158 {
12831
0
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12832
0
                                let v160 = constructor_x64_and(ctx, v3, v60, v159);
12833
0
                                let v161 = constructor_output_gpr(ctx, v160);
12834
0
                                // Rule at src/isa/x64/lower.isle line 279.
12835
0
                                return Some(v161);
12836
64.6k
                            }
12837
64.6k
                            let v58 = &C::sinkable_load(ctx, v38.0);
12838
64.6k
                            if let Some(
v592.02k
) = v58 {
12839
2.02k
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12840
2.02k
                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
12841
2.02k
                                let v156 = constructor_x64_and(ctx, v3, v60, v61);
12842
2.02k
                                let v157 = constructor_output_gpr(ctx, v156);
12843
2.02k
                                // Rule at src/isa/x64/lower.isle line 275.
12844
2.02k
                                return Some(v157);
12845
62.6k
                            }
12846
62.6k
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
12847
62.6k
                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12848
62.6k
                            let v154 = constructor_x64_and(ctx, v3, v41, v42);
12849
62.6k
                            let v155 = constructor_output_gpr(ctx, v154);
12850
62.6k
                            // Rule at src/isa/x64/lower.isle line 268.
12851
62.6k
                            return Some(v155);
12852
0
                        }
12853
0
                    }
12854
                }
12855
                &Opcode::Bor => {
12856
20.8k
                    let v1 = C::first_result(ctx, arg0);
12857
20.8k
                    if let Some(v2) = v1 {
12858
20.8k
                        let v3 = C::value_type(ctx, v2);
12859
20.8k
                        if v3 == I128 {
12860
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12861
0
                            let v78 = C::put_in_regs(ctx, v38.0);
12862
0
                            let v168 = C::put_in_regs(ctx, v38.1);
12863
0
                            let v246 = constructor_or_i128(ctx, v78, v168);
12864
0
                            let v247 = C::output(ctx, v246);
12865
0
                            // Rule at src/isa/x64/lower.isle line 436.
12866
0
                            return Some(v247);
12867
20.8k
                        }
12868
20.8k
                        let v64 = C::multi_lane(ctx, v3);
12869
20.8k
                        if let Some(
v650
) = v64 {
12870
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12871
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12872
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12873
0
                            let v244 = constructor_sse_or(ctx, v3, v68, v69);
12874
0
                            let v245 = constructor_output_xmm(ctx, v244);
12875
0
                            // Rule at src/isa/x64/lower.isle line 421.
12876
0
                            return Some(v245);
12877
20.8k
                        }
12878
20.8k
                        let v162 = C::ty_scalar_float(ctx, v3);
12879
20.8k
                        if let Some(
v1630
) = v162 {
12880
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12881
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12882
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12883
0
                            let v242 = constructor_sse_or(ctx, v163, v68, v69);
12884
0
                            let v243 = constructor_output_xmm(ctx, v242);
12885
0
                            // Rule at src/isa/x64/lower.isle line 409.
12886
0
                            return Some(v243);
12887
20.8k
                        }
12888
20.8k
                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
12889
20.8k
                        if let Some(v153) = v152 {
12890
20.8k
                            let v38 = C::unpack_value_array_2(ctx, v37);
12891
20.8k
                            let v158 = &C::simm32_from_value(ctx, v38.0);
12892
20.8k
                            if let Some(
v1590
) = v158 {
12893
0
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12894
0
                                let v240 = constructor_x64_or(ctx, v3, v60, v159);
12895
0
                                let v241 = constructor_output_gpr(ctx, v240);
12896
0
                                // Rule at src/isa/x64/lower.isle line 403.
12897
0
                                return Some(v241);
12898
20.8k
                            }
12899
20.8k
                            let v58 = &C::sinkable_load(ctx, v38.0);
12900
20.8k
                            if let Some(
v5911
) = v58 {
12901
11
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12902
11
                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
12903
11
                                let v238 = constructor_x64_or(ctx, v3, v60, v61);
12904
11
                                let v239 = constructor_output_gpr(ctx, v238);
12905
11
                                // Rule at src/isa/x64/lower.isle line 399.
12906
11
                                return Some(v239);
12907
20.8k
                            }
12908
20.8k
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
12909
20.8k
                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
12910
20.8k
                            let v236 = constructor_x64_or(ctx, v3, v41, v42);
12911
20.8k
                            let v237 = constructor_output_gpr(ctx, v236);
12912
20.8k
                            // Rule at src/isa/x64/lower.isle line 392.
12913
20.8k
                            return Some(v237);
12914
0
                        }
12915
0
                    }
12916
                }
12917
                &Opcode::Bxor => {
12918
3.67k
                    let v1 = C::first_result(ctx, arg0);
12919
3.67k
                    if let Some(v2) = v1 {
12920
3.67k
                        let v3 = C::value_type(ctx, v2);
12921
3.67k
                        let v45 = C::ty_32_or_64(ctx, v3);
12922
3.67k
                        if let Some(
v463.66k
) = v45 {
12923
3.66k
                            let v188 = C::use_bmi1(ctx);
12924
3.66k
                            if v188 == true {
12925
3.66k
                                let v38 = C::unpack_value_array_2(ctx, v37);
12926
3.66k
                                let v201 = constructor_val_minus_one(ctx, v38.0);
12927
3.66k
                                if let Some(
v2020
) = v201 {
12928
0
                                    if v38.1 == v202 {
12929
0
                                        let v203 = &constructor_put_in_gpr_mem(ctx, v38.1);
12930
0
                                        let v264 = constructor_x64_blsmsk(ctx, v46, v203);
12931
0
                                        let v265 = constructor_output_gpr(ctx, v264);
12932
0
                                        // Rule at src/isa/x64/lower.isle line 487.
12933
0
                                        return Some(v265);
12934
0
                                    }
12935
3.66k
                                }
12936
3.66k
                                let v196 = constructor_val_minus_one(ctx, v38.1);
12937
3.66k
                                if let Some(
v1970
) = v196 {
12938
0
                                    if v38.0 == v197 {
12939
0
                                        let v198 = &constructor_put_in_gpr_mem(ctx, v38.0);
12940
0
                                        let v262 = constructor_x64_blsmsk(ctx, v46, v198);
12941
0
                                        let v263 = constructor_output_gpr(ctx, v262);
12942
0
                                        // Rule at src/isa/x64/lower.isle line 483.
12943
0
                                        return Some(v263);
12944
0
                                    }
12945
3.66k
                                }
12946
0
                            }
12947
3
                        }
12948
3.67k
                        if v3 == I128 {
12949
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12950
0
                            let v78 = C::put_in_regs(ctx, v38.0);
12951
0
                            let v80 = constructor_value_regs_get_gpr(ctx, v78, 0x0);
12952
0
                            let v82 = constructor_value_regs_get_gpr(ctx, v78, 0x1);
12953
0
                            let v83 = C::put_in_regs(ctx, v38.1);
12954
0
                            let v84 = constructor_value_regs_get_gpr(ctx, v83, 0x0);
12955
0
                            let v85 = constructor_value_regs_get_gpr(ctx, v83, 0x1);
12956
0
                            let v86 = &C::gpr_to_gpr_mem_imm(ctx, v84);
12957
0
                            let v258 = constructor_x64_xor(ctx, I64, v80, v86);
12958
0
                            let v88 = &C::gpr_to_gpr_mem_imm(ctx, v85);
12959
0
                            let v259 = constructor_x64_xor(ctx, I64, v82, v88);
12960
0
                            let v260 = constructor_value_gprs(ctx, v258, v259);
12961
0
                            let v261 = C::output(ctx, v260);
12962
0
                            // Rule at src/isa/x64/lower.isle line 471.
12963
0
                            return Some(v261);
12964
3.67k
                        }
12965
3.67k
                        let v64 = C::multi_lane(ctx, v3);
12966
3.67k
                        if let Some(
v650
) = v64 {
12967
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12968
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12969
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12970
0
                            let v256 = constructor_x64_xor_vector(ctx, v3, v68, v69);
12971
0
                            let v257 = constructor_output_xmm(ctx, v256);
12972
0
                            // Rule at src/isa/x64/lower.isle line 466.
12973
0
                            return Some(v257);
12974
3.67k
                        }
12975
3.67k
                        let v162 = C::ty_scalar_float(ctx, v3);
12976
3.67k
                        if let Some(
v1630
) = v162 {
12977
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
12978
0
                            let v68 = constructor_put_in_xmm(ctx, v38.0);
12979
0
                            let v69 = &C::put_in_xmm_mem(ctx, v38.1);
12980
0
                            let v254 = constructor_x64_xor_vector(ctx, v163, v68, v69);
12981
0
                            let v255 = constructor_output_xmm(ctx, v254);
12982
0
                            // Rule at src/isa/x64/lower.isle line 461.
12983
0
                            return Some(v255);
12984
3.67k
                        }
12985
3.67k
                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
12986
3.67k
                        if let Some(v153) = v152 {
12987
3.67k
                            let v38 = C::unpack_value_array_2(ctx, v37);
12988
3.67k
                            let v158 = &C::simm32_from_value(ctx, v38.0);
12989
3.67k
                            if let Some(
v1590
) = v158 {
12990
0
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12991
0
                                let v252 = constructor_x64_xor(ctx, v3, v60, v159);
12992
0
                                let v253 = constructor_output_gpr(ctx, v252);
12993
0
                                // Rule at src/isa/x64/lower.isle line 455.
12994
0
                                return Some(v253);
12995
3.67k
                            }
12996
3.67k
                            let v58 = &C::sinkable_load(ctx, v38.0);
12997
3.67k
                            if let Some(
v592
) = v58 {
12998
2
                                let v60 = constructor_put_in_gpr(ctx, v38.1);
12999
2
                                let v61 = &constructor_sink_load_to_gpr_mem_imm(ctx, v59);
13000
2
                                let v250 = constructor_x64_xor(ctx, v3, v60, v61);
13001
2
                                let v251 = constructor_output_gpr(ctx, v250);
13002
2
                                // Rule at src/isa/x64/lower.isle line 451.
13003
2
                                return Some(v251);
13004
3.66k
                            }
13005
3.66k
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
13006
3.66k
                            let v42 = &constructor_put_in_gpr_mem_imm(ctx, v38.1);
13007
3.66k
                            let v248 = constructor_x64_xor(ctx, v3, v41, v42);
13008
3.66k
                            let v249 = constructor_output_gpr(ctx, v248);
13009
3.66k
                            // Rule at src/isa/x64/lower.isle line 444.
13010
3.66k
                            return Some(v249);
13011
0
                        }
13012
0
                    }
13013
                }
13014
                &Opcode::Rotl => {
13015
1.00k
                    let v1 = C::first_result(ctx, arg0);
13016
1.00k
                    if let Some(v2) = v1 {
13017
1.00k
                        let v3 = C::value_type(ctx, v2);
13018
1.00k
                        if v3 == I128 {
13019
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
13020
0
                            let v78 = C::put_in_regs(ctx, v38.0);
13021
0
                            let v364 = constructor_lo_gpr(ctx, v38.1);
13022
0
                            let v365 = constructor_shl_i128(ctx, v78, v364);
13023
0
                            let v367 = constructor_imm(ctx, I64, 0x80);
13024
0
                            let v368 = C::gpr_new(ctx, v367);
13025
0
                            let v369 = &C::gpr_to_gpr_mem_imm(ctx, v364);
13026
0
                            let v370 = constructor_x64_sub(ctx, I64, v368, v369);
13027
0
                            let v371 = constructor_shr_i128(ctx, v78, v370);
13028
0
                            let v372 = constructor_or_i128(ctx, v365, v371);
13029
0
                            let v373 = C::output(ctx, v372);
13030
0
                            // Rule at src/isa/x64/lower.isle line 893.
13031
0
                            return Some(v373);
13032
1.00k
                        }
13033
1.00k
                        let v4 = C::fits_in_64(ctx, v3);
13034
1.00k
                        if let Some(v5) = v4 {
13035
1.00k
                            let v38 = C::unpack_value_array_2(ctx, v37);
13036
1.00k
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
13037
1.00k
                            let v266 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
13038
1.00k
                            let v362 = constructor_x64_rotl(ctx, v5, v41, v266);
13039
1.00k
                            let v363 = constructor_output_gpr(ctx, v362);
13040
1.00k
                            // Rule at src/isa/x64/lower.isle line 887.
13041
1.00k
                            return Some(v363);
13042
0
                        }
13043
0
                    }
13044
                }
13045
                &Opcode::Rotr => {
13046
25
                    let v1 = C::first_result(ctx, arg0);
13047
25
                    if let Some(v2) = v1 {
13048
25
                        let v3 = C::value_type(ctx, v2);
13049
25
                        if v3 == I128 {
13050
0
                            let v38 = C::unpack_value_array_2(ctx, v37);
13051
0
                            let v78 = C::put_in_regs(ctx, v38.0);
13052
0
                            let v364 = constructor_lo_gpr(ctx, v38.1);
13053
0
                            let v376 = constructor_shr_i128(ctx, v78, v364);
13054
0
                            let v367 = constructor_imm(ctx, I64, 0x80);
13055
0
                            let v368 = C::gpr_new(ctx, v367);
13056
0
                            let v369 = &C::gpr_to_gpr_mem_imm(ctx, v364);
13057
0
                            let v370 = constructor_x64_sub(ctx, I64, v368, v369);
13058
0
                            let v377 = constructor_shl_i128(ctx, v78, v370);
13059
0
                            let v378 = constructor_or_i128(ctx, v376, v377);
13060
0
                            let v379 = C::output(ctx, v378);
13061
0
                            // Rule at src/isa/x64/lower.isle line 914.
13062
0
                            return Some(v379);
13063
25
                        }
13064
25
                        let v4 = C::fits_in_64(ctx, v3);
13065
25
                        if let Some(v5) = v4 {
13066
25
                            let v38 = C::unpack_value_array_2(ctx, v37);
13067
25
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
13068
25
                            let v266 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
13069
25
                            let v374 = constructor_x64_rotr(ctx, v5, v41, v266);
13070
25
                            let v375 = constructor_output_gpr(ctx, v374);
13071
25
                            // Rule at src/isa/x64/lower.isle line 908.
13072
25
                            return Some(v375);
13073
0
                        }
13074
0
                    }
13075
                }
13076
                &Opcode::Ishl => {
13077
23.7k
                    let v1 = C::first_result(ctx, arg0);
13078
23.7k
                    if let Some(v2) = v1 {
13079
23.7k
                        let v3 = C::value_type(ctx, v2);
13080
23.7k
                        match v3 {
13081
                            I128 => {
13082
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13083
0
                                let v269 = constructor_lo_gpr(ctx, v38.1);
13084
0
                                let v270 = C::put_in_regs(ctx, v38.0);
13085
0
                                let v271 = constructor_shl_i128(ctx, v270, v269);
13086
0
                                let v272 = C::output(ctx, v271);
13087
0
                                // Rule at src/isa/x64/lower.isle line 535.
13088
0
                                return Some(v272);
13089
                            }
13090
                            I8X16 => {
13091
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13092
0
                                let v273 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13093
0
                                let v274 = constructor_put_in_xmm(ctx, v38.0);
13094
0
                                let v275 = &constructor_mov_rmi_to_xmm(ctx, v273);
13095
0
                                let v276 = constructor_x64_psllw(ctx, v274, v275);
13096
0
                                let v277 = &constructor_ishl_i8x16_mask(ctx, v273);
13097
0
                                let v280 = constructor_x64_load(ctx, I8X16, v277, &ExtKind::None);
13098
0
                                let v281 = RegMem::Reg {
13099
0
                                    reg: v280,
13100
0
                                };
13101
0
                                let v282 = &C::reg_mem_to_xmm_mem(ctx, &v281);
13102
0
                                let v283 = constructor_sse_and(ctx, I8X16, v276, v282);
13103
0
                                let v284 = constructor_output_xmm(ctx, v283);
13104
0
                                // Rule at src/isa/x64/lower.isle line 547.
13105
0
                                return Some(v284);
13106
                            }
13107
                            I16X8 => {
13108
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13109
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13110
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13111
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13112
0
                                let v287 = constructor_x64_psllw(ctx, v68, v286);
13113
0
                                let v288 = constructor_output_xmm(ctx, v287);
13114
0
                                // Rule at src/isa/x64/lower.isle line 592.
13115
0
                                return Some(v288);
13116
                            }
13117
                            I32X4 => {
13118
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13119
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13120
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13121
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13122
0
                                let v289 = constructor_x64_pslld(ctx, v68, v286);
13123
0
                                let v290 = constructor_output_xmm(ctx, v289);
13124
0
                                // Rule at src/isa/x64/lower.isle line 595.
13125
0
                                return Some(v290);
13126
                            }
13127
                            I64X2 => {
13128
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13129
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13130
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13131
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13132
0
                                let v291 = constructor_x64_psllq(ctx, v68, v286);
13133
0
                                let v292 = constructor_output_xmm(ctx, v291);
13134
0
                                // Rule at src/isa/x64/lower.isle line 598.
13135
0
                                return Some(v292);
13136
                            }
13137
23.7k
                            _ => {}
13138
23.7k
                        }
13139
23.7k
                        let v4 = C::fits_in_64(ctx, v3);
13140
23.7k
                        if let Some(v5) = v4 {
13141
23.7k
                            let v38 = C::unpack_value_array_2(ctx, v37);
13142
23.7k
                            let v41 = constructor_put_in_gpr(ctx, v38.0);
13143
23.7k
                            let v266 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
13144
23.7k
                            let v267 = constructor_x64_shl(ctx, v5, v41, v266);
13145
23.7k
                            let v268 = constructor_output_gpr(ctx, v267);
13146
23.7k
                            // Rule at src/isa/x64/lower.isle line 496.
13147
23.7k
                            return Some(v268);
13148
0
                        }
13149
0
                    }
13150
                }
13151
                &Opcode::Ushr => {
13152
15.0k
                    let v1 = C::first_result(ctx, arg0);
13153
15.0k
                    if let Some(v2) = v1 {
13154
15.0k
                        let v3 = C::value_type(ctx, v2);
13155
15.0k
                        match v3 {
13156
                            I128 => {
13157
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13158
0
                                let v269 = constructor_lo_gpr(ctx, v38.1);
13159
0
                                let v270 = C::put_in_regs(ctx, v38.0);
13160
0
                                let v297 = constructor_shr_i128(ctx, v270, v269);
13161
0
                                let v298 = C::output(ctx, v297);
13162
0
                                // Rule at src/isa/x64/lower.isle line 642.
13163
0
                                return Some(v298);
13164
                            }
13165
                            I8X16 => {
13166
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13167
0
                                let v273 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13168
0
                                let v274 = constructor_put_in_xmm(ctx, v38.0);
13169
0
                                let v275 = &constructor_mov_rmi_to_xmm(ctx, v273);
13170
0
                                let v299 = constructor_x64_psrlw(ctx, v274, v275);
13171
0
                                let v300 = &constructor_ushr_i8x16_mask(ctx, v273);
13172
0
                                let v301 = &constructor_synthetic_amode_to_xmm_mem(ctx, v300);
13173
0
                                let v302 = constructor_sse_and(ctx, I8X16, v299, v301);
13174
0
                                let v303 = constructor_output_xmm(ctx, v302);
13175
0
                                // Rule at src/isa/x64/lower.isle line 652.
13176
0
                                return Some(v303);
13177
                            }
13178
                            I16X8 => {
13179
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13180
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13181
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13182
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13183
0
                                let v304 = constructor_x64_psrlw(ctx, v68, v286);
13184
0
                                let v305 = constructor_output_xmm(ctx, v304);
13185
0
                                // Rule at src/isa/x64/lower.isle line 698.
13186
0
                                return Some(v305);
13187
                            }
13188
                            I32X4 => {
13189
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13190
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13191
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13192
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13193
0
                                let v306 = constructor_x64_psrld(ctx, v68, v286);
13194
0
                                let v307 = constructor_output_xmm(ctx, v306);
13195
0
                                // Rule at src/isa/x64/lower.isle line 701.
13196
0
                                return Some(v307);
13197
                            }
13198
                            I64X2 => {
13199
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13200
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13201
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13202
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13203
0
                                let v308 = constructor_x64_psrlq(ctx, v68, v286);
13204
0
                                let v309 = constructor_output_xmm(ctx, v308);
13205
0
                                // Rule at src/isa/x64/lower.isle line 704.
13206
0
                                return Some(v309);
13207
                            }
13208
15.0k
                            _ => {}
13209
15.0k
                        }
13210
15.0k
                        let v4 = C::fits_in_64(ctx, v3);
13211
15.0k
                        if let Some(v5) = v4 {
13212
15.0k
                            let v38 = C::unpack_value_array_2(ctx, v37);
13213
15.0k
                            let v294 = constructor_extend_to_gpr(ctx, v38.0, v5, &ExtendKind::Zero);
13214
15.0k
                            let v266 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
13215
15.0k
                            let v295 = constructor_x64_shr(ctx, v5, v294, v266);
13216
15.0k
                            let v296 = constructor_output_gpr(ctx, v295);
13217
15.0k
                            // Rule at src/isa/x64/lower.isle line 605.
13218
15.0k
                            return Some(v296);
13219
0
                        }
13220
0
                    }
13221
                }
13222
                &Opcode::Sshr => {
13223
297
                    let v1 = C::first_result(ctx, arg0);
13224
297
                    if let Some(v2) = v1 {
13225
297
                        let v3 = C::value_type(ctx, v2);
13226
297
                        match v3 {
13227
                            I128 => {
13228
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13229
0
                                let v269 = constructor_lo_gpr(ctx, v38.1);
13230
0
                                let v270 = C::put_in_regs(ctx, v38.0);
13231
0
                                let v314 = constructor_sar_i128(ctx, v270, v269);
13232
0
                                let v315 = C::output(ctx, v314);
13233
0
                                // Rule at src/isa/x64/lower.isle line 754.
13234
0
                                return Some(v315);
13235
                            }
13236
                            I8X16 => {
13237
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13238
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13239
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13240
0
                                let v316 = &C::xmm_to_xmm_mem(ctx, v68);
13241
0
                                let v317 = constructor_x64_punpcklbw(ctx, v68, v316);
13242
0
                                let v318 = &C::xmm_to_xmm_mem(ctx, v68);
13243
0
                                let v319 = constructor_x64_punpckhbw(ctx, v68, v318);
13244
0
                                let v92 = C::value_type(ctx, v38.1);
13245
0
                                let v320 = &constructor_sshr_i8x16_bigger_shift(ctx, v92, v285);
13246
0
                                let v321 = constructor_x64_psraw(ctx, v317, v320);
13247
0
                                let v322 = constructor_x64_psraw(ctx, v319, v320);
13248
0
                                let v323 = &C::xmm_to_xmm_mem(ctx, v322);
13249
0
                                let v324 = constructor_x64_packsswb(ctx, v321, v323);
13250
0
                                let v325 = constructor_output_xmm(ctx, v324);
13251
0
                                // Rule at src/isa/x64/lower.isle line 775.
13252
0
                                return Some(v325);
13253
                            }
13254
                            I16X8 => {
13255
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13256
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13257
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13258
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13259
0
                                let v326 = constructor_x64_psraw(ctx, v68, v286);
13260
0
                                let v327 = constructor_output_xmm(ctx, v326);
13261
0
                                // Rule at src/isa/x64/lower.isle line 804.
13262
0
                                return Some(v327);
13263
                            }
13264
                            I32X4 => {
13265
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13266
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13267
0
                                let v285 = &constructor_mask_xmm_shift(ctx, v3, v38.1);
13268
0
                                let v286 = &constructor_mov_rmi_to_xmm(ctx, v285);
13269
0
                                let v328 = constructor_x64_psrad(ctx, v68, v286);
13270
0
                                let v329 = constructor_output_xmm(ctx, v328);
13271
0
                                // Rule at src/isa/x64/lower.isle line 807.
13272
0
                                return Some(v329);
13273
                            }
13274
                            I64X2 => {
13275
0
                                let v332 = C::use_avx512vl(ctx);
13276
0
                                if v332 == true {
13277
0
                                    let v333 = C::use_avx512f(ctx);
13278
0
                                    if v333 == true {
13279
0
                                        let v38 = C::unpack_value_array_2(ctx, v37);
13280
0
                                        let v171 = C::def_inst(ctx, v38.1);
13281
0
                                        if let Some(v172) = v171 {
13282
0
                                            let v173 = &C::inst_data(ctx, v172);
13283
                                            if let &InstructionData::UnaryImm {
13284
0
                                                opcode: ref v330,
13285
0
                                                imm: v331,
13286
0
                                            } = v173 {
13287
0
                                                if let &Opcode::Iconst = v330 {
13288
0
                                                    let v334 = &C::put_in_xmm_mem(ctx, v38.0);
13289
0
                                                    let v335 = C::shift_amount_masked(ctx, v3, v331);
13290
0
                                                    let v336 = constructor_x64_vpsraq_imm(ctx, v334, v335);
13291
0
                                                    let v337 = constructor_output_xmm(ctx, v336);
13292
0
                                                    // Rule at src/isa/x64/lower.isle line 813.
13293
0
                                                    return Some(v337);
13294
0
                                                }
13295
0
                                            }
13296
0
                                        }
13297
0
                                        let v60 = constructor_put_in_gpr(ctx, v38.1);
13298
0
                                        let v338 = C::shift_mask(ctx, v3);
13299
0
                                        let v339 = C::u8_as_u32(ctx, v338);
13300
0
                                        let v340 = RegMemImm::Imm {
13301
0
                                            simm32: v339,
13302
0
                                        };
13303
0
                                        let v341 = &C::gpr_mem_imm_new(ctx, &v340);
13304
0
                                        let v342 = constructor_x64_and(ctx, I64, v60, v341);
13305
0
                                        let v343 = constructor_put_in_xmm(ctx, v38.0);
13306
0
                                        let v344 = &C::gpr_to_gpr_mem(ctx, v342);
13307
0
                                        let v345 = constructor_x64_movd_to_xmm(ctx, v344);
13308
0
                                        let v346 = &C::xmm_to_xmm_mem(ctx, v345);
13309
0
                                        let v347 = constructor_x64_vpsraq(ctx, v343, v346);
13310
0
                                        let v348 = constructor_output_xmm(ctx, v347);
13311
0
                                        // Rule at src/isa/x64/lower.isle line 818.
13312
0
                                        return Some(v348);
13313
0
                                    }
13314
0
                                }
13315
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13316
0
                                let v171 = C::def_inst(ctx, v38.1);
13317
0
                                if let Some(v172) = v171 {
13318
0
                                    let v173 = &C::inst_data(ctx, v172);
13319
                                    if let &InstructionData::UnaryImm {
13320
0
                                        opcode: ref v330,
13321
0
                                        imm: v331,
13322
0
                                    } = v173 {
13323
0
                                        if let &Opcode::Iconst = v330 {
13324
0
                                            let v349 = C::u64_from_imm64(ctx, v331);
13325
0
                                            let v350 = C::u64_as_u32(ctx, v349);
13326
0
                                            if let Some(v351) = v350 {
13327
0
                                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13328
0
                                                let v353 = C::u32_and(ctx, v351, 0x3F);
13329
0
                                                let v354 = constructor_lower_i64x2_sshr_imm(ctx, v68, v353);
13330
0
                                                let v355 = constructor_output_xmm(ctx, v354);
13331
0
                                                // Rule at src/isa/x64/lower.isle line 824.
13332
0
                                                return Some(v355);
13333
0
                                            }
13334
0
                                        }
13335
0
                                    }
13336
0
                                }
13337
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13338
0
                                let v356 = constructor_put_in_gpr(ctx, v38.1);
13339
0
                                let v357 = RegMemImm::Imm {
13340
0
                                    simm32: 0x3F,
13341
0
                                };
13342
0
                                let v358 = &C::gpr_mem_imm_new(ctx, &v357);
13343
0
                                let v359 = constructor_x64_and(ctx, I64, v356, v358);
13344
0
                                let v360 = constructor_lower_i64x2_sshr_gpr(ctx, v68, v359);
13345
0
                                let v361 = constructor_output_xmm(ctx, v360);
13346
0
                                // Rule at src/isa/x64/lower.isle line 827.
13347
0
                                return Some(v361);
13348
                            }
13349
297
                            _ => {}
13350
297
                        }
13351
297
                        let v4 = C::fits_in_64(ctx, v3);
13352
297
                        if let Some(v5) = v4 {
13353
297
                            let v38 = C::unpack_value_array_2(ctx, v37);
13354
297
                            let v311 = constructor_extend_to_gpr(ctx, v38.0, v5, &ExtendKind::Sign);
13355
297
                            let v266 = &constructor_put_masked_in_imm8_gpr(ctx, v38.1, v5);
13356
297
                            let v312 = constructor_x64_sar(ctx, v5, v311, v266);
13357
297
                            let v313 = constructor_output_gpr(ctx, v312);
13358
297
                            // Rule at src/isa/x64/lower.isle line 717.
13359
297
                            return Some(v313);
13360
0
                        }
13361
0
                    }
13362
                }
13363
                &Opcode::Fadd => {
13364
0
                    let v1 = C::first_result(ctx, arg0);
13365
0
                    if let Some(v2) = v1 {
13366
0
                        let v3 = C::value_type(ctx, v2);
13367
0
                        match v3 {
13368
                            F32 => {
13369
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13370
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13371
0
                                if let Some(v59) = v58 {
13372
0
                                    let v1261 = constructor_put_in_xmm(ctx, v38.1);
13373
0
                                    let v1272 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13374
0
                                    let v1273 = constructor_x64_addss(ctx, v1261, v1272);
13375
0
                                    let v1274 = constructor_output_xmm(ctx, v1273);
13376
0
                                    // Rule at src/isa/x64/lower.isle line 2525.
13377
0
                                    return Some(v1274);
13378
0
                                }
13379
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13380
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13381
0
                                let v1264 = constructor_x64_addss(ctx, v68, v69);
13382
0
                                let v1265 = constructor_output_xmm(ctx, v1264);
13383
0
                                // Rule at src/isa/x64/lower.isle line 2514.
13384
0
                                return Some(v1265);
13385
                            }
13386
                            F64 => {
13387
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13388
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13389
0
                                if let Some(v59) = v58 {
13390
0
                                    let v1261 = constructor_put_in_xmm(ctx, v38.1);
13391
0
                                    let v1272 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13392
0
                                    let v1275 = constructor_x64_addsd(ctx, v1261, v1272);
13393
0
                                    let v1276 = constructor_output_xmm(ctx, v1275);
13394
0
                                    // Rule at src/isa/x64/lower.isle line 2527.
13395
0
                                    return Some(v1276);
13396
0
                                }
13397
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13398
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13399
0
                                let v1266 = constructor_x64_addsd(ctx, v68, v69);
13400
0
                                let v1267 = constructor_output_xmm(ctx, v1266);
13401
0
                                // Rule at src/isa/x64/lower.isle line 2516.
13402
0
                                return Some(v1267);
13403
                            }
13404
                            F32X4 => {
13405
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13406
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13407
0
                                if let Some(v59) = v58 {
13408
0
                                    let v1261 = constructor_put_in_xmm(ctx, v38.1);
13409
0
                                    let v1272 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13410
0
                                    let v1277 = constructor_x64_addps(ctx, v1261, v1272);
13411
0
                                    let v1278 = constructor_output_xmm(ctx, v1277);
13412
0
                                    // Rule at src/isa/x64/lower.isle line 2529.
13413
0
                                    return Some(v1278);
13414
0
                                }
13415
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13416
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13417
0
                                let v1268 = constructor_x64_addps(ctx, v68, v69);
13418
0
                                let v1269 = constructor_output_xmm(ctx, v1268);
13419
0
                                // Rule at src/isa/x64/lower.isle line 2518.
13420
0
                                return Some(v1269);
13421
                            }
13422
                            F64X2 => {
13423
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13424
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13425
0
                                if let Some(v59) = v58 {
13426
0
                                    let v1261 = constructor_put_in_xmm(ctx, v38.1);
13427
0
                                    let v1272 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13428
0
                                    let v1279 = constructor_x64_addpd(ctx, v1261, v1272);
13429
0
                                    let v1280 = constructor_output_xmm(ctx, v1279);
13430
0
                                    // Rule at src/isa/x64/lower.isle line 2531.
13431
0
                                    return Some(v1280);
13432
0
                                }
13433
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13434
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13435
0
                                let v1270 = constructor_x64_addpd(ctx, v68, v69);
13436
0
                                let v1271 = constructor_output_xmm(ctx, v1270);
13437
0
                                // Rule at src/isa/x64/lower.isle line 2520.
13438
0
                                return Some(v1271);
13439
                            }
13440
0
                            _ => {}
13441
                        }
13442
0
                    }
13443
                }
13444
                &Opcode::Fsub => {
13445
0
                    let v1 = C::first_result(ctx, arg0);
13446
0
                    if let Some(v2) = v1 {
13447
0
                        let v3 = C::value_type(ctx, v2);
13448
0
                        match v3 {
13449
                            F32 => {
13450
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13451
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13452
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13453
0
                                let v1281 = constructor_x64_subss(ctx, v68, v69);
13454
0
                                let v1282 = constructor_output_xmm(ctx, v1281);
13455
0
                                // Rule at src/isa/x64/lower.isle line 2536.
13456
0
                                return Some(v1282);
13457
                            }
13458
                            F64 => {
13459
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13460
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13461
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13462
0
                                let v1283 = constructor_x64_subsd(ctx, v68, v69);
13463
0
                                let v1284 = constructor_output_xmm(ctx, v1283);
13464
0
                                // Rule at src/isa/x64/lower.isle line 2538.
13465
0
                                return Some(v1284);
13466
                            }
13467
                            F32X4 => {
13468
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13469
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13470
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13471
0
                                let v1285 = constructor_x64_subps(ctx, v68, v69);
13472
0
                                let v1286 = constructor_output_xmm(ctx, v1285);
13473
0
                                // Rule at src/isa/x64/lower.isle line 2540.
13474
0
                                return Some(v1286);
13475
                            }
13476
                            F64X2 => {
13477
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13478
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13479
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13480
0
                                let v1287 = constructor_x64_subpd(ctx, v68, v69);
13481
0
                                let v1288 = constructor_output_xmm(ctx, v1287);
13482
0
                                // Rule at src/isa/x64/lower.isle line 2542.
13483
0
                                return Some(v1288);
13484
                            }
13485
0
                            _ => {}
13486
                        }
13487
0
                    }
13488
                }
13489
                &Opcode::Fmul => {
13490
0
                    let v1 = C::first_result(ctx, arg0);
13491
0
                    if let Some(v2) = v1 {
13492
0
                        let v3 = C::value_type(ctx, v2);
13493
0
                        match v3 {
13494
                            F32 => {
13495
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13496
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13497
0
                                if let Some(v59) = v58 {
13498
0
                                    let v1261 = constructor_put_in_xmm(ctx, v38.1);
13499
0
                                    let v1272 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13500
0
                                    let v1297 = constructor_x64_mulss(ctx, v1261, v1272);
13501
0
                                    let v1298 = constructor_output_xmm(ctx, v1297);
13502
0
                                    // Rule at src/isa/x64/lower.isle line 2558.
13503
0
                                    return Some(v1298);
13504
0
                                }
13505
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13506
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13507
0
                                let v1289 = constructor_x64_mulss(ctx, v68, v69);
13508
0
                                let v1290 = constructor_output_xmm(ctx, v1289);
13509
0
                                // Rule at src/isa/x64/lower.isle line 2547.
13510
0
                                return Some(v1290);
13511
                            }
13512
                            F64 => {
13513
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13514
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13515
0
                                if let Some(v59) = v58 {
13516
0
                                    let v1261 = constructor_put_in_xmm(ctx, v38.1);
13517
0
                                    let v1272 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13518
0
                                    let v1299 = constructor_x64_mulsd(ctx, v1261, v1272);
13519
0
                                    let v1300 = constructor_output_xmm(ctx, v1299);
13520
0
                                    // Rule at src/isa/x64/lower.isle line 2560.
13521
0
                                    return Some(v1300);
13522
0
                                }
13523
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13524
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13525
0
                                let v1291 = constructor_x64_mulsd(ctx, v68, v69);
13526
0
                                let v1292 = constructor_output_xmm(ctx, v1291);
13527
0
                                // Rule at src/isa/x64/lower.isle line 2549.
13528
0
                                return Some(v1292);
13529
                            }
13530
                            F32X4 => {
13531
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13532
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13533
0
                                if let Some(v59) = v58 {
13534
0
                                    let v1261 = constructor_put_in_xmm(ctx, v38.1);
13535
0
                                    let v1272 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13536
0
                                    let v1301 = constructor_x64_mulps(ctx, v1261, v1272);
13537
0
                                    let v1302 = constructor_output_xmm(ctx, v1301);
13538
0
                                    // Rule at src/isa/x64/lower.isle line 2562.
13539
0
                                    return Some(v1302);
13540
0
                                }
13541
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13542
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13543
0
                                let v1293 = constructor_x64_mulps(ctx, v68, v69);
13544
0
                                let v1294 = constructor_output_xmm(ctx, v1293);
13545
0
                                // Rule at src/isa/x64/lower.isle line 2551.
13546
0
                                return Some(v1294);
13547
                            }
13548
                            F64X2 => {
13549
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13550
0
                                let v58 = &C::sinkable_load(ctx, v38.0);
13551
0
                                if let Some(v59) = v58 {
13552
0
                                    let v1261 = constructor_put_in_xmm(ctx, v38.1);
13553
0
                                    let v1272 = &constructor_sink_load_to_xmm_mem(ctx, v59);
13554
0
                                    let v1303 = constructor_x64_mulpd(ctx, v1261, v1272);
13555
0
                                    let v1304 = constructor_output_xmm(ctx, v1303);
13556
0
                                    // Rule at src/isa/x64/lower.isle line 2564.
13557
0
                                    return Some(v1304);
13558
0
                                }
13559
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13560
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13561
0
                                let v1295 = constructor_x64_mulpd(ctx, v68, v69);
13562
0
                                let v1296 = constructor_output_xmm(ctx, v1295);
13563
0
                                // Rule at src/isa/x64/lower.isle line 2553.
13564
0
                                return Some(v1296);
13565
                            }
13566
0
                            _ => {}
13567
                        }
13568
0
                    }
13569
                }
13570
                &Opcode::Fdiv => {
13571
0
                    let v1 = C::first_result(ctx, arg0);
13572
0
                    if let Some(v2) = v1 {
13573
0
                        let v3 = C::value_type(ctx, v2);
13574
0
                        match v3 {
13575
                            F32 => {
13576
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13577
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13578
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13579
0
                                let v1305 = constructor_x64_divss(ctx, v68, v69);
13580
0
                                let v1306 = constructor_output_xmm(ctx, v1305);
13581
0
                                // Rule at src/isa/x64/lower.isle line 2569.
13582
0
                                return Some(v1306);
13583
                            }
13584
                            F64 => {
13585
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13586
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13587
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13588
0
                                let v1307 = constructor_x64_divsd(ctx, v68, v69);
13589
0
                                let v1308 = constructor_output_xmm(ctx, v1307);
13590
0
                                // Rule at src/isa/x64/lower.isle line 2571.
13591
0
                                return Some(v1308);
13592
                            }
13593
                            F32X4 => {
13594
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13595
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13596
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13597
0
                                let v1309 = constructor_x64_divps(ctx, v68, v69);
13598
0
                                let v1310 = constructor_output_xmm(ctx, v1309);
13599
0
                                // Rule at src/isa/x64/lower.isle line 2573.
13600
0
                                return Some(v1310);
13601
                            }
13602
                            F64X2 => {
13603
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13604
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13605
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13606
0
                                let v1311 = constructor_x64_divpd(ctx, v68, v69);
13607
0
                                let v1312 = constructor_output_xmm(ctx, v1311);
13608
0
                                // Rule at src/isa/x64/lower.isle line 2575.
13609
0
                                return Some(v1312);
13610
                            }
13611
0
                            _ => {}
13612
                        }
13613
0
                    }
13614
                }
13615
                &Opcode::Fcopysign => {
13616
0
                    let v1 = C::first_result(ctx, arg0);
13617
0
                    if let Some(v2) = v1 {
13618
0
                        let v3 = C::value_type(ctx, v2);
13619
0
                        match v3 {
13620
                            F32 => {
13621
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13622
0
                                let v2093 = C::value_type(ctx, v38.0);
13623
0
                                if v2093 == F32 {
13624
0
                                    let v2143 = constructor_imm(ctx, F32, 0x80000000);
13625
0
                                    let v2144 = C::xmm_new(ctx, v2143);
13626
0
                                    let v2145 = &C::put_in_xmm_mem(ctx, v38.0);
13627
0
                                    let v2146 = constructor_x64_andnps(ctx, v2144, v2145);
13628
0
                                    let v2147 = &C::put_in_xmm_mem(ctx, v38.1);
13629
0
                                    let v2148 = constructor_x64_andps(ctx, v2144, v2147);
13630
0
                                    let v2149 = &C::xmm_to_xmm_mem(ctx, v2148);
13631
0
                                    let v2150 = constructor_x64_orps(ctx, v2146, v2149);
13632
0
                                    let v2151 = constructor_output_xmm(ctx, v2150);
13633
0
                                    // Rule at src/isa/x64/lower.isle line 3940.
13634
0
                                    return Some(v2151);
13635
0
                                }
13636
                            }
13637
                            F64 => {
13638
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13639
0
                                let v2093 = C::value_type(ctx, v38.0);
13640
0
                                if v2093 == F64 {
13641
0
                                    let v2152 = constructor_imm(ctx, F64, 0x8000000000000000);
13642
0
                                    let v2153 = C::xmm_new(ctx, v2152);
13643
0
                                    let v2145 = &C::put_in_xmm_mem(ctx, v38.0);
13644
0
                                    let v2154 = constructor_x64_andnpd(ctx, v2153, v2145);
13645
0
                                    let v2147 = &C::put_in_xmm_mem(ctx, v38.1);
13646
0
                                    let v2155 = constructor_x64_andpd(ctx, v2153, v2147);
13647
0
                                    let v2156 = &C::xmm_to_xmm_mem(ctx, v2155);
13648
0
                                    let v2157 = constructor_x64_orpd(ctx, v2154, v2156);
13649
0
                                    let v2158 = constructor_output_xmm(ctx, v2157);
13650
0
                                    // Rule at src/isa/x64/lower.isle line 3946.
13651
0
                                    return Some(v2158);
13652
0
                                }
13653
                            }
13654
0
                            _ => {}
13655
                        }
13656
0
                    }
13657
                }
13658
                &Opcode::Fmin => {
13659
0
                    let v1 = C::first_result(ctx, arg0);
13660
0
                    if let Some(v2) = v1 {
13661
0
                        let v3 = C::value_type(ctx, v2);
13662
0
                        match v3 {
13663
                            F32 => {
13664
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13665
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13666
0
                                let v444 = constructor_put_in_xmm(ctx, v38.1);
13667
0
                                let v1336 = constructor_xmm_min_max_seq(ctx, F32, true, v68, v444);
13668
0
                                let v1337 = constructor_output_xmm(ctx, v1336);
13669
0
                                // Rule at src/isa/x64/lower.isle line 2606.
13670
0
                                return Some(v1337);
13671
                            }
13672
                            F64 => {
13673
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13674
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13675
0
                                let v444 = constructor_put_in_xmm(ctx, v38.1);
13676
0
                                let v1338 = constructor_xmm_min_max_seq(ctx, F64, true, v68, v444);
13677
0
                                let v1339 = constructor_output_xmm(ctx, v1338);
13678
0
                                // Rule at src/isa/x64/lower.isle line 2608.
13679
0
                                return Some(v1339);
13680
                            }
13681
                            F32X4 => {
13682
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13683
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13684
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13685
0
                                let v1340 = constructor_x64_minps(ctx, v68, v69);
13686
0
                                let v1341 = constructor_put_in_xmm(ctx, v38.1);
13687
0
                                let v1342 = &C::put_in_xmm_mem(ctx, v38.0);
13688
0
                                let v1343 = constructor_x64_minps(ctx, v1341, v1342);
13689
0
                                let v1344 = &C::xmm_to_xmm_mem(ctx, v1343);
13690
0
                                let v1345 = constructor_x64_orps(ctx, v1340, v1344);
13691
0
                                let v1346 = &C::xmm_to_xmm_mem(ctx, v1343);
13692
0
                                let v1347 = constructor_x64_cmpps(ctx, v1345, v1346, &FcmpImm::Unordered);
13693
0
                                let v1348 = &C::xmm_to_xmm_mem(ctx, v1347);
13694
0
                                let v1349 = constructor_x64_orps(ctx, v1345, v1348);
13695
0
                                let v1351 = &C::xmi_imm(ctx, 0xA);
13696
0
                                let v1352 = constructor_x64_psrld(ctx, v1347, v1351);
13697
0
                                let v1353 = &C::xmm_to_xmm_mem(ctx, v1349);
13698
0
                                let v1354 = constructor_x64_andnps(ctx, v1352, v1353);
13699
0
                                let v1355 = constructor_output_xmm(ctx, v1354);
13700
0
                                // Rule at src/isa/x64/lower.isle line 2623.
13701
0
                                return Some(v1355);
13702
                            }
13703
                            F64X2 => {
13704
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13705
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13706
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13707
0
                                let v1356 = constructor_x64_minpd(ctx, v68, v69);
13708
0
                                let v1341 = constructor_put_in_xmm(ctx, v38.1);
13709
0
                                let v1342 = &C::put_in_xmm_mem(ctx, v38.0);
13710
0
                                let v1357 = constructor_x64_minpd(ctx, v1341, v1342);
13711
0
                                let v1358 = &C::xmm_to_xmm_mem(ctx, v1357);
13712
0
                                let v1359 = constructor_x64_orpd(ctx, v1356, v1358);
13713
0
                                let v1360 = &C::xmm_to_xmm_mem(ctx, v1357);
13714
0
                                let v1361 = constructor_x64_cmppd(ctx, v1356, v1360, &FcmpImm::Unordered);
13715
0
                                let v1362 = &C::xmm_to_xmm_mem(ctx, v1361);
13716
0
                                let v1363 = constructor_x64_orpd(ctx, v1359, v1362);
13717
0
                                let v1365 = &C::xmi_imm(ctx, 0xD);
13718
0
                                let v1366 = constructor_x64_psrlq(ctx, v1361, v1365);
13719
0
                                let v1367 = &C::xmm_to_xmm_mem(ctx, v1363);
13720
0
                                let v1368 = constructor_x64_andnpd(ctx, v1366, v1367);
13721
0
                                let v1369 = constructor_output_xmm(ctx, v1368);
13722
0
                                // Rule at src/isa/x64/lower.isle line 2666.
13723
0
                                return Some(v1369);
13724
                            }
13725
0
                            _ => {}
13726
                        }
13727
0
                    }
13728
                }
13729
                &Opcode::Fmax => {
13730
0
                    let v1 = C::first_result(ctx, arg0);
13731
0
                    if let Some(v2) = v1 {
13732
0
                        let v3 = C::value_type(ctx, v2);
13733
0
                        match v3 {
13734
                            F32 => {
13735
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13736
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13737
0
                                let v444 = constructor_put_in_xmm(ctx, v38.1);
13738
0
                                let v1371 = constructor_xmm_min_max_seq(ctx, F32, false, v68, v444);
13739
0
                                let v1372 = constructor_output_xmm(ctx, v1371);
13740
0
                                // Rule at src/isa/x64/lower.isle line 2678.
13741
0
                                return Some(v1372);
13742
                            }
13743
                            F64 => {
13744
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13745
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13746
0
                                let v444 = constructor_put_in_xmm(ctx, v38.1);
13747
0
                                let v1373 = constructor_xmm_min_max_seq(ctx, F64, false, v68, v444);
13748
0
                                let v1374 = constructor_output_xmm(ctx, v1373);
13749
0
                                // Rule at src/isa/x64/lower.isle line 2680.
13750
0
                                return Some(v1374);
13751
                            }
13752
                            F32X4 => {
13753
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13754
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13755
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13756
0
                                let v1375 = constructor_x64_maxps(ctx, v68, v69);
13757
0
                                let v1341 = constructor_put_in_xmm(ctx, v38.1);
13758
0
                                let v1342 = &C::put_in_xmm_mem(ctx, v38.0);
13759
0
                                let v1376 = constructor_x64_maxps(ctx, v1341, v1342);
13760
0
                                let v1377 = &C::xmm_to_xmm_mem(ctx, v1376);
13761
0
                                let v1378 = constructor_x64_xorps(ctx, v1375, v1377);
13762
0
                                let v1379 = &C::xmm_to_xmm_mem(ctx, v1378);
13763
0
                                let v1380 = constructor_x64_orps(ctx, v1375, v1379);
13764
0
                                let v1381 = &C::xmm_to_xmm_mem(ctx, v1378);
13765
0
                                let v1382 = constructor_x64_subps(ctx, v1380, v1381);
13766
0
                                let v1383 = &C::xmm_to_xmm_mem(ctx, v1380);
13767
0
                                let v1384 = constructor_x64_cmpps(ctx, v1380, v1383, &FcmpImm::Unordered);
13768
0
                                let v1385 = &C::xmi_imm(ctx, 0xA);
13769
0
                                let v1386 = constructor_x64_psrld(ctx, v1384, v1385);
13770
0
                                let v1387 = &C::xmm_to_xmm_mem(ctx, v1382);
13771
0
                                let v1388 = constructor_x64_andnps(ctx, v1386, v1387);
13772
0
                                let v1389 = constructor_output_xmm(ctx, v1388);
13773
0
                                // Rule at src/isa/x64/lower.isle line 2686.
13774
0
                                return Some(v1389);
13775
                            }
13776
                            F64X2 => {
13777
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13778
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
13779
0
                                let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13780
0
                                let v1390 = constructor_x64_maxpd(ctx, v68, v69);
13781
0
                                let v1341 = constructor_put_in_xmm(ctx, v38.1);
13782
0
                                let v1342 = &C::put_in_xmm_mem(ctx, v38.0);
13783
0
                                let v1391 = constructor_x64_maxpd(ctx, v1341, v1342);
13784
0
                                let v1392 = &C::xmm_to_xmm_mem(ctx, v1391);
13785
0
                                let v1393 = constructor_x64_xorpd(ctx, v1390, v1392);
13786
0
                                let v1394 = &C::xmm_to_xmm_mem(ctx, v1393);
13787
0
                                let v1395 = constructor_x64_orpd(ctx, v1390, v1394);
13788
0
                                let v1396 = &C::xmm_to_xmm_mem(ctx, v1393);
13789
0
                                let v1397 = constructor_x64_subpd(ctx, v1395, v1396);
13790
0
                                let v1398 = &C::xmm_to_xmm_mem(ctx, v1395);
13791
0
                                let v1399 = constructor_x64_cmppd(ctx, v1395, v1398, &FcmpImm::Unordered);
13792
0
                                let v1400 = &C::xmi_imm(ctx, 0xD);
13793
0
                                let v1401 = constructor_x64_psrlq(ctx, v1399, v1400);
13794
0
                                let v1402 = &C::xmm_to_xmm_mem(ctx, v1397);
13795
0
                                let v1403 = constructor_x64_andnpd(ctx, v1401, v1402);
13796
0
                                let v1404 = constructor_output_xmm(ctx, v1403);
13797
0
                                // Rule at src/isa/x64/lower.isle line 2729.
13798
0
                                return Some(v1404);
13799
                            }
13800
0
                            _ => {}
13801
                        }
13802
0
                    }
13803
                }
13804
                &Opcode::Snarrow => {
13805
0
                    let v1 = C::first_result(ctx, arg0);
13806
0
                    if let Some(v2) = v1 {
13807
0
                        let v3 = C::value_type(ctx, v2);
13808
0
                        match v3 {
13809
                            I8X16 => {
13810
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13811
0
                                let v2093 = C::value_type(ctx, v38.0);
13812
0
                                if v2093 == I16X8 {
13813
0
                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
13814
0
                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13815
0
                                    let v2094 = constructor_x64_packsswb(ctx, v68, v69);
13816
0
                                    let v2095 = constructor_output_xmm(ctx, v2094);
13817
0
                                    // Rule at src/isa/x64/lower.isle line 3826.
13818
0
                                    return Some(v2095);
13819
0
                                }
13820
                            }
13821
                            I16X8 => {
13822
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13823
0
                                let v2093 = C::value_type(ctx, v38.0);
13824
0
                                if v2093 == I32X4 {
13825
0
                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
13826
0
                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13827
0
                                    let v2096 = constructor_x64_packssdw(ctx, v68, v69);
13828
0
                                    let v2097 = constructor_output_xmm(ctx, v2096);
13829
0
                                    // Rule at src/isa/x64/lower.isle line 3829.
13830
0
                                    return Some(v2097);
13831
0
                                }
13832
                            }
13833
                            I32X4 => {
13834
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13835
0
                                let v171 = C::def_inst(ctx, v38.1);
13836
0
                                if let Some(v172) = v171 {
13837
0
                                    let v173 = &C::inst_data(ctx, v172);
13838
                                    if let &InstructionData::UnaryConst {
13839
0
                                        opcode: ref v2101,
13840
0
                                        constant_handle: v2102,
13841
0
                                    } = v173 {
13842
0
                                        if let &Opcode::Vconst = v2101 {
13843
0
                                            let v180 = C::def_inst(ctx, v38.0);
13844
0
                                            if let Some(v181) = v180 {
13845
0
                                                let v182 = &C::inst_data(ctx, v181);
13846
                                                if let &InstructionData::Unary {
13847
0
                                                    opcode: ref v183,
13848
0
                                                    arg: v184,
13849
0
                                                } = v182 {
13850
0
                                                    match v183 {
13851
                                                        &Opcode::FcvtToSintSat => {
13852
0
                                                            let v2098 = C::first_result(ctx, v181);
13853
0
                                                            if let Some(v2099) = v2098 {
13854
0
                                                                let v2100 = C::value_type(ctx, v2099);
13855
0
                                                                if v2100 == I64X2 {
13856
0
                                                                    let v2103 = C::u128_from_constant(ctx, v2102);
13857
0
                                                                    if let Some(v2104) = v2103 {
13858
0
                                                                        if v2104 == 0x0 {
13859
0
                                                                            let v185 = constructor_put_in_xmm(ctx, v184);
13860
0
                                                                            let v2105 = &C::xmm_to_xmm_mem(ctx, v185);
13861
0
                                                                            let v2106 = constructor_x64_cmppd(ctx, v185, v2105, &FcmpImm::Equal);
13862
0
                                                                            let v2108 = C::emit_u128_le_const(ctx, 0x41DFFFFFFFC0000041DFFFFFFFC00000);
13863
0
                                                                            let v2109 = &constructor_const_to_xmm_mem(ctx, v2108);
13864
0
                                                                            let v2110 = constructor_x64_andps(ctx, v2106, v2109);
13865
0
                                                                            let v2111 = &C::xmm_to_xmm_mem(ctx, v2110);
13866
0
                                                                            let v2112 = constructor_x64_minpd(ctx, v185, v2111);
13867
0
                                                                            let v2113 = &C::xmm_to_xmm_mem(ctx, v2112);
13868
0
                                                                            let v2114 = constructor_x64_cvttpd2dq(ctx, v2113);
13869
0
                                                                            let v2115 = constructor_output_xmm(ctx, v2114);
13870
0
                                                                            // Rule at src/isa/x64/lower.isle line 3838.
13871
0
                                                                            return Some(v2115);
13872
0
                                                                        }
13873
0
                                                                    }
13874
0
                                                                }
13875
0
                                                            }
13876
                                                        }
13877
                                                        &Opcode::X86Cvtt2dq => {
13878
0
                                                            let v2098 = C::first_result(ctx, v181);
13879
0
                                                            if let Some(v2099) = v2098 {
13880
0
                                                                let v2100 = C::value_type(ctx, v2099);
13881
0
                                                                if v2100 == I64X2 {
13882
0
                                                                    let v2103 = C::u128_from_constant(ctx, v2102);
13883
0
                                                                    if let Some(v2104) = v2103 {
13884
0
                                                                        if v2104 == 0x0 {
13885
0
                                                                            let v499 = &C::put_in_xmm_mem(ctx, v184);
13886
0
                                                                            let v2116 = constructor_x64_cvttpd2dq(ctx, v499);
13887
0
                                                                            let v2117 = constructor_output_xmm(ctx, v2116);
13888
0
                                                                            // Rule at src/isa/x64/lower.isle line 3862.
13889
0
                                                                            return Some(v2117);
13890
0
                                                                        }
13891
0
                                                                    }
13892
0
                                                                }
13893
0
                                                            }
13894
                                                        }
13895
0
                                                        _ => {}
13896
                                                    }
13897
0
                                                }
13898
0
                                            }
13899
0
                                        }
13900
0
                                    }
13901
0
                                }
13902
                            }
13903
0
                            _ => {}
13904
                        }
13905
0
                    }
13906
                }
13907
                &Opcode::Unarrow => {
13908
0
                    let v1 = C::first_result(ctx, arg0);
13909
0
                    if let Some(v2) = v1 {
13910
0
                        let v3 = C::value_type(ctx, v2);
13911
0
                        match v3 {
13912
                            I8X16 => {
13913
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13914
0
                                let v2093 = C::value_type(ctx, v38.0);
13915
0
                                if v2093 == I16X8 {
13916
0
                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
13917
0
                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13918
0
                                    let v2118 = constructor_x64_packuswb(ctx, v68, v69);
13919
0
                                    let v2119 = constructor_output_xmm(ctx, v2118);
13920
0
                                    // Rule at src/isa/x64/lower.isle line 3868.
13921
0
                                    return Some(v2119);
13922
0
                                }
13923
                            }
13924
                            I16X8 => {
13925
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
13926
0
                                let v2093 = C::value_type(ctx, v38.0);
13927
0
                                if v2093 == I32X4 {
13928
0
                                    let v441 = C::use_sse41(ctx);
13929
0
                                    if v441 == true {
13930
0
                                        let v68 = constructor_put_in_xmm(ctx, v38.0);
13931
0
                                        let v69 = &C::put_in_xmm_mem(ctx, v38.1);
13932
0
                                        let v2120 = constructor_x64_packusdw(ctx, v68, v69);
13933
0
                                        let v2121 = constructor_output_xmm(ctx, v2120);
13934
0
                                        // Rule at src/isa/x64/lower.isle line 3871.
13935
0
                                        return Some(v2121);
13936
0
                                    }
13937
0
                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
13938
0
                                    let v2122 = constructor_unarrow_i32x4_lanes_to_low_u16_lanes(ctx, v68);
13939
0
                                    let v2123 = constructor_put_in_xmm(ctx, v38.1);
13940
0
                                    let v2124 = constructor_unarrow_i32x4_lanes_to_low_u16_lanes(ctx, v2123);
13941
0
                                    let v2125 = &C::xmm_to_xmm_mem(ctx, v2124);
13942
0
                                    let v2126 = constructor_x64_punpcklqdq(ctx, v2122, v2125);
13943
0
                                    let v2127 = constructor_output_xmm(ctx, v2126);
13944
0
                                    // Rule at src/isa/x64/lower.isle line 3881.
13945
0
                                    return Some(v2127);
13946
0
                                }
13947
                            }
13948
0
                            _ => {}
13949
                        }
13950
0
                    }
13951
                }
13952
                &Opcode::Uunarrow => {
13953
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
13954
0
                    let v171 = C::def_inst(ctx, v38.1);
13955
0
                    if let Some(v172) = v171 {
13956
0
                        let v173 = &C::inst_data(ctx, v172);
13957
                        if let &InstructionData::UnaryConst {
13958
0
                            opcode: ref v2101,
13959
0
                            constant_handle: v2102,
13960
0
                        } = v173 {
13961
0
                            if let &Opcode::Vconst = v2101 {
13962
0
                                let v180 = C::def_inst(ctx, v38.0);
13963
0
                                if let Some(v181) = v180 {
13964
0
                                    let v182 = &C::inst_data(ctx, v181);
13965
                                    if let &InstructionData::Unary {
13966
0
                                        opcode: ref v183,
13967
0
                                        arg: v184,
13968
0
                                    } = v182 {
13969
0
                                        if let &Opcode::FcvtToUintSat = v183 {
13970
0
                                            let v481 = C::value_type(ctx, v184);
13971
0
                                            if v481 == F64X2 {
13972
0
                                                let v2103 = C::u128_from_constant(ctx, v2102);
13973
0
                                                if let Some(v2104) = v2103 {
13974
0
                                                    if v2104 == 0x0 {
13975
0
                                                        let v185 = constructor_put_in_xmm(ctx, v184);
13976
0
                                                        let v2589 = constructor_xmm_zero(ctx, F64X2);
13977
0
                                                        let v2590 = &C::xmm_to_xmm_mem(ctx, v2589);
13978
0
                                                        let v2591 = constructor_x64_maxpd(ctx, v185, v2590);
13979
0
                                                        let v2593 = C::emit_u128_le_const(ctx, 0x41EFFFFFFFE0000041EFFFFFFFE00000);
13980
0
                                                        let v2594 = &constructor_const_to_xmm_mem(ctx, v2593);
13981
0
                                                        let v2595 = constructor_x64_minpd(ctx, v2591, v2594);
13982
0
                                                        let v2596 = C::xmm_to_reg(ctx, v2595);
13983
0
                                                        let v2597 = &constructor_xmm_to_reg_mem(ctx, v2596);
13984
0
                                                        let v2598 = &C::xmm_mem_to_reg_mem(ctx, v2597);
13985
0
                                                        let v2599 = constructor_x64_round(ctx, F64X2, v2598, &RoundImm::RoundZero);
13986
0
                                                        let v2600 = C::emit_u128_le_const(ctx, 0x43300000000000004330000000000000);
13987
0
                                                        let v2601 = &constructor_const_to_xmm_mem(ctx, v2600);
13988
0
                                                        let v2602 = constructor_x64_addpd(ctx, v2599, v2601);
13989
0
                                                        let v2603 = &C::xmm_to_xmm_mem(ctx, v2589);
13990
0
                                                        let v2604 = constructor_x64_shufps(ctx, v2602, v2603, 0x88);
13991
0
                                                        let v2605 = constructor_output_xmm(ctx, v2604);
13992
0
                                                        // Rule at src/isa/x64/lower.isle line 4713.
13993
0
                                                        return Some(v2605);
13994
0
                                                    }
13995
0
                                                }
13996
0
                                            }
13997
0
                                        }
13998
0
                                    }
13999
0
                                }
14000
0
                            }
14001
0
                        }
14002
0
                    }
14003
                }
14004
                &Opcode::IaddPairwise => {
14005
0
                    let v1 = C::first_result(ctx, arg0);
14006
0
                    if let Some(v2) = v1 {
14007
0
                        let v3 = C::value_type(ctx, v2);
14008
0
                        match v3 {
14009
                            I8X16 => {
14010
0
                                let v1926 = C::emit_u128_le_const(ctx, 0xFF00FF00FF00FF00FF00FF00FF00FF);
14011
0
                                let v1927 = &constructor_const_to_xmm_mem(ctx, v1926);
14012
0
                                let v1928 = constructor_x64_movdqu_load(ctx, v1927);
14013
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
14014
0
                                let v1929 = constructor_put_in_xmm(ctx, v38.0);
14015
0
                                let v1930 = &C::xmm_to_xmm_mem(ctx, v1928);
14016
0
                                let v1931 = constructor_x64_pand(ctx, v1929, v1930);
14017
0
                                let v1932 = constructor_put_in_xmm(ctx, v38.1);
14018
0
                                let v1933 = &C::xmm_to_xmm_mem(ctx, v1928);
14019
0
                                let v1934 = constructor_x64_pand(ctx, v1932, v1933);
14020
0
                                let v1935 = &C::xmm_to_xmm_mem(ctx, v1934);
14021
0
                                let v1936 = constructor_x64_packuswb(ctx, v1931, v1935);
14022
0
                                let v1937 = constructor_put_in_xmm(ctx, v38.0);
14023
0
                                let v1939 = &C::xmi_imm(ctx, 0x8);
14024
0
                                let v1940 = constructor_x64_psrlw(ctx, v1937, v1939);
14025
0
                                let v1941 = constructor_put_in_xmm(ctx, v38.1);
14026
0
                                let v1942 = &C::xmi_imm(ctx, 0x8);
14027
0
                                let v1943 = constructor_x64_psrlw(ctx, v1941, v1942);
14028
0
                                let v1944 = &C::xmm_to_xmm_mem(ctx, v1943);
14029
0
                                let v1945 = constructor_x64_packuswb(ctx, v1940, v1944);
14030
0
                                let v1946 = &C::xmm_to_xmm_mem(ctx, v1945);
14031
0
                                let v1947 = constructor_x64_paddb(ctx, v1936, v1946);
14032
0
                                let v1948 = constructor_output_xmm(ctx, v1947);
14033
0
                                // Rule at src/isa/x64/lower.isle line 3615.
14034
0
                                return Some(v1948);
14035
                            }
14036
                            I16X8 => {
14037
0
                                let v525 = C::use_ssse3(ctx);
14038
0
                                if v525 == true {
14039
0
                                    let v38 = C::unpack_value_array_2(ctx, v37);
14040
0
                                    let v171 = C::def_inst(ctx, v38.1);
14041
0
                                    if let Some(v172) = v171 {
14042
0
                                        let v173 = &C::inst_data(ctx, v172);
14043
                                        if let &InstructionData::Unary {
14044
0
                                            opcode: ref v174,
14045
0
                                            arg: v175,
14046
0
                                        } = v173 {
14047
0
                                            match v174 {
14048
                                                &Opcode::SwidenHigh => {
14049
0
                                                    let v180 = C::def_inst(ctx, v38.0);
14050
0
                                                    if let Some(v181) = v180 {
14051
0
                                                        let v182 = &C::inst_data(ctx, v181);
14052
                                                        if let &InstructionData::Unary {
14053
0
                                                            opcode: ref v183,
14054
0
                                                            arg: v184,
14055
0
                                                        } = v182 {
14056
0
                                                            if let &Opcode::SwidenLow = v183 {
14057
0
                                                                if v175 == v184 {
14058
0
                                                                    let v481 = C::value_type(ctx, v184);
14059
0
                                                                    if v481 == I8X16 {
14060
0
                                                                        let v1985 = C::emit_u128_le_const(ctx, 0x1010101010101010101010101010101);
14061
0
                                                                        let v1986 = constructor_x64_xmm_load_const(ctx, I8X16, v1985);
14062
0
                                                                        let v1987 = &C::put_in_xmm_mem(ctx, v184);
14063
0
                                                                        let v1988 = constructor_x64_pmaddubsw(ctx, v1986, v1987);
14064
0
                                                                        let v1989 = constructor_output_xmm(ctx, v1988);
14065
0
                                                                        // Rule at src/isa/x64/lower.isle line 3677.
14066
0
                                                                        return Some(v1989);
14067
0
                                                                    }
14068
0
                                                                }
14069
0
                                                            }
14070
0
                                                        }
14071
0
                                                    }
14072
                                                }
14073
                                                &Opcode::UwidenHigh => {
14074
0
                                                    let v180 = C::def_inst(ctx, v38.0);
14075
0
                                                    if let Some(v181) = v180 {
14076
0
                                                        let v182 = &C::inst_data(ctx, v181);
14077
                                                        if let &InstructionData::Unary {
14078
0
                                                            opcode: ref v183,
14079
0
                                                            arg: v184,
14080
0
                                                        } = v182 {
14081
0
                                                            if let &Opcode::UwidenLow = v183 {
14082
0
                                                                if v175 == v184 {
14083
0
                                                                    let v481 = C::value_type(ctx, v184);
14084
0
                                                                    if v481 == I8X16 {
14085
0
                                                                        let v1985 = C::emit_u128_le_const(ctx, 0x1010101010101010101010101010101);
14086
0
                                                                        let v1996 = &constructor_const_to_xmm_mem(ctx, v1985);
14087
0
                                                                        let v1993 = constructor_put_in_xmm(ctx, v184);
14088
0
                                                                        let v1997 = constructor_x64_pmaddubsw(ctx, v1993, v1996);
14089
0
                                                                        let v1998 = constructor_output_xmm(ctx, v1997);
14090
0
                                                                        // Rule at src/isa/x64/lower.isle line 3695.
14091
0
                                                                        return Some(v1998);
14092
0
                                                                    }
14093
0
                                                                }
14094
0
                                                            }
14095
0
                                                        }
14096
0
                                                    }
14097
                                                }
14098
0
                                                _ => {}
14099
                                            }
14100
0
                                        }
14101
0
                                    }
14102
0
                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
14103
0
                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
14104
0
                                    let v1949 = constructor_x64_phaddw(ctx, v68, v69);
14105
0
                                    let v1950 = constructor_output_xmm(ctx, v1949);
14106
0
                                    // Rule at src/isa/x64/lower.isle line 3631.
14107
0
                                    return Some(v1950);
14108
0
                                }
14109
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
14110
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
14111
0
                                let v444 = constructor_put_in_xmm(ctx, v38.1);
14112
0
                                let v316 = &C::xmm_to_xmm_mem(ctx, v68);
14113
0
                                let v1952 = constructor_x64_pshuflw(ctx, v316, 0xE8);
14114
0
                                let v1953 = &C::xmm_to_xmm_mem(ctx, v1952);
14115
0
                                let v1954 = constructor_x64_pshufhw(ctx, v1953, 0xE8);
14116
0
                                let v1955 = &C::xmm_to_xmm_mem(ctx, v1954);
14117
0
                                let v1956 = constructor_x64_pshufd(ctx, v1955, 0xE8);
14118
0
                                let v1957 = &C::xmm_to_xmm_mem(ctx, v444);
14119
0
                                let v1958 = constructor_x64_pshuflw(ctx, v1957, 0xE8);
14120
0
                                let v1959 = &C::xmm_to_xmm_mem(ctx, v1958);
14121
0
                                let v1960 = constructor_x64_pshufhw(ctx, v1959, 0xE8);
14122
0
                                let v1961 = &C::xmm_to_xmm_mem(ctx, v1960);
14123
0
                                let v1962 = constructor_x64_pshufd(ctx, v1961, 0xE8);
14124
0
                                let v1963 = &C::xmm_to_xmm_mem(ctx, v1962);
14125
0
                                let v1964 = constructor_x64_punpcklqdq(ctx, v1956, v1963);
14126
0
                                let v1965 = &C::xmi_imm(ctx, 0x10);
14127
0
                                let v1966 = constructor_x64_psrad(ctx, v68, v1965);
14128
0
                                let v1967 = &C::xmi_imm(ctx, 0x10);
14129
0
                                let v1968 = constructor_x64_psrad(ctx, v444, v1967);
14130
0
                                let v1969 = &C::xmm_to_xmm_mem(ctx, v1968);
14131
0
                                let v1970 = constructor_x64_packssdw(ctx, v1966, v1969);
14132
0
                                let v1971 = &C::xmm_to_xmm_mem(ctx, v1970);
14133
0
                                let v1972 = constructor_x64_paddw(ctx, v1964, v1971);
14134
0
                                let v1973 = constructor_output_xmm(ctx, v1972);
14135
0
                                // Rule at src/isa/x64/lower.isle line 3635.
14136
0
                                return Some(v1973);
14137
                            }
14138
                            I32X4 => {
14139
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
14140
0
                                let v171 = C::def_inst(ctx, v38.1);
14141
0
                                if let Some(v172) = v171 {
14142
0
                                    let v173 = &C::inst_data(ctx, v172);
14143
0
                                    match v173 {
14144
                                        &InstructionData::Binary {
14145
0
                                            opcode: ref v2026,
14146
0
                                            args: ref v2027,
14147
0
                                        } => {
14148
0
                                            if let &Opcode::Imul = v2026 {
14149
0
                                                let v180 = C::def_inst(ctx, v38.0);
14150
0
                                                if let Some(v181) = v180 {
14151
0
                                                    let v182 = &C::inst_data(ctx, v181);
14152
                                                    if let &InstructionData::Binary {
14153
0
                                                        opcode: ref v2011,
14154
0
                                                        args: ref v2012,
14155
0
                                                    } = v182 {
14156
0
                                                        if let &Opcode::Imul = v2011 {
14157
0
                                                            let v2013 = C::unpack_value_array_2(ctx, v2012);
14158
0
                                                            let v2016 = C::def_inst(ctx, v2013.0);
14159
0
                                                            if let Some(v2017) = v2016 {
14160
0
                                                                let v2018 = &C::inst_data(ctx, v2017);
14161
                                                                if let &InstructionData::Unary {
14162
0
                                                                    opcode: ref v2019,
14163
0
                                                                    arg: v2020,
14164
0
                                                                } = v2018 {
14165
0
                                                                    if let &Opcode::SwidenLow = v2019 {
14166
0
                                                                        let v2021 = C::def_inst(ctx, v2013.1);
14167
0
                                                                        if let Some(v2022) = v2021 {
14168
0
                                                                            let v2023 = &C::inst_data(ctx, v2022);
14169
                                                                            if let &InstructionData::Unary {
14170
0
                                                                                opcode: ref v2024,
14171
0
                                                                                arg: v2025,
14172
0
                                                                            } = v2023 {
14173
0
                                                                                if let &Opcode::SwidenLow = v2024 {
14174
0
                                                                                    let v2028 = C::unpack_value_array_2(ctx, v2027);
14175
0
                                                                                    let v2031 = C::def_inst(ctx, v2028.0);
14176
0
                                                                                    if let Some(v2032) = v2031 {
14177
0
                                                                                        let v2033 = &C::inst_data(ctx, v2032);
14178
                                                                                        if let &InstructionData::Unary {
14179
0
                                                                                            opcode: ref v2034,
14180
0
                                                                                            arg: v2035,
14181
0
                                                                                        } = v2033 {
14182
0
                                                                                            if let &Opcode::SwidenHigh = v2034 {
14183
0
                                                                                                if v2020 == v2035 {
14184
0
                                                                                                    let v2036 = C::def_inst(ctx, v2028.1);
14185
0
                                                                                                    if let Some(v2037) = v2036 {
14186
0
                                                                                                        let v2038 = &C::inst_data(ctx, v2037);
14187
                                                                                                        if let &InstructionData::Unary {
14188
0
                                                                                                            opcode: ref v2039,
14189
0
                                                                                                            arg: v2040,
14190
0
                                                                                                        } = v2038 {
14191
0
                                                                                                            if let &Opcode::SwidenHigh = v2039 {
14192
0
                                                                                                                if v2025 == v2040 {
14193
0
                                                                                                                    let v2041 = constructor_put_in_xmm(ctx, v2020);
14194
0
                                                                                                                    let v2042 = &C::put_in_xmm_mem(ctx, v2025);
14195
0
                                                                                                                    let v2043 = constructor_x64_pmaddwd(ctx, v2041, v2042);
14196
0
                                                                                                                    let v2044 = constructor_output_xmm(ctx, v2043);
14197
0
                                                                                                                    // Rule at src/isa/x64/lower.isle line 3718.
14198
0
                                                                                                                    return Some(v2044);
14199
0
                                                                                                                }
14200
0
                                                                                                            }
14201
0
                                                                                                        }
14202
0
                                                                                                    }
14203
0
                                                                                                }
14204
0
                                                                                            }
14205
0
                                                                                        }
14206
0
                                                                                    }
14207
0
                                                                                }
14208
0
                                                                            }
14209
0
                                                                        }
14210
0
                                                                    }
14211
0
                                                                }
14212
0
                                                            }
14213
0
                                                        }
14214
0
                                                    }
14215
0
                                                }
14216
0
                                            }
14217
                                        }
14218
                                        &InstructionData::Unary {
14219
0
                                            opcode: ref v174,
14220
0
                                            arg: v175,
14221
0
                                        } => {
14222
0
                                            match v174 {
14223
                                                &Opcode::SwidenHigh => {
14224
0
                                                    let v180 = C::def_inst(ctx, v38.0);
14225
0
                                                    if let Some(v181) = v180 {
14226
0
                                                        let v182 = &C::inst_data(ctx, v181);
14227
                                                        if let &InstructionData::Unary {
14228
0
                                                            opcode: ref v183,
14229
0
                                                            arg: v184,
14230
0
                                                        } = v182 {
14231
0
                                                            if let &Opcode::SwidenLow = v183 {
14232
0
                                                                if v175 == v184 {
14233
0
                                                                    let v481 = C::value_type(ctx, v184);
14234
0
                                                                    if v481 == I16X8 {
14235
0
                                                                        let v1991 = C::emit_u128_le_const(ctx, 0x10001000100010001000100010001);
14236
0
                                                                        let v1992 = &constructor_const_to_xmm_mem(ctx, v1991);
14237
0
                                                                        let v1993 = constructor_put_in_xmm(ctx, v184);
14238
0
                                                                        let v1994 = constructor_x64_pmaddwd(ctx, v1993, v1992);
14239
0
                                                                        let v1995 = constructor_output_xmm(ctx, v1994);
14240
0
                                                                        // Rule at src/isa/x64/lower.isle line 3687.
14241
0
                                                                        return Some(v1995);
14242
0
                                                                    }
14243
0
                                                                }
14244
0
                                                            }
14245
0
                                                        }
14246
0
                                                    }
14247
                                                }
14248
                                                &Opcode::UwidenHigh => {
14249
0
                                                    let v180 = C::def_inst(ctx, v38.0);
14250
0
                                                    if let Some(v181) = v180 {
14251
0
                                                        let v182 = &C::inst_data(ctx, v181);
14252
                                                        if let &InstructionData::Unary {
14253
0
                                                            opcode: ref v183,
14254
0
                                                            arg: v184,
14255
0
                                                        } = v182 {
14256
0
                                                            if let &Opcode::UwidenLow = v183 {
14257
0
                                                                if v175 == v184 {
14258
0
                                                                    let v481 = C::value_type(ctx, v184);
14259
0
                                                                    if v481 == I16X8 {
14260
0
                                                                        let v2000 = C::emit_u128_le_const(ctx, 0x80008000800080008000800080008000);
14261
0
                                                                        let v2001 = &constructor_const_to_xmm_mem(ctx, v2000);
14262
0
                                                                        let v1993 = constructor_put_in_xmm(ctx, v184);
14263
0
                                                                        let v2002 = constructor_x64_pxor(ctx, v1993, v2001);
14264
0
                                                                        let v2003 = C::emit_u128_le_const(ctx, 0x10001000100010001000100010001);
14265
0
                                                                        let v2004 = &constructor_const_to_xmm_mem(ctx, v2003);
14266
0
                                                                        let v2005 = constructor_x64_pmaddwd(ctx, v2002, v2004);
14267
0
                                                                        let v2007 = C::emit_u128_le_const(ctx, 0x10000000100000001000000010000);
14268
0
                                                                        let v2008 = &constructor_const_to_xmm_mem(ctx, v2007);
14269
0
                                                                        let v2009 = constructor_x64_paddd(ctx, v2005, v2008);
14270
0
                                                                        let v2010 = constructor_output_xmm(ctx, v2009);
14271
0
                                                                        // Rule at src/isa/x64/lower.isle line 3704.
14272
0
                                                                        return Some(v2010);
14273
0
                                                                    }
14274
0
                                                                }
14275
0
                                                            }
14276
0
                                                        }
14277
0
                                                    }
14278
                                                }
14279
0
                                                _ => {}
14280
                                            }
14281
                                        }
14282
0
                                        _ => {}
14283
                                    }
14284
0
                                }
14285
0
                                let v525 = C::use_ssse3(ctx);
14286
0
                                if v525 == true {
14287
0
                                    let v68 = constructor_put_in_xmm(ctx, v38.0);
14288
0
                                    let v69 = &C::put_in_xmm_mem(ctx, v38.1);
14289
0
                                    let v1974 = constructor_x64_phaddd(ctx, v68, v69);
14290
0
                                    let v1975 = constructor_output_xmm(ctx, v1974);
14291
0
                                    // Rule at src/isa/x64/lower.isle line 3661.
14292
0
                                    return Some(v1975);
14293
0
                                }
14294
0
                                let v68 = constructor_put_in_xmm(ctx, v38.0);
14295
0
                                let v444 = constructor_put_in_xmm(ctx, v38.1);
14296
0
                                let v1976 = &C::xmm_to_xmm_mem(ctx, v444);
14297
0
                                let v1978 = constructor_x64_shufps(ctx, v68, v1976, 0x88);
14298
0
                                let v447 = &C::xmm_to_xmm_mem(ctx, v444);
14299
0
                                let v1980 = constructor_x64_shufps(ctx, v68, v447, 0xDD);
14300
0
                                let v1981 = &C::xmm_to_xmm_mem(ctx, v1980);
14301
0
                                let v1982 = constructor_x64_paddd(ctx, v1978, v1981);
14302
0
                                let v1983 = constructor_output_xmm(ctx, v1982);
14303
0
                                // Rule at src/isa/x64/lower.isle line 3665.
14304
0
                                return Some(v1983);
14305
                            }
14306
0
                            _ => {}
14307
                        }
14308
0
                    }
14309
                }
14310
                &Opcode::X86Pmaddubsw => {
14311
0
                    let v1 = C::first_result(ctx, arg0);
14312
0
                    if let Some(v2) = v1 {
14313
0
                        let v3 = C::value_type(ctx, v2);
14314
0
                        if v3 == I16X8 {
14315
0
                            let v525 = C::use_ssse3(ctx);
14316
0
                            if v525 == true {
14317
0
                                let v38 = C::unpack_value_array_2(ctx, v37);
14318
0
                                let v1261 = constructor_put_in_xmm(ctx, v38.1);
14319
0
                                let v177 = &C::put_in_xmm_mem(ctx, v38.0);
14320
0
                                let v1262 = constructor_x64_pmaddubsw(ctx, v1261, v177);
14321
0
                                let v1263 = constructor_output_xmm(ctx, v1262);
14322
0
                                // Rule at src/isa/x64/lower.isle line 2508.
14323
0
                                return Some(v1263);
14324
0
                            }
14325
0
                        }
14326
0
                    }
14327
                }
14328
                &Opcode::Iconcat => {
14329
0
                    let v38 = C::unpack_value_array_2(ctx, v37);
14330
0
                    let v2093 = C::value_type(ctx, v38.0);
14331
0
                    if v2093 == I64 {
14332
0
                        let v2542 = C::put_in_reg(ctx, v38.0);
14333
0
                        let v2543 = C::put_in_reg(ctx, v38.1);
14334
0
                        let v2544 = C::value_regs(ctx, v2542, v2543);
14335
0
                        let v2545 = C::output(ctx, v2544);
14336
0
                        // Rule at src/isa/x64/lower.isle line 4629.
14337
0
                        return Some(v2545);
14338
0
                    }
14339
                }
14340
0
                _ => {}
14341
            }
14342
        }
14343
        &InstructionData::BinaryImm8 {
14344
0
            opcode: ref v2378,
14345
0
            arg: v2379,
14346
0
            imm: v2380,
14347
0
        } => {
14348
0
            if let &Opcode::Extractlane = v2378 {
14349
0
                if v2380 == 0x0 {
14350
0
                    let v1 = C::first_result(ctx, arg0);
14351
0
                    if let Some(v2) = v1 {
14352
0
                        let v3 = C::value_type(ctx, v2);
14353
0
                        let v162 = C::ty_scalar_float(ctx, v3);
14354
0
                        if let Some(v163) = v162 {
14355
0
                            let v2381 = constructor_output_value(ctx, v2379);
14356
0
                            // Rule at src/isa/x64/lower.isle line 4392.
14357
0
                            return Some(v2381);
14358
0
                        }
14359
0
                    }
14360
0
                }
14361
0
                let v2382 = C::value_type(ctx, v2379);
14362
0
                match v2382 {
14363
                    I8X16 => {
14364
0
                        let v441 = C::use_sse41(ctx);
14365
0
                        if v441 == true {
14366
0
                            let v2389 = constructor_put_in_xmm(ctx, v2379);
14367
0
                            let v2383 = C::u8_from_uimm8(ctx, v2380);
14368
0
                            let v2390 = constructor_x64_pextrb(ctx, v2389, v2383);
14369
0
                            let v2391 = constructor_output_gpr(ctx, v2390);
14370
0
                            // Rule at src/isa/x64/lower.isle line 4407.
14371
0
                            return Some(v2391);
14372
0
                        }
14373
0
                        let v2383 = C::u8_from_uimm8(ctx, v2380);
14374
0
                        let v2392 = C::u8_and(ctx, v2383, 0x1);
14375
0
                        match v2392 {
14376
                            0x0 => {
14377
0
                                let v2389 = constructor_put_in_xmm(ctx, v2379);
14378
0
                                let v2393 = C::u8_shr(ctx, v2383, 0x1);
14379
0
                                let v2394 = constructor_x64_pextrw(ctx, v2389, v2393);
14380
0
                                let v2398 = constructor_output_gpr(ctx, v2394);
14381
0
                                // Rule at src/isa/x64/lower.isle line 4418.
14382
0
                                return Some(v2398);
14383
                            }
14384
                            0x1 => {
14385
0
                                let v2389 = constructor_put_in_xmm(ctx, v2379);
14386
0
                                let v2393 = C::u8_shr(ctx, v2383, 0x1);
14387
0
                                let v2394 = constructor_x64_pextrw(ctx, v2389, v2393);
14388
0
                                let v1216 = Imm8Reg::Imm8 {
14389
0
                                    imm: 0x8,
14390
0
                                };
14391
0
                                let v2395 = &C::imm8_reg_to_imm8_gpr(ctx, &v1216);
14392
0
                                let v2396 = constructor_x64_shr(ctx, I16, v2394, v2395);
14393
0
                                let v2397 = constructor_output_gpr(ctx, v2396);
14394
0
                                // Rule at src/isa/x64/lower.isle line 4411.
14395
0
                                return Some(v2397);
14396
                            }
14397
0
                            _ => {}
14398
                        }
14399
                    }
14400
                    I16X8 => {
14401
0
                        let v2389 = constructor_put_in_xmm(ctx, v2379);
14402
0
                        let v2383 = C::u8_from_uimm8(ctx, v2380);
14403
0
                        let v2399 = constructor_x64_pextrw(ctx, v2389, v2383);
14404
0
                        let v2400 = constructor_output_gpr(ctx, v2399);
14405
0
                        // Rule at src/isa/x64/lower.isle line 4423.
14406
0
                        return Some(v2400);
14407
                    }
14408
                    I32X4 => {
14409
0
                        let v441 = C::use_sse41(ctx);
14410
0
                        if v441 == true {
14411
0
                            let v2389 = constructor_put_in_xmm(ctx, v2379);
14412
0
                            let v2383 = C::u8_from_uimm8(ctx, v2380);
14413
0
                            let v2401 = constructor_x64_pextrd(ctx, v2389, v2383);
14414
0
                            let v2402 = constructor_output_gpr(ctx, v2401);
14415
0
                            // Rule at src/isa/x64/lower.isle line 4427.
14416
0
                            return Some(v2402);
14417
0
                        }
14418
0
                        if v2380 == 0x0 {
14419
0
                            let v2389 = constructor_put_in_xmm(ctx, v2379);
14420
0
                            let v2403 = constructor_x64_movd_to_gpr(ctx, v2389);
14421
0
                            let v2404 = constructor_output_gpr(ctx, v2403);
14422
0
                            // Rule at src/isa/x64/lower.isle line 4430.
14423
0
                            return Some(v2404);
14424
0
                        }
14425
0
                        let v2384 = &C::put_in_xmm_mem(ctx, v2379);
14426
0
                        let v2383 = C::u8_from_uimm8(ctx, v2380);
14427
0
                        let v2385 = constructor_x64_pshufd(ctx, v2384, v2383);
14428
0
                        let v2405 = constructor_x64_movd_to_gpr(ctx, v2385);
14429
0
                        let v2406 = constructor_output_gpr(ctx, v2405);
14430
0
                        // Rule at src/isa/x64/lower.isle line 4432.
14431
0
                        return Some(v2406);
14432
                    }
14433
                    I64X2 => {
14434
0
                        let v441 = C::use_sse41(ctx);
14435
0
                        if v441 == true {
14436
0
                            let v2389 = constructor_put_in_xmm(ctx, v2379);
14437
0
                            let v2383 = C::u8_from_uimm8(ctx, v2380);
14438
0
                            let v2407 = constructor_x64_pextrq(ctx, v2389, v2383);
14439
0
                            let v2408 = constructor_output_gpr(ctx, v2407);
14440
0
                            // Rule at src/isa/x64/lower.isle line 4436.
14441
0
                            return Some(v2408);
14442
0
                        }
14443
0
                        match v2380 {
14444
                            0x0 => {
14445
0
                                let v2389 = constructor_put_in_xmm(ctx, v2379);
14446
0
                                let v2409 = constructor_x64_movq_to_gpr(ctx, v2389);
14447
0
                                let v2410 = constructor_output_gpr(ctx, v2409);
14448
0
                                // Rule at src/isa/x64/lower.isle line 4439.
14449
0
                                return Some(v2410);
14450
                            }
14451
                            0x1 => {
14452
0
                                let v2384 = &C::put_in_xmm_mem(ctx, v2379);
14453
0
                                let v2411 = constructor_x64_pshufd(ctx, v2384, 0xE);
14454
0
                                let v2412 = constructor_x64_movq_to_gpr(ctx, v2411);
14455
0
                                let v2413 = constructor_output_gpr(ctx, v2412);
14456
0
                                // Rule at src/isa/x64/lower.isle line 4441.
14457
0
                                return Some(v2413);
14458
                            }
14459
0
                            _ => {}
14460
                        }
14461
                    }
14462
                    F32X4 => {
14463
0
                        let v2384 = &C::put_in_xmm_mem(ctx, v2379);
14464
0
                        let v2383 = C::u8_from_uimm8(ctx, v2380);
14465
0
                        let v2385 = constructor_x64_pshufd(ctx, v2384, v2383);
14466
0
                        let v2386 = constructor_output_xmm(ctx, v2385);
14467
0
                        // Rule at src/isa/x64/lower.isle line 4396.
14468
0
                        return Some(v2386);
14469
                    }
14470
                    F64X2 => {
14471
0
                        if v2380 == 0x1 {
14472
0
                            let v2384 = &C::put_in_xmm_mem(ctx, v2379);
14473
0
                            let v2387 = constructor_x64_pshufd(ctx, v2384, 0xEE);
14474
0
                            let v2388 = constructor_output_xmm(ctx, v2387);
14475
0
                            // Rule at src/isa/x64/lower.isle line 4400.
14476
0
                            return Some(v2388);
14477
0
                        }
14478
                    }
14479
0
                    _ => {}
14480
                }
14481
0
            }
14482
        }
14483
        &InstructionData::Call {
14484
261k
            opcode: ref v1770,
14485
261k
            args: v1771,
14486
261k
            func_ref: v1772,
14487
261k
        } => {
14488
261k
            match v1770 {
14489
                &Opcode::Call => {
14490
261k
                    let v1774 = C::func_ref_data(ctx, v1772);
14491
261k
                    let v1773 = C::value_list_slice(ctx, v1771);
14492
261k
                    let v1778 = C::gen_call(ctx, v1774.0, v1774.1, v1774.2, v1773);
14493
261k
                    // Rule at src/isa/x64/lower.isle line 3261.
14494
261k
                    return Some(v1778);
14495
                }
14496
                &Opcode::ReturnCall => {
14497
0
                    let v1774 = C::func_ref_data(ctx, v1772);
14498
0
                    let v1773 = C::value_list_slice(ctx, v1771);
14499
0
                    let v1788 = C::gen_return_call(ctx, v1774.0, v1774.1, v1774.2, v1773);
14500
0
                    // Rule at src/isa/x64/lower.isle line 3269.
14501
0
                    return Some(v1788);
14502
                }
14503
0
                _ => {}
14504
            }
14505
        }
14506
        &InstructionData::CallIndirect {
14507
74.8k
            opcode: ref v1779,
14508
74.8k
            args: v1780,
14509
74.8k
            sig_ref: v1781,
14510
74.8k
        } => {
14511
74.8k
            match v1779 {
14512
                &Opcode::CallIndirect => {
14513
74.8k
                    let v1782 = C::value_list_slice(ctx, v1780);
14514
74.8k
                    let v1783 = C::value_slice_unwrap(ctx, v1782);
14515
74.8k
                    if let Some(v1784) = v1783 {
14516
74.8k
                        let v1787 = C::gen_call_indirect(ctx, v1781, v1784.0, v1784.1);
14517
74.8k
                        // Rule at src/isa/x64/lower.isle line 3264.
14518
74.8k
                        return Some(v1787);
14519
0
                    }
14520
                }
14521
                &Opcode::ReturnCallIndirect => {
14522
0
                    let v1782 = C::value_list_slice(ctx, v1780);
14523
0
                    let v1783 = C::value_slice_unwrap(ctx, v1782);
14524
0
                    if let Some(v1784) = v1783 {
14525
0
                        let v1789 = C::gen_return_call_indirect(ctx, v1781, v1784.0, v1784.1);
14526
0
                        // Rule at src/isa/x64/lower.isle line 3272.
14527
0
                        return Some(v1789);
14528
0
                    }
14529
                }
14530
0
                _ => {}
14531
            }
14532
        }
14533
        &InstructionData::FloatCompare {
14534
0
            opcode: ref v975,
14535
0
            args: ref v976,
14536
0
            cond: ref v977,
14537
0
        } => {
14538
0
            if let &Opcode::Fcmp = v975 {
14539
0
                match v977 {
14540
                    &FloatCC::Equal => {
14541
0
                        let v978 = C::unpack_value_array_2(ctx, v976);
14542
0
                        let v981 = C::value_type(ctx, v978.0);
14543
0
                        let v987 = C::ty_vec128(ctx, v981);
14544
0
                        if let Some(v988) = v987 {
14545
0
                            let v989 = constructor_put_in_xmm(ctx, v978.0);
14546
0
                            let v990 = &C::put_in_xmm_mem(ctx, v978.1);
14547
0
                            let v992 = constructor_x64_cmpp(ctx, v988, v989, v990, &FcmpImm::Equal);
14548
0
                            let v993 = constructor_output_xmm(ctx, v992);
14549
0
                            // Rule at src/isa/x64/lower.isle line 2024.
14550
0
                            return Some(v993);
14551
0
                        }
14552
                    }
14553
                    &FloatCC::GreaterThan => {
14554
0
                        let v978 = C::unpack_value_array_2(ctx, v976);
14555
0
                        let v981 = C::value_type(ctx, v978.0);
14556
0
                        let v987 = C::ty_vec128(ctx, v981);
14557
0
                        if let Some(v988) = v987 {
14558
0
                            let v1015 = constructor_put_in_xmm(ctx, v978.1);
14559
0
                            let v1016 = &C::put_in_xmm_mem(ctx, v978.0);
14560
0
                            let v1017 = constructor_x64_cmpp(ctx, v988, v1015, v1016, &FcmpImm::LessThan);
14561
0
                            let v1018 = constructor_output_xmm(ctx, v1017);
14562
0
                            // Rule at src/isa/x64/lower.isle line 2044.
14563
0
                            return Some(v1018);
14564
0
                        }
14565
                    }
14566
                    &FloatCC::GreaterThanOrEqual => {
14567
0
                        let v978 = C::unpack_value_array_2(ctx, v976);
14568
0
                        let v981 = C::value_type(ctx, v978.0);
14569
0
                        let v987 = C::ty_vec128(ctx, v981);
14570
0
                        if let Some(v988) = v987 {
14571
0
                            let v1015 = constructor_put_in_xmm(ctx, v978.1);
14572
0
                            let v1016 = &C::put_in_xmm_mem(ctx, v978.0);
14573
0
                            let v1019 = constructor_x64_cmpp(ctx, v988, v1015, v1016, &FcmpImm::LessThanOrEqual);
14574
0
                            let v1020 = constructor_output_xmm(ctx, v1019);
14575
0
                            // Rule at src/isa/x64/lower.isle line 2046.
14576
0
                            return Some(v1020);
14577
0
                        }
14578
                    }
14579
                    &FloatCC::LessThan => {
14580
0
                        let v978 = C::unpack_value_array_2(ctx, v976);
14581
0
                        let v981 = C::value_type(ctx, v978.0);
14582
0
                        let v987 = C::ty_vec128(ctx, v981);
14583
0
                        if let Some(v988) = v987 {
14584
0
                            let v989 = constructor_put_in_xmm(ctx, v978.0);
14585
0
                            let v990 = &C::put_in_xmm_mem(ctx, v978.1);
14586
0
                            let v998 = constructor_x64_cmpp(ctx, v988, v989, v990, &FcmpImm::LessThan);
14587
0
                            let v999 = constructor_output_xmm(ctx, v998);
14588
0
                            // Rule at src/isa/x64/lower.isle line 2028.
14589
0
                            return Some(v999);
14590
0
                        }
14591
                    }
14592
                    &FloatCC::LessThanOrEqual => {
14593
0
                        let v978 = C::unpack_value_array_2(ctx, v976);
14594
0
                        let v981 = C::value_type(ctx, v978.0);
14595
0
                        let v987 = C::ty_vec128(ctx, v981);
14596
0
                        if let Some(v988) = v987 {
14597
0
                            let v989 = constructor_put_in_xmm(ctx, v978.0);
14598
0
                            let v990 = &C::put_in_xmm_mem(ctx, v978.1);
14599
0
                            let v1001 = constructor_x64_cmpp(ctx, v988, v989, v990, &FcmpImm::LessThanOrEqual);
14600
0
                            let v1002 = constructor_output_xmm(ctx, v1001);
14601
0
                            // Rule at src/isa/x64/lower.isle line 2030.
14602
0
                            return Some(v1002);
14603
0
                        }
14604
                    }
14605
                    &FloatCC::NotEqual => {
14606
0
                        let v978 = C::unpack_value_array_2(ctx, v976);
14607
0
                        let v981 = C::value_type(ctx, v978.0);
14608
0
                        let v987 = C::ty_vec128(ctx, v981);
14609
0
                        if let Some(v988) = v987 {
14610
0
                            let v989 = constructor_put_in_xmm(ctx, v978.0);
14611
0
                            let v990 = &C::put_in_xmm_mem(ctx, v978.1);
14612
0
                            let v995 = constructor_x64_cmpp(ctx, v988, v989, v990, &FcmpImm::NotEqual);
14613
0
                            let v996 = constructor_output_xmm(ctx, v995);
14614
0
                            // Rule at src/isa/x64/lower.isle line 2026.
14615
0
                            return Some(v996);
14616
0
                        }
14617
                    }
14618
                    &FloatCC::Ordered => {
14619
0
                        let v978 = C::unpack_value_array_2(ctx, v976);
14620
0
                        let v981 = C::value_type(ctx, v978.0);
14621
0
                        let v987 = C::ty_vec128(ctx, v981);
14622
0
                        if let Some(v988) = v987 {
14623
0
                            let v989 = constructor_put_in_xmm(ctx, v978.0);
14624
0
                            let v990 = &C::put_in_xmm_mem(ctx, v978.1);
14625
0
                            let v1004 = constructor_x64_cmpp(ctx, v988, v989, v990, &FcmpImm::Ordered);
14626
0
                            let v1005 = constructor_output_xmm(ctx, v1004);
14627
0
                            // Rule at src/isa/x64/lower.isle line 2032.
14628
0
                            return Some(v1005);
14629
0
                        }
14630
                    }
14631
                    &FloatCC::Unordered => {
14632
0
                        let v978 = C::unpack_value_array_2(ctx, v976);
14633
0
                        let v981 = C::value_type(ctx, v978.0);
14634
0
                        let v987 = C::ty_vec128(ctx, v981);
14635
0
                        if let Some(v988) = v987 {
14636
0
                            let v989 = constructor_put_in_xmm(ctx, v978.0);
14637
0
                            let v990 = &C::put_in_xmm_mem(ctx, v978.1);
14638
0
                            let v1007 = constructor_x64_cmpp(ctx, v988, v989, v990, &FcmpImm::Unordered);
14639
0
                            let v1008 = constructor_output_xmm(ctx, v1007);
14640
0
                            // Rule at src/isa/x64/lower.isle line 2034.
14641
0
                            return Some(v1008);
14642
0
                        }
14643
                    }
14644
                    &FloatCC::UnorderedOrGreaterThan => {
14645
0
                        let v978 = C::unpack_value_array_2(ctx, v976);
14646
0
                        let v981 = C::value_type(ctx, v978.0);
14647
0
                        let v987 = C::ty_vec128(ctx, v981);
14648
0
                        if let Some(v988) = v987 {
14649
0
                            let v989 = constructor_put_in_xmm(ctx, v978.0);
14650
0
                            let v990 = &C::put_in_xmm_mem(ctx, v978.1);
14651
0
                            let v1010 = constructor_x64_cmpp(ctx, v988, v989, v990, &FcmpImm::UnorderedOrGreaterThan);
14652
0
                            let v1011 = constructor_output_xmm(ctx, v1010);
14653
0
                            // Rule at src/isa/x64/lower.isle line 2036.
14654
0
                            return Some(v1011);
14655
0
                        }
14656
                    }
14657
                    &FloatCC::UnorderedOrGreaterThanOrEqual => {
14658
0
                        let v978 = C::unpack_value_array_2(ctx, v976);
14659
0
                        let v981 = C::value_type(ctx, v978.0);
14660
0
                        let v987 = C::ty_vec128(ctx, v981);
14661
0
                        if let Some(v988) = v987 {
14662
0
                            let v989 = constructor_put_in_xmm(ctx, v978.0);
14663
0
                            let v990 = &C::put_in_xmm_mem(ctx, v978.1);
14664
0
                            let v1013 = constructor_x64_cmpp(ctx, v988, v989, v990, &FcmpImm::UnorderedOrGreaterThanOrEqual);
14665
0
                            let v1014 = constructor_output_xmm(ctx, v1013);
14666
0
                            // Rule at src/isa/x64/lower.isle line 2038.
14667
0
                            return Some(v1014);
14668
0
                        }
14669
                    }
14670
                    &FloatCC::UnorderedOrLessThan => {
14671
0
                        let v978 = C::unpack_value_array_2(ctx, v976);
14672
0
                        let v981 = C::value_type(ctx, v978.0);
14673
0
                        let v987 = C::ty_vec128(ctx, v981);
14674
0
                        if let Some(v988) = v987 {
14675
0
                            let v1015 = constructor_put_in_xmm(ctx, v978.1);
14676
0
                            let v1016 = &C::put_in_xmm_mem(ctx, v978.0);
14677
0
                            let v1021 = constructor_x64_cmpp(ctx, v988, v1015, v1016, &FcmpImm::UnorderedOrGreaterThan);
14678
0
                            let v1022 = constructor_output_xmm(ctx, v1021);
14679
0
                            // Rule at src/isa/x64/lower.isle line 2048.
14680
0
                            return Some(v1022);
14681
0
                        }
14682
                    }
14683
                    &FloatCC::UnorderedOrLessThanOrEqual => {
14684
0
                        let v978 = C::unpack_value_array_2(ctx, v976);
14685
0
                        let v981 = C::value_type(ctx, v978.0);
14686
0
                        let v987 = C::ty_vec128(ctx, v981);
14687
0
                        if let Some(v988) = v987 {
14688
0
                            let v1015 = constructor_put_in_xmm(ctx, v978.1);
14689
0
                            let v1016 = &C::put_in_xmm_mem(ctx, v978.0);
14690
0
                            let v1023 = constructor_x64_cmpp(ctx, v988, v1015, v1016, &FcmpImm::UnorderedOrGreaterThanOrEqual);
14691
0
                            let v1024 = constructor_output_xmm(ctx, v1023);
14692
0
                            // Rule at src/isa/x64/lower.isle line 2050.
14693
0
                            return Some(v1024);
14694
0
                        }
14695
                    }
14696
0
                    _ => {}
14697
                }
14698
0
                let v978 = C::unpack_value_array_2(ctx, v976);
14699
0
                let v981 = C::value_type(ctx, v978.0);
14700
0
                let v982 = C::ty_scalar_float(ctx, v981);
14701
0
                if let Some(v983) = v982 {
14702
0
                    let v984 = &constructor_emit_fcmp(ctx, v977, v978.0, v978.1);
14703
0
                    let v985 = constructor_lower_fcmp_bool(ctx, v984);
14704
0
                    let v986 = C::output(ctx, v985);
14705
0
                    // Rule at src/isa/x64/lower.isle line 2017.
14706
0
                    return Some(v986);
14707
0
                }
14708
0
            }
14709
        }
14710
        &InstructionData::FuncAddr {
14711
0
            opcode: ref v1694,
14712
0
            func_ref: v1695,
14713
0
        } => {
14714
0
            if let &Opcode::FuncAddr = v1694 {
14715
0
                let v1696 = C::func_ref_data(ctx, v1695);
14716
0
                let v1701 = constructor_load_ext_name(ctx, v1696.1, 0x0, v1696.2);
14717
0
                let v1702 = constructor_output_reg(ctx, v1701);
14718
0
                // Rule at src/isa/x64/lower.isle line 3203.
14719
0
                return Some(v1702);
14720
0
            }
14721
        }
14722
        &InstructionData::IntAddTrap {
14723
0
            opcode: ref v809,
14724
0
            args: ref v810,
14725
0
            code: ref v811,
14726
0
        } => {
14727
0
            if let &Opcode::UaddOverflowTrap = v809 {
14728
0
                let v1 = C::first_result(ctx, arg0);
14729
0
                if let Some(v2) = v1 {
14730
0
                    let v3 = C::value_type(ctx, v2);
14731
0
                    let v4 = C::fits_in_64(ctx, v3);
14732
0
                    if let Some(v5) = v4 {
14733
0
                        let v812 = C::unpack_value_array_2(ctx, v810);
14734
0
                        let v828 = &C::sinkable_load(ctx, v812.0);
14735
0
                        if let Some(v829) = v828 {
14736
0
                            let v823 = constructor_put_in_gpr(ctx, v812.1);
14737
0
                            let v830 = &constructor_sink_load_to_gpr_mem_imm(ctx, v829);
14738
0
                            let v831 = &constructor_x64_add_with_flags_paired(ctx, v5, v823, v830);
14739
0
                            let v818 = &constructor_trap_if(ctx, &CC::B, v811);
14740
0
                            let v832 = constructor_with_flags(ctx, v831, v818);
14741
0
                            let v833 = C::output(ctx, v832);
14742
0
                            // Rule at src/isa/x64/lower.isle line 1805.
14743
0
                            return Some(v833);
14744
0
                        }
14745
0
                        let v821 = &C::simm32_from_value(ctx, v812.0);
14746
0
                        if let Some(v822) = v821 {
14747
0
                            let v823 = constructor_put_in_gpr(ctx, v812.1);
14748
0
                            let v824 = &constructor_x64_add_with_flags_paired(ctx, v5, v823, v822);
14749
0
                            let v825 = &constructor_trap_if(ctx, &CC::B, v811);
14750
0
                            let v826 = constructor_with_flags(ctx, v824, v825);
14751
0
                            let v827 = C::output(ctx, v826);
14752
0
                            // Rule at src/isa/x64/lower.isle line 1799.
14753
0
                            return Some(v827);
14754
0
                        }
14755
0
                        let v815 = constructor_put_in_gpr(ctx, v812.0);
14756
0
                        let v816 = &constructor_put_in_gpr_mem_imm(ctx, v812.1);
14757
0
                        let v817 = &constructor_x64_add_with_flags_paired(ctx, v5, v815, v816);
14758
0
                        let v818 = &constructor_trap_if(ctx, &CC::B, v811);
14759
0
                        let v819 = constructor_with_flags(ctx, v817, v818);
14760
0
                        let v820 = C::output(ctx, v819);
14761
0
                        // Rule at src/isa/x64/lower.isle line 1791.
14762
0
                        return Some(v820);
14763
0
                    }
14764
0
                }
14765
0
            }
14766
        }
14767
        &InstructionData::IntCompare {
14768
17.7k
            opcode: ref v838,
14769
17.7k
            args: ref v839,
14770
17.7k
            cond: ref v840,
14771
17.7k
        } => {
14772
17.7k
            if let &Opcode::Icmp = v838 {
14773
17.7k
                match v840 {
14774
                    &IntCC::Equal => {
14775
3.15k
                        let v841 = C::unpack_value_array_2(ctx, v839);
14776
3.15k
                        let v844 = C::value_type(ctx, v841.0);
14777
3.15k
                        let v892 = C::ty_vec128(ctx, v844);
14778
3.15k
                        if let Some(
v8930
) = v892 {
14779
0
                            let v894 = constructor_put_in_xmm(ctx, v841.0);
14780
0
                            let v895 = &C::put_in_xmm_mem(ctx, v841.1);
14781
0
                            let v896 = constructor_x64_pcmpeq(ctx, v893, v894, v895);
14782
0
                            let v897 = constructor_output_xmm(ctx, v896);
14783
0
                            // Rule at src/isa/x64/lower.isle line 1867.
14784
0
                            return Some(v897);
14785
3.15k
                        }
14786
                    }
14787
                    &IntCC::NotEqual => {
14788
2.95k
                        let v841 = C::unpack_value_array_2(ctx, v839);
14789
2.95k
                        let v844 = C::value_type(ctx, v841.0);
14790
2.95k
                        let v892 = C::ty_vec128(ctx, v844);
14791
2.95k
                        if let Some(
v8930
) = v892 {
14792
0
                            let v894 = constructor_put_in_xmm(ctx, v841.0);
14793
0
                            let v895 = &C::put_in_xmm_mem(ctx, v841.1);
14794
0
                            let v896 = constructor_x64_pcmpeq(ctx, v893, v894, v895);
14795
0
                            let v898 = constructor_vector_all_ones(ctx);
14796
0
                            let v899 = &C::xmm_to_xmm_mem(ctx, v898);
14797
0
                            let v900 = constructor_x64_pxor(ctx, v896, v899);
14798
0
                            let v901 = constructor_output_xmm(ctx, v900);
14799
0
                            // Rule at src/isa/x64/lower.isle line 1872.
14800
0
                            return Some(v901);
14801
2.95k
                        }
14802
                    }
14803
                    &IntCC::SignedGreaterThan => {
14804
324
                        let v1 = C::first_result(ctx, arg0);
14805
324
                        if let Some(v2) = v1 {
14806
324
                            let v3 = C::value_type(ctx, v2);
14807
324
                            if v3 == I8 {
14808
324
                                let v841 = C::unpack_value_array_2(ctx, v839);
14809
324
                                let v862 = C::def_inst(ctx, v841.0);
14810
324
                                if let Some(v863) = v862 {
14811
324
                                    let v864 = &C::inst_data(ctx, v863);
14812
                                    if let &InstructionData::UnaryImm {
14813
0
                                        opcode: ref v865,
14814
0
                                        imm: v866,
14815
324
                                    } = v864 {
14816
0
                                        if let &Opcode::Iconst = v865 {
14817
0
                                            let v867 = C::u64_from_imm64(ctx, v866);
14818
0
                                            if v867 == 0x0 {
14819
0
                                                let v868 = C::value_type(ctx, v841.1);
14820
0
                                                match v868 {
14821
                                                    I32 => {
14822
0
                                                        let v869 = constructor_put_in_gpr(ctx, v841.1);
14823
0
                                                        let v881 = Imm8Reg::Imm8 {
14824
0
                                                            imm: 0x1F,
14825
0
                                                        };
14826
0
                                                        let v882 = &C::imm8_reg_to_imm8_gpr(ctx, &v881);
14827
0
                                                        let v885 = constructor_x64_shr(ctx, I32, v869, v882);
14828
0
                                                        let v886 = constructor_output_gpr(ctx, v885);
14829
0
                                                        // Rule at src/isa/x64/lower.isle line 1851.
14830
0
                                                        return Some(v886);
14831
                                                    }
14832
                                                    I64 => {
14833
0
                                                        let v869 = constructor_put_in_gpr(ctx, v841.1);
14834
0
                                                        let v858 = Imm8Reg::Imm8 {
14835
0
                                                            imm: 0x3F,
14836
0
                                                        };
14837
0
                                                        let v859 = &C::imm8_reg_to_imm8_gpr(ctx, &v858);
14838
0
                                                        let v870 = constructor_x64_shr(ctx, I64, v869, v859);
14839
0
                                                        let v871 = constructor_output_gpr(ctx, v870);
14840
0
                                                        // Rule at src/isa/x64/lower.isle line 1835.
14841
0
                                                        return Some(v871);
14842
                                                    }
14843
0
                                                    _ => {}
14844
                                                }
14845
0
                                            }
14846
0
                                        }
14847
324
                                    }
14848
0
                                }
14849
0
                            }
14850
0
                        }
14851
324
                        let v841 = C::unpack_value_array_2(ctx, v839);
14852
324
                        let v844 = C::value_type(ctx, v841.0);
14853
324
                        let v892 = C::ty_vec128(ctx, v844);
14854
324
                        if let Some(
v8930
) = v892 {
14855
0
                            let v894 = constructor_put_in_xmm(ctx, v841.0);
14856
0
                            let v895 = &C::put_in_xmm_mem(ctx, v841.1);
14857
0
                            let v902 = constructor_x64_pcmpgt(ctx, v893, v894, v895);
14858
0
                            let v903 = constructor_output_xmm(ctx, v902);
14859
0
                            // Rule at src/isa/x64/lower.isle line 1879.
14860
0
                            return Some(v903);
14861
324
                        }
14862
                    }
14863
                    &IntCC::SignedGreaterThanOrEqual => {
14864
4
                        let v1 = C::first_result(ctx, arg0);
14865
4
                        if let Some(v2) = v1 {
14866
4
                            let v3 = C::value_type(ctx, v2);
14867
4
                            if v3 == I8 {
14868
4
                                let v841 = C::unpack_value_array_2(ctx, v839);
14869
4
                                let v844 = C::value_type(ctx, v841.0);
14870
4
                                match v844 {
14871
                                    I32 => {
14872
4
                                        let v850 = C::def_inst(ctx, v841.1);
14873
4
                                        if let Some(v851) = v850 {
14874
4
                                            let v852 = &C::inst_data(ctx, v851);
14875
                                            if let &InstructionData::UnaryImm {
14876
4
                                                opcode: ref v853,
14877
4
                                                imm: v854,
14878
4
                                            } = v852 {
14879
4
                                                if let &Opcode::Iconst = v853 {
14880
4
                                                    let v855 = C::u64_from_imm64(ctx, v854);
14881
4
                                                    if v855 == 0x0 {
14882
4
                                                        let v856 = constructor_put_in_gpr(ctx, v841.0);
14883
4
                                                        let v876 = constructor_x64_not(ctx, I64, v856);
14884
4
                                                        let v881 = Imm8Reg::Imm8 {
14885
4
                                                            imm: 0x1F,
14886
4
                                                        };
14887
4
                                                        let v887 = &C::imm8_reg_to_imm8_gpr(ctx, &v881);
14888
4
                                                        let v890 = constructor_x64_shr(ctx, I32, v876, v887);
14889
4
                                                        let v891 = constructor_output_gpr(ctx, v890);
14890
4
                                                        // Rule at src/isa/x64/lower.isle line 1859.
14891
4
                                                        return Some(v891);
14892
0
                                                    }
14893
0
                                                }
14894
0
                                            }
14895
0
                                        }
14896
                                    }
14897
                                    I64 => {
14898
0
                                        let v850 = C::def_inst(ctx, v841.1);
14899
0
                                        if let Some(v851) = v850 {
14900
0
                                            let v852 = &C::inst_data(ctx, v851);
14901
                                            if let &InstructionData::UnaryImm {
14902
0
                                                opcode: ref v853,
14903
0
                                                imm: v854,
14904
0
                                            } = v852 {
14905
0
                                                if let &Opcode::Iconst = v853 {
14906
0
                                                    let v855 = C::u64_from_imm64(ctx, v854);
14907
0
                                                    if v855 == 0x0 {
14908
0
                                                        let v856 = constructor_put_in_gpr(ctx, v841.0);
14909
0
                                                        let v876 = constructor_x64_not(ctx, I64, v856);
14910
0
                                                        let v858 = Imm8Reg::Imm8 {
14911
0
                                                            imm: 0x3F,
14912
0
                                                        };
14913
0
                                                        let v873 = &C::imm8_reg_to_imm8_gpr(ctx, &v858);
14914
0
                                                        let v877 = constructor_x64_shr(ctx, I64, v876, v873);
14915
0
                                                        let v878 = constructor_output_gpr(ctx, v877);
14916
0
                                                        // Rule at src/isa/x64/lower.isle line 1843.
14917
0
                                                        return Some(v878);
14918
0
                                                    }
14919
0
                                                }
14920
0
                                            }
14921
0
                                        }
14922
                                    }
14923
0
                                    _ => {}
14924
                                }
14925
0
                            }
14926
0
                        }
14927
0
                        let v841 = C::unpack_value_array_2(ctx, v839);
14928
0
                        let v844 = C::value_type(ctx, v841.0);
14929
0
                        let v892 = C::ty_vec128(ctx, v844);
14930
0
                        if let Some(v893) = v892 {
14931
0
                            let v936 = constructor_has_pmaxs(ctx, v893);
14932
0
                            if v936 == true {
14933
0
                                let v894 = constructor_put_in_xmm(ctx, v841.0);
14934
0
                                let v919 = constructor_put_in_xmm(ctx, v841.0);
14935
0
                                let v937 = &C::put_in_xmm_mem(ctx, v841.1);
14936
0
                                let v938 = constructor_x64_pmaxs(ctx, v893, v919, v937);
14937
0
                                let v939 = &C::xmm_to_xmm_mem(ctx, v938);
14938
0
                                let v940 = constructor_x64_pcmpeq(ctx, v893, v894, v939);
14939
0
                                let v941 = constructor_output_xmm(ctx, v940);
14940
0
                                // Rule at src/isa/x64/lower.isle line 1929.
14941
0
                                return Some(v941);
14942
0
                            }
14943
0
                            let v904 = constructor_put_in_xmm(ctx, v841.1);
14944
0
                            let v905 = &C::put_in_xmm_mem(ctx, v841.0);
14945
0
                            let v906 = constructor_x64_pcmpgt(ctx, v893, v904, v905);
14946
0
                            let v898 = constructor_vector_all_ones(ctx);
14947
0
                            let v899 = &C::xmm_to_xmm_mem(ctx, v898);
14948
0
                            let v942 = constructor_x64_pxor(ctx, v906, v899);
14949
0
                            let v943 = constructor_output_xmm(ctx, v942);
14950
0
                            // Rule at src/isa/x64/lower.isle line 1935.
14951
0
                            return Some(v943);
14952
0
                        }
14953
                    }
14954
                    &IntCC::SignedLessThan => {
14955
147
                        let v1 = C::first_result(ctx, arg0);
14956
147
                        if let Some(v2) = v1 {
14957
147
                            let v3 = C::value_type(ctx, v2);
14958
147
                            if v3 == I8 {
14959
147
                                let v841 = C::unpack_value_array_2(ctx, v839);
14960
147
                                let v844 = C::value_type(ctx, v841.0);
14961
147
                                match v844 {
14962
                                    I32 => {
14963
147
                                        let v850 = C::def_inst(ctx, v841.1);
14964
147
                                        if let Some(
v851146
) = v850 {
14965
146
                                            let v852 = &C::inst_data(ctx, v851);
14966
                                            if let &InstructionData::UnaryImm {
14967
140
                                                opcode: ref v853,
14968
140
                                                imm: v854,
14969
146
                                            } = v852 {
14970
140
                                                if let &Opcode::Iconst = v853 {
14971
140
                                                    let v855 = C::u64_from_imm64(ctx, v854);
14972
140
                                                    if v855 == 0x0 {
14973
140
                                                        let v856 = constructor_put_in_gpr(ctx, v841.0);
14974
140
                                                        let v881 = Imm8Reg::Imm8 {
14975
140
                                                            imm: 0x1F,
14976
140
                                                        };
14977
140
                                                        let v882 = &C::imm8_reg_to_imm8_gpr(ctx, &v881);
14978
140
                                                        let v883 = constructor_x64_shr(ctx, I32, v856, v882);
14979
140
                                                        let v884 = constructor_output_gpr(ctx, v883);
14980
140
                                                        // Rule at src/isa/x64/lower.isle line 1847.
14981
140
                                                        return Some(v884);
14982
0
                                                    }
14983
0
                                                }
14984
6
                                            }
14985
1
                                        }
14986
                                    }
14987
                                    I64 => {
14988
0
                                        let v850 = C::def_inst(ctx, v841.1);
14989
0
                                        if let Some(v851) = v850 {
14990
0
                                            let v852 = &C::inst_data(ctx, v851);
14991
                                            if let &InstructionData::UnaryImm {
14992
0
                                                opcode: ref v853,
14993
0
                                                imm: v854,
14994
0
                                            } = v852 {
14995
0
                                                if let &Opcode::Iconst = v853 {
14996
0
                                                    let v855 = C::u64_from_imm64(ctx, v854);
14997
0
                                                    if v855 == 0x0 {
14998
0
                                                        let v856 = constructor_put_in_gpr(ctx, v841.0);
14999
0
                                                        let v858 = Imm8Reg::Imm8 {
15000
0
                                                            imm: 0x3F,
15001
0
                                                        };
15002
0
                                                        let v859 = &C::imm8_reg_to_imm8_gpr(ctx, &v858);
15003
0
                                                        let v860 = constructor_x64_shr(ctx, I64, v856, v859);
15004
0
                                                        let v861 = constructor_output_gpr(ctx, v860);
15005
0
                                                        // Rule at src/isa/x64/lower.isle line 1831.
15006
0
                                                        return Some(v861);
15007
0
                                                    }
15008
0
                                                }
15009
0
                                            }
15010
0
                                        }
15011
                                    }
15012
0
                                    _ => {}
15013
                                }
15014
0
                            }
15015
0
                        }
15016
7
                        let v841 = C::unpack_value_array_2(ctx, v839);
15017
7
                        let v844 = C::value_type(ctx, v841.0);
15018
7
                        let v892 = C::ty_vec128(ctx, v844);
15019
7
                        if let Some(
v8930
) = v892 {
15020
0
                            let v904 = constructor_put_in_xmm(ctx, v841.1);
15021
0
                            let v905 = &C::put_in_xmm_mem(ctx, v841.0);
15022
0
                            let v906 = constructor_x64_pcmpgt(ctx, v893, v904, v905);
15023
0
                            let v907 = constructor_output_xmm(ctx, v906);
15024
0
                            // Rule at src/isa/x64/lower.isle line 1884.
15025
0
                            return Some(v907);
15026
7
                        }
15027
                    }
15028
                    &IntCC::SignedLessThanOrEqual => {
15029
0
                        let v1 = C::first_result(ctx, arg0);
15030
0
                        if let Some(v2) = v1 {
15031
0
                            let v3 = C::value_type(ctx, v2);
15032
0
                            if v3 == I8 {
15033
0
                                let v841 = C::unpack_value_array_2(ctx, v839);
15034
0
                                let v862 = C::def_inst(ctx, v841.0);
15035
0
                                if let Some(v863) = v862 {
15036
0
                                    let v864 = &C::inst_data(ctx, v863);
15037
                                    if let &InstructionData::UnaryImm {
15038
0
                                        opcode: ref v865,
15039
0
                                        imm: v866,
15040
0
                                    } = v864 {
15041
0
                                        if let &Opcode::Iconst = v865 {
15042
0
                                            let v867 = C::u64_from_imm64(ctx, v866);
15043
0
                                            if v867 == 0x0 {
15044
0
                                                let v868 = C::value_type(ctx, v841.1);
15045
0
                                                match v868 {
15046
                                                    I32 => {
15047
0
                                                        let v869 = constructor_put_in_gpr(ctx, v841.1);
15048
0
                                                        let v872 = constructor_x64_not(ctx, I64, v869);
15049
0
                                                        let v881 = Imm8Reg::Imm8 {
15050
0
                                                            imm: 0x1F,
15051
0
                                                        };
15052
0
                                                        let v887 = &C::imm8_reg_to_imm8_gpr(ctx, &v881);
15053
0
                                                        let v888 = constructor_x64_shr(ctx, I32, v872, v887);
15054
0
                                                        let v889 = constructor_output_gpr(ctx, v888);
15055
0
                                                        // Rule at src/isa/x64/lower.isle line 1855.
15056
0
                                                        return Some(v889);
15057
                                                    }
15058
                                                    I64 => {
15059
0
                                                        let v869 = constructor_put_in_gpr(ctx, v841.1);
15060
0
                                                        let v872 = constructor_x64_not(ctx, I64, v869);
15061
0
                                                        let v858 = Imm8Reg::Imm8 {
15062
0
                                                            imm: 0x3F,
15063
0
                                                        };
15064
0
                                                        let v873 = &C::imm8_reg_to_imm8_gpr(ctx, &v858);
15065
0
                                                        let v874 = constructor_x64_shr(ctx, I64, v872, v873);
15066
0
                                                        let v875 = constructor_output_gpr(ctx, v874);
15067
0
                                                        // Rule at src/isa/x64/lower.isle line 1839.
15068
0
                                                        return Some(v875);
15069
                                                    }
15070
0
                                                    _ => {}
15071
                                                }
15072
0
                                            }
15073
0
                                        }
15074
0
                                    }
15075
0
                                }
15076
0
                            }
15077
0
                        }
15078
0
                        let v841 = C::unpack_value_array_2(ctx, v839);
15079
0
                        let v844 = C::value_type(ctx, v841.0);
15080
0
                        let v892 = C::ty_vec128(ctx, v844);
15081
0
                        if let Some(v893) = v892 {
15082
0
                            let v944 = constructor_has_pmins(ctx, v893);
15083
0
                            if v944 == true {
15084
0
                                let v894 = constructor_put_in_xmm(ctx, v841.0);
15085
0
                                let v919 = constructor_put_in_xmm(ctx, v841.0);
15086
0
                                let v937 = &C::put_in_xmm_mem(ctx, v841.1);
15087
0
                                let v945 = constructor_x64_pmins(ctx, v893, v919, v937);
15088
0
                                let v946 = &C::xmm_to_xmm_mem(ctx, v945);
15089
0
                                let v947 = constructor_x64_pcmpeq(ctx, v893, v894, v946);
15090
0
                                let v948 = constructor_output_xmm(ctx, v947);
15091
0
                                // Rule at src/isa/x64/lower.isle line 1941.
15092
0
                                return Some(v948);
15093
0
                            }
15094
0
                            let v894 = constructor_put_in_xmm(ctx, v841.0);
15095
0
                            let v895 = &C::put_in_xmm_mem(ctx, v841.1);
15096
0
                            let v902 = constructor_x64_pcmpgt(ctx, v893, v894, v895);
15097
0
                            let v898 = constructor_vector_all_ones(ctx);
15098
0
                            let v899 = &C::xmm_to_xmm_mem(ctx, v898);
15099
0
                            let v949 = constructor_x64_pxor(ctx, v902, v899);
15100
0
                            let v950 = constructor_output_xmm(ctx, v949);
15101
0
                            // Rule at src/isa/x64/lower.isle line 1946.
15102
0
                            return Some(v950);
15103
0
                        }
15104
                    }
15105
                    &IntCC::UnsignedGreaterThan => {
15106
3.45k
                        let v841 = C::unpack_value_array_2(ctx, v839);
15107
3.45k
                        let v844 = C::value_type(ctx, v841.0);
15108
3.45k
                        let v892 = C::ty_vec128(ctx, v844);
15109
3.45k
                        if let Some(
v8930
) = v892 {
15110
0
                            let v908 = constructor_has_pmaxu(ctx, v893);
15111
0
                            if v908 == true {
15112
0
                                let v894 = constructor_put_in_xmm(ctx, v841.0);
15113
0
                                let v909 = constructor_put_in_xmm(ctx, v841.1);
15114
0
                                let v910 = &C::xmm_to_xmm_mem(ctx, v909);
15115
0
                                let v911 = constructor_x64_pmaxu(ctx, v893, v894, v910);
15116
0
                                let v912 = &C::xmm_to_xmm_mem(ctx, v909);
15117
0
                                let v913 = constructor_x64_pcmpeq(ctx, v893, v911, v912);
15118
0
                                let v914 = constructor_vector_all_ones(ctx);
15119
0
                                let v915 = &C::xmm_to_xmm_mem(ctx, v914);
15120
0
                                let v916 = constructor_x64_pxor(ctx, v913, v915);
15121
0
                                let v917 = constructor_output_xmm(ctx, v916);
15122
0
                                // Rule at src/isa/x64/lower.isle line 1891.
15123
0
                                return Some(v917);
15124
0
                            }
15125
0
                            let v918 = constructor_flip_high_bit_mask(ctx, v893);
15126
0
                            let v919 = constructor_put_in_xmm(ctx, v841.0);
15127
0
                            let v920 = &C::xmm_to_xmm_mem(ctx, v918);
15128
0
                            let v921 = constructor_x64_pxor(ctx, v919, v920);
15129
0
                            let v922 = constructor_put_in_xmm(ctx, v841.1);
15130
0
                            let v923 = &C::xmm_to_xmm_mem(ctx, v918);
15131
0
                            let v924 = constructor_x64_pxor(ctx, v922, v923);
15132
0
                            let v925 = &C::xmm_to_xmm_mem(ctx, v924);
15133
0
                            let v926 = constructor_x64_pcmpgt(ctx, v893, v921, v925);
15134
0
                            let v927 = constructor_output_xmm(ctx, v926);
15135
0
                            // Rule at src/isa/x64/lower.isle line 1901.
15136
0
                            return Some(v927);
15137
3.45k
                        }
15138
                    }
15139
                    &IntCC::UnsignedGreaterThanOrEqual => {
15140
257
                        let v841 = C::unpack_value_array_2(ctx, v839);
15141
257
                        let v844 = C::value_type(ctx, v841.0);
15142
257
                        let v892 = C::ty_vec128(ctx, v844);
15143
257
                        if let Some(
v8930
) = v892 {
15144
0
                            let v908 = constructor_has_pmaxu(ctx, v893);
15145
0
                            if v908 == true {
15146
0
                                let v894 = constructor_put_in_xmm(ctx, v841.0);
15147
0
                                let v919 = constructor_put_in_xmm(ctx, v841.0);
15148
0
                                let v937 = &C::put_in_xmm_mem(ctx, v841.1);
15149
0
                                let v951 = constructor_x64_pmaxu(ctx, v893, v919, v937);
15150
0
                                let v952 = &C::xmm_to_xmm_mem(ctx, v951);
15151
0
                                let v953 = constructor_x64_pcmpeq(ctx, v893, v894, v952);
15152
0
                                let v954 = constructor_output_xmm(ctx, v953);
15153
0
                                // Rule at src/isa/x64/lower.isle line 1951.
15154
0
                                return Some(v954);
15155
0
                            }
15156
257
                        }
15157
257
                        if v844 == I16X8 {
15158
0
                            let v904 = constructor_put_in_xmm(ctx, v841.1);
15159
0
                            let v905 = &C::put_in_xmm_mem(ctx, v841.0);
15160
0
                            let v955 = constructor_x64_psubusw(ctx, v904, v905);
15161
0
                            let v956 = constructor_xmm_zero(ctx, I16X8);
15162
0
                            let v957 = &C::xmm_to_xmm_mem(ctx, v956);
15163
0
                            let v958 = constructor_x64_pcmpeqw(ctx, v955, v957);
15164
0
                            let v959 = constructor_output_xmm(ctx, v958);
15165
0
                            // Rule at src/isa/x64/lower.isle line 1957.
15166
0
                            return Some(v959);
15167
257
                        }
15168
257
                        if let Some(
v8930
) = v892 {
15169
0
                            let v918 = constructor_flip_high_bit_mask(ctx, v893);
15170
0
                            let v919 = constructor_put_in_xmm(ctx, v841.0);
15171
0
                            let v920 = &C::xmm_to_xmm_mem(ctx, v918);
15172
0
                            let v921 = constructor_x64_pxor(ctx, v919, v920);
15173
0
                            let v922 = constructor_put_in_xmm(ctx, v841.1);
15174
0
                            let v923 = &C::xmm_to_xmm_mem(ctx, v918);
15175
0
                            let v924 = constructor_x64_pxor(ctx, v922, v923);
15176
0
                            let v933 = &C::xmm_to_xmm_mem(ctx, v921);
15177
0
                            let v934 = constructor_x64_pcmpgt(ctx, v893, v924, v933);
15178
0
                            let v960 = constructor_vector_all_ones(ctx);
15179
0
                            let v961 = &C::xmm_to_xmm_mem(ctx, v960);
15180
0
                            let v962 = constructor_x64_pxor(ctx, v934, v961);
15181
0
                            let v963 = constructor_output_xmm(ctx, v962);
15182
0
                            // Rule at src/isa/x64/lower.isle line 1963.
15183
0
                            return Some(v963);
15184
257
                        }
15185
                    }
15186
                    &IntCC::UnsignedLessThan => {
15187
7.17k
                        let v841 = C::unpack_value_array_2(ctx, v839);
15188
7.17k
                        let v844 = C::value_type(ctx, v841.0);
15189
7.17k
                        let v892 = C::ty_vec128(ctx, v844);
15190
7.17k
                        if let Some(
v8930
) = v892 {
15191
0
                            let v928 = constructor_has_pminu(ctx, v893);
15192
0
                            if v928 == true {
15193
0
                                let v894 = constructor_put_in_xmm(ctx, v841.0);
15194
0
                                let v909 = constructor_put_in_xmm(ctx, v841.1);
15195
0
                                let v910 = &C::xmm_to_xmm_mem(ctx, v909);
15196
0
                                let v929 = constructor_x64_pminu(ctx, v893, v894, v910);
15197
0
                                let v912 = &C::xmm_to_xmm_mem(ctx, v909);
15198
0
                                let v930 = constructor_x64_pcmpeq(ctx, v893, v929, v912);
15199
0
                                let v914 = constructor_vector_all_ones(ctx);
15200
0
                                let v915 = &C::xmm_to_xmm_mem(ctx, v914);
15201
0
                                let v931 = constructor_x64_pxor(ctx, v930, v915);
15202
0
                                let v932 = constructor_output_xmm(ctx, v931);
15203
0
                                // Rule at src/isa/x64/lower.isle line 1909.
15204
0
                                return Some(v932);
15205
0
                            }
15206
0
                            let v918 = constructor_flip_high_bit_mask(ctx, v893);
15207
0
                            let v919 = constructor_put_in_xmm(ctx, v841.0);
15208
0
                            let v920 = &C::xmm_to_xmm_mem(ctx, v918);
15209
0
                            let v921 = constructor_x64_pxor(ctx, v919, v920);
15210
0
                            let v922 = constructor_put_in_xmm(ctx, v841.1);
15211
0
                            let v923 = &C::xmm_to_xmm_mem(ctx, v918);
15212
0
                            let v924 = constructor_x64_pxor(ctx, v922, v923);
15213
0
                            let v933 = &C::xmm_to_xmm_mem(ctx, v921);
15214
0
                            let v934 = constructor_x64_pcmpgt(ctx, v893, v924, v933);
15215
0
                            let v935 = constructor_output_xmm(ctx, v934);
15216
0
                            // Rule at src/isa/x64/lower.isle line 1920.
15217
0
                            return Some(v935);
15218
7.17k
                        }
15219
                    }
15220
                    &IntCC::UnsignedLessThanOrEqual => {
15221
274
                        let v841 = C::unpack_value_array_2(ctx, v839);
15222
274
                        let v844 = C::value_type(ctx, v841.0);
15223
274
                        let v892 = C::ty_vec128(ctx, v844);
15224
274
                        if let Some(
v8930
) = v892 {
15225
0
                            let v928 = constructor_has_pminu(ctx, v893);
15226
0
                            if v928 == true {
15227
0
                                let v894 = constructor_put_in_xmm(ctx, v841.0);
15228
0
                                let v919 = constructor_put_in_xmm(ctx, v841.0);
15229
0
                                let v937 = &C::put_in_xmm_mem(ctx, v841.1);
15230
0
                                let v964 = constructor_x64_pminu(ctx, v893, v919, v937);
15231
0
                                let v965 = &C::xmm_to_xmm_mem(ctx, v964);
15232
0
                                let v966 = constructor_x64_pcmpeq(ctx, v893, v894, v965);
15233
0
                                let v967 = constructor_output_xmm(ctx, v966);
15234
0
                                // Rule at src/isa/x64/lower.isle line 1974.
15235
0
                                return Some(v967);
15236
0
                            }
15237
274
                        }
15238
274
                        if v844 == I16X8 {
15239
0
                            let v894 = constructor_put_in_xmm(ctx, v841.0);
15240
0
                            let v895 = &C::put_in_xmm_mem(ctx, v841.1);
15241
0
                            let v968 = constructor_x64_psubusw(ctx, v894, v895);
15242
0
                            let v969 = constructor_xmm_zero(ctx, I8X16);
15243
0
                            let v970 = &C::xmm_to_xmm_mem(ctx, v969);
15244
0
                            let v971 = constructor_x64_pcmpeqw(ctx, v968, v970);
15245
0
                            let v972 = constructor_output_xmm(ctx, v971);
15246
0
                            // Rule at src/isa/x64/lower.isle line 1981.
15247
0
                            return Some(v972);
15248
274
                        }
15249
274
                        if let Some(
v8930
) = v892 {
15250
0
                            let v918 = constructor_flip_high_bit_mask(ctx, v893);
15251
0
                            let v919 = constructor_put_in_xmm(ctx, v841.0);
15252
0
                            let v920 = &C::xmm_to_xmm_mem(ctx, v918);
15253
0
                            let v921 = constructor_x64_pxor(ctx, v919, v920);
15254
0
                            let v922 = constructor_put_in_xmm(ctx, v841.1);
15255
0
                            let v923 = &C::xmm_to_xmm_mem(ctx, v918);
15256
0
                            let v924 = constructor_x64_pxor(ctx, v922, v923);
15257
0
                            let v925 = &C::xmm_to_xmm_mem(ctx, v924);
15258
0
                            let v926 = constructor_x64_pcmpgt(ctx, v893, v921, v925);
15259
0
                            let v960 = constructor_vector_all_ones(ctx);
15260
0
                            let v961 = &C::xmm_to_xmm_mem(ctx, v960);
15261
0
                            let v973 = constructor_x64_pxor(ctx, v926, v961);
15262
0
                            let v974 = constructor_output_xmm(ctx, v973);
15263
0
                            // Rule at src/isa/x64/lower.isle line 1989.
15264
0
                            return Some(v974);
15265
274
                        }
15266
                    }
15267
0
                    _ => {}
15268
                }
15269
17.5k
                let v841 = C::unpack_value_array_2(ctx, v839);
15270
17.5k
                let v844 = C::value_type(ctx, v841.0);
15271
17.5k
                if v844 == I128 {
15272
0
                    let v847 = &constructor_emit_cmp(ctx, v840, v841.0, v841.1);
15273
0
                    let v848 = constructor_lower_icmp_bool(ctx, v847);
15274
0
                    let v849 = C::output(ctx, v848);
15275
0
                    // Rule at src/isa/x64/lower.isle line 1827.
15276
0
                    return Some(v849);
15277
17.5k
                }
15278
17.5k
                let v845 = C::fits_in_64(ctx, v844);
15279
17.5k
                if let Some(v846) = v845 {
15280
17.5k
                    let v847 = &constructor_emit_cmp(ctx, v840, v841.0, v841.1);
15281
17.5k
                    let v848 = constructor_lower_icmp_bool(ctx, v847);
15282
17.5k
                    let v849 = C::output(ctx, v848);
15283
17.5k
                    // Rule at src/isa/x64/lower.isle line 1824.
15284
17.5k
                    return Some(v849);
15285
0
                }
15286
0
            }
15287
        }
15288
        &InstructionData::Load {
15289
1.17M
            opcode: ref v1491,
15290
1.17M
            arg: v1492,
15291
1.17M
            flags: v1493,
15292
1.17M
            offset: v1494,
15293
1.17M
        } => {
15294
1.17M
            match v1491 {
15295
                &Opcode::Load => {
15296
1.09M
                    let v1 = C::first_result(ctx, arg0);
15297
1.09M
                    if let Some(v2) = v1 {
15298
1.09M
                        let v3 = C::value_type(ctx, v2);
15299
1.09M
                        match v3 {
15300
                            F32 => {
15301
0
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15302
0
                                let v1523 = &C::amode_to_synthetic_amode(ctx, v1504);
15303
0
                                let v1524 = constructor_x64_movss_load(ctx, v1523);
15304
0
                                let v1525 = constructor_output_xmm(ctx, v1524);
15305
0
                                // Rule at src/isa/x64/lower.isle line 2887.
15306
0
                                return Some(v1525);
15307
                            }
15308
                            F64 => {
15309
0
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15310
0
                                let v1523 = &C::amode_to_synthetic_amode(ctx, v1504);
15311
0
                                let v1526 = constructor_x64_movsd_load(ctx, v1523);
15312
0
                                let v1527 = constructor_output_xmm(ctx, v1526);
15313
0
                                // Rule at src/isa/x64/lower.isle line 2889.
15314
0
                                return Some(v1527);
15315
                            }
15316
                            F32X4 => {
15317
0
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15318
0
                                let v1523 = &C::amode_to_synthetic_amode(ctx, v1504);
15319
0
                                let v1528 = constructor_x64_movups_load(ctx, v1523);
15320
0
                                let v1529 = constructor_output_xmm(ctx, v1528);
15321
0
                                // Rule at src/isa/x64/lower.isle line 2891.
15322
0
                                return Some(v1529);
15323
                            }
15324
                            F64X2 => {
15325
0
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15326
0
                                let v1523 = &C::amode_to_synthetic_amode(ctx, v1504);
15327
0
                                let v1530 = constructor_x64_movupd_load(ctx, v1523);
15328
0
                                let v1531 = constructor_output_xmm(ctx, v1530);
15329
0
                                // Rule at src/isa/x64/lower.isle line 2893.
15330
0
                                return Some(v1531);
15331
                            }
15332
1.09M
                            _ => {}
15333
1.09M
                        }
15334
1.09M
                        let v1502 = C::ty_int_ref_64(ctx, v3);
15335
1.09M
                        if let Some(
v1503521k
) = v1502 {
15336
521k
                            let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15337
521k
                            let v1505 = constructor_x64_mov(ctx, v1504);
15338
521k
                            let v1506 = constructor_output_reg(ctx, v1505);
15339
521k
                            // Rule at src/isa/x64/lower.isle line 2865.
15340
521k
                            return Some(v1506);
15341
578k
                        }
15342
578k
                        let v758 = C::ty_vec128(ctx, v3);
15343
578k
                        if let Some(
v7590
) = v758 {
15344
0
                            let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15345
0
                            let v1532 = &constructor_amode_to_xmm_mem(ctx, v1504);
15346
0
                            let v1533 = constructor_x64_movdqu_load(ctx, v1532);
15347
0
                            let v1534 = constructor_output_xmm(ctx, v1533);
15348
0
                            // Rule at src/isa/x64/lower.isle line 2895.
15349
0
                            return Some(v1534);
15350
578k
                        }
15351
578k
                        if v3 == I128 {
15352
0
                            let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15353
0
                            let v1536 = &C::amode_offset(ctx, v1504, 0x8);
15354
0
                            let v1537 = constructor_x64_mov(ctx, v1504);
15355
0
                            let v1538 = constructor_x64_mov(ctx, v1536);
15356
0
                            let v1539 = C::value_regs(ctx, v1537, v1538);
15357
0
                            let v1540 = C::output(ctx, v1539);
15358
0
                            // Rule at src/isa/x64/lower.isle line 2899.
15359
0
                            return Some(v1540);
15360
578k
                        }
15361
578k
                        let v1245 = C::fits_in_32(ctx, v3);
15362
578k
                        if let Some(v1246) = v1245 {
15363
578k
                            let v1488 = &C::type_register_class(ctx, v3);
15364
578k
                            if let Some(v1489) = v1488 {
15365
                                if let &RegisterClass::Gpr {
15366
578k
                                    single_register: v1490,
15367
578k
                                } = v1489 {
15368
578k
                                    let v1495 = C::ty_bits_u16(ctx, v1246);
15369
578k
                                    let v1497 = &C::ext_mode(ctx, v1495, 0x40);
15370
578k
                                    let v1498 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15371
578k
                                    let v1499 = &constructor_amode_to_gpr_mem(ctx, v1498);
15372
578k
                                    let v1500 = constructor_x64_movzx(ctx, v1497, v1499);
15373
578k
                                    let v1501 = constructor_output_gpr(ctx, v1500);
15374
578k
                                    // Rule at src/isa/x64/lower.isle line 2861.
15375
578k
                                    return Some(v1501);
15376
0
                                }
15377
0
                            }
15378
0
                        }
15379
0
                    }
15380
                }
15381
                &Opcode::Uload8 => {
15382
51.0k
                    let v1 = C::first_result(ctx, arg0);
15383
51.0k
                    if let Some(v2) = v1 {
15384
51.0k
                        let v3 = C::value_type(ctx, v2);
15385
51.0k
                        let v1488 = &C::type_register_class(ctx, v3);
15386
51.0k
                        if let Some(v1489) = v1488 {
15387
                            if let &RegisterClass::Gpr {
15388
51.0k
                                single_register: v1490,
15389
51.0k
                            } = v1489 {
15390
51.0k
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15391
51.0k
                                let v1508 = &constructor_amode_to_gpr_mem(ctx, v1504);
15392
51.0k
                                let v1509 = constructor_x64_movzx(ctx, &ExtMode::BQ, v1508);
15393
51.0k
                                let v1510 = constructor_output_gpr(ctx, v1509);
15394
51.0k
                                // Rule at src/isa/x64/lower.isle line 2870.
15395
51.0k
                                return Some(v1510);
15396
0
                            }
15397
0
                        }
15398
0
                    }
15399
                }
15400
                &Opcode::Sload8 => {
15401
726
                    let v1 = C::first_result(ctx, arg0);
15402
726
                    if let Some(v2) = v1 {
15403
726
                        let v3 = C::value_type(ctx, v2);
15404
726
                        let v1488 = &C::type_register_class(ctx, v3);
15405
726
                        if let Some(v1489) = v1488 {
15406
                            if let &RegisterClass::Gpr {
15407
726
                                single_register: v1490,
15408
726
                            } = v1489 {
15409
726
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15410
726
                                let v1508 = &constructor_amode_to_gpr_mem(ctx, v1504);
15411
726
                                let v1511 = constructor_x64_movsx(ctx, &ExtMode::BQ, v1508);
15412
726
                                let v1512 = constructor_output_gpr(ctx, v1511);
15413
726
                                // Rule at src/isa/x64/lower.isle line 2872.
15414
726
                                return Some(v1512);
15415
0
                            }
15416
0
                        }
15417
0
                    }
15418
                }
15419
                &Opcode::Uload16 => {
15420
16.4k
                    let v1 = C::first_result(ctx, arg0);
15421
16.4k
                    if let Some(v2) = v1 {
15422
16.4k
                        let v3 = C::value_type(ctx, v2);
15423
16.4k
                        let v1488 = &C::type_register_class(ctx, v3);
15424
16.4k
                        if let Some(v1489) = v1488 {
15425
                            if let &RegisterClass::Gpr {
15426
16.4k
                                single_register: v1490,
15427
16.4k
                            } = v1489 {
15428
16.4k
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15429
16.4k
                                let v1508 = &constructor_amode_to_gpr_mem(ctx, v1504);
15430
16.4k
                                let v1514 = constructor_x64_movzx(ctx, &ExtMode::WQ, v1508);
15431
16.4k
                                let v1515 = constructor_output_gpr(ctx, v1514);
15432
16.4k
                                // Rule at src/isa/x64/lower.isle line 2874.
15433
16.4k
                                return Some(v1515);
15434
0
                            }
15435
0
                        }
15436
0
                    }
15437
                }
15438
                &Opcode::Sload16 => {
15439
0
                    let v1 = C::first_result(ctx, arg0);
15440
0
                    if let Some(v2) = v1 {
15441
0
                        let v3 = C::value_type(ctx, v2);
15442
0
                        let v1488 = &C::type_register_class(ctx, v3);
15443
0
                        if let Some(v1489) = v1488 {
15444
                            if let &RegisterClass::Gpr {
15445
0
                                single_register: v1490,
15446
0
                            } = v1489 {
15447
0
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15448
0
                                let v1508 = &constructor_amode_to_gpr_mem(ctx, v1504);
15449
0
                                let v1516 = constructor_x64_movsx(ctx, &ExtMode::WQ, v1508);
15450
0
                                let v1517 = constructor_output_gpr(ctx, v1516);
15451
0
                                // Rule at src/isa/x64/lower.isle line 2876.
15452
0
                                return Some(v1517);
15453
0
                            }
15454
0
                        }
15455
0
                    }
15456
                }
15457
                &Opcode::Uload32 => {
15458
2.27k
                    let v1 = C::first_result(ctx, arg0);
15459
2.27k
                    if let Some(v2) = v1 {
15460
2.27k
                        let v3 = C::value_type(ctx, v2);
15461
2.27k
                        let v1488 = &C::type_register_class(ctx, v3);
15462
2.27k
                        if let Some(v1489) = v1488 {
15463
                            if let &RegisterClass::Gpr {
15464
2.27k
                                single_register: v1490,
15465
2.27k
                            } = v1489 {
15466
2.27k
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15467
2.27k
                                let v1508 = &constructor_amode_to_gpr_mem(ctx, v1504);
15468
2.27k
                                let v1519 = constructor_x64_movzx(ctx, &ExtMode::LQ, v1508);
15469
2.27k
                                let v1520 = constructor_output_gpr(ctx, v1519);
15470
2.27k
                                // Rule at src/isa/x64/lower.isle line 2878.
15471
2.27k
                                return Some(v1520);
15472
0
                            }
15473
0
                        }
15474
0
                    }
15475
                }
15476
                &Opcode::Sload32 => {
15477
0
                    let v1 = C::first_result(ctx, arg0);
15478
0
                    if let Some(v2) = v1 {
15479
0
                        let v3 = C::value_type(ctx, v2);
15480
0
                        let v1488 = &C::type_register_class(ctx, v3);
15481
0
                        if let Some(v1489) = v1488 {
15482
                            if let &RegisterClass::Gpr {
15483
0
                                single_register: v1490,
15484
0
                            } = v1489 {
15485
0
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15486
0
                                let v1508 = &constructor_amode_to_gpr_mem(ctx, v1504);
15487
0
                                let v1521 = constructor_x64_movsx(ctx, &ExtMode::LQ, v1508);
15488
0
                                let v1522 = constructor_output_gpr(ctx, v1521);
15489
0
                                // Rule at src/isa/x64/lower.isle line 2880.
15490
0
                                return Some(v1522);
15491
0
                            }
15492
0
                        }
15493
0
                    }
15494
                }
15495
                &Opcode::Uload8x8 => {
15496
0
                    let v1 = C::first_result(ctx, arg0);
15497
0
                    if let Some(v2) = v1 {
15498
0
                        let v3 = C::value_type(ctx, v2);
15499
0
                        if v3 == I16X8 {
15500
0
                            let v441 = C::use_sse41(ctx);
15501
0
                            if v441 == true {
15502
0
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15503
0
                                let v1532 = &constructor_amode_to_xmm_mem(ctx, v1504);
15504
0
                                let v1543 = constructor_x64_pmovzxbw(ctx, v1532);
15505
0
                                let v1544 = constructor_output_xmm(ctx, v1543);
15506
0
                                // Rule at src/isa/x64/lower.isle line 2912.
15507
0
                                return Some(v1544);
15508
0
                            }
15509
0
                            let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15510
0
                            let v1508 = &constructor_amode_to_gpr_mem(ctx, v1504);
15511
0
                            let v1553 = constructor_x64_movq_to_xmm(ctx, v1508);
15512
0
                            let v1556 = constructor_lower_uwiden_low(ctx, I16X8, v1553);
15513
0
                            let v1557 = constructor_output_xmm(ctx, v1556);
15514
0
                            // Rule at src/isa/x64/lower.isle line 2930.
15515
0
                            return Some(v1557);
15516
0
                        }
15517
0
                    }
15518
                }
15519
                &Opcode::Sload8x8 => {
15520
0
                    let v1 = C::first_result(ctx, arg0);
15521
0
                    if let Some(v2) = v1 {
15522
0
                        let v3 = C::value_type(ctx, v2);
15523
0
                        if v3 == I16X8 {
15524
0
                            let v441 = C::use_sse41(ctx);
15525
0
                            if v441 == true {
15526
0
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15527
0
                                let v1532 = &constructor_amode_to_xmm_mem(ctx, v1504);
15528
0
                                let v1541 = constructor_x64_pmovsxbw(ctx, v1532);
15529
0
                                let v1542 = constructor_output_xmm(ctx, v1541);
15530
0
                                // Rule at src/isa/x64/lower.isle line 2909.
15531
0
                                return Some(v1542);
15532
0
                            }
15533
0
                            let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15534
0
                            let v1508 = &constructor_amode_to_gpr_mem(ctx, v1504);
15535
0
                            let v1553 = constructor_x64_movq_to_xmm(ctx, v1508);
15536
0
                            let v1554 = constructor_lower_swiden_low(ctx, I16X8, v1553);
15537
0
                            let v1555 = constructor_output_xmm(ctx, v1554);
15538
0
                            // Rule at src/isa/x64/lower.isle line 2928.
15539
0
                            return Some(v1555);
15540
0
                        }
15541
0
                    }
15542
                }
15543
                &Opcode::Uload16x4 => {
15544
0
                    let v1 = C::first_result(ctx, arg0);
15545
0
                    if let Some(v2) = v1 {
15546
0
                        let v3 = C::value_type(ctx, v2);
15547
0
                        if v3 == I32X4 {
15548
0
                            let v441 = C::use_sse41(ctx);
15549
0
                            if v441 == true {
15550
0
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15551
0
                                let v1532 = &constructor_amode_to_xmm_mem(ctx, v1504);
15552
0
                                let v1547 = constructor_x64_pmovzxwd(ctx, v1532);
15553
0
                                let v1548 = constructor_output_xmm(ctx, v1547);
15554
0
                                // Rule at src/isa/x64/lower.isle line 2918.
15555
0
                                return Some(v1548);
15556
0
                            }
15557
0
                            let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15558
0
                            let v1508 = &constructor_amode_to_gpr_mem(ctx, v1504);
15559
0
                            let v1553 = constructor_x64_movq_to_xmm(ctx, v1508);
15560
0
                            let v1560 = constructor_lower_uwiden_low(ctx, I32X4, v1553);
15561
0
                            let v1561 = constructor_output_xmm(ctx, v1560);
15562
0
                            // Rule at src/isa/x64/lower.isle line 2934.
15563
0
                            return Some(v1561);
15564
0
                        }
15565
0
                    }
15566
                }
15567
                &Opcode::Sload16x4 => {
15568
0
                    let v1 = C::first_result(ctx, arg0);
15569
0
                    if let Some(v2) = v1 {
15570
0
                        let v3 = C::value_type(ctx, v2);
15571
0
                        if v3 == I32X4 {
15572
0
                            let v441 = C::use_sse41(ctx);
15573
0
                            if v441 == true {
15574
0
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15575
0
                                let v1532 = &constructor_amode_to_xmm_mem(ctx, v1504);
15576
0
                                let v1545 = constructor_x64_pmovsxwd(ctx, v1532);
15577
0
                                let v1546 = constructor_output_xmm(ctx, v1545);
15578
0
                                // Rule at src/isa/x64/lower.isle line 2915.
15579
0
                                return Some(v1546);
15580
0
                            }
15581
0
                            let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15582
0
                            let v1508 = &constructor_amode_to_gpr_mem(ctx, v1504);
15583
0
                            let v1553 = constructor_x64_movq_to_xmm(ctx, v1508);
15584
0
                            let v1558 = constructor_lower_swiden_low(ctx, I32X4, v1553);
15585
0
                            let v1559 = constructor_output_xmm(ctx, v1558);
15586
0
                            // Rule at src/isa/x64/lower.isle line 2932.
15587
0
                            return Some(v1559);
15588
0
                        }
15589
0
                    }
15590
                }
15591
                &Opcode::Uload32x2 => {
15592
0
                    let v1 = C::first_result(ctx, arg0);
15593
0
                    if let Some(v2) = v1 {
15594
0
                        let v3 = C::value_type(ctx, v2);
15595
0
                        if v3 == I64X2 {
15596
0
                            let v441 = C::use_sse41(ctx);
15597
0
                            if v441 == true {
15598
0
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15599
0
                                let v1532 = &constructor_amode_to_xmm_mem(ctx, v1504);
15600
0
                                let v1551 = constructor_x64_pmovzxdq(ctx, v1532);
15601
0
                                let v1552 = constructor_output_xmm(ctx, v1551);
15602
0
                                // Rule at src/isa/x64/lower.isle line 2924.
15603
0
                                return Some(v1552);
15604
0
                            }
15605
0
                            let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15606
0
                            let v1508 = &constructor_amode_to_gpr_mem(ctx, v1504);
15607
0
                            let v1553 = constructor_x64_movq_to_xmm(ctx, v1508);
15608
0
                            let v1564 = constructor_lower_uwiden_low(ctx, I64X2, v1553);
15609
0
                            let v1565 = constructor_output_xmm(ctx, v1564);
15610
0
                            // Rule at src/isa/x64/lower.isle line 2938.
15611
0
                            return Some(v1565);
15612
0
                        }
15613
0
                    }
15614
                }
15615
                &Opcode::Sload32x2 => {
15616
0
                    let v1 = C::first_result(ctx, arg0);
15617
0
                    if let Some(v2) = v1 {
15618
0
                        let v3 = C::value_type(ctx, v2);
15619
0
                        if v3 == I64X2 {
15620
0
                            let v441 = C::use_sse41(ctx);
15621
0
                            if v441 == true {
15622
0
                                let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15623
0
                                let v1532 = &constructor_amode_to_xmm_mem(ctx, v1504);
15624
0
                                let v1549 = constructor_x64_pmovsxdq(ctx, v1532);
15625
0
                                let v1550 = constructor_output_xmm(ctx, v1549);
15626
0
                                // Rule at src/isa/x64/lower.isle line 2921.
15627
0
                                return Some(v1550);
15628
0
                            }
15629
0
                            let v1504 = &constructor_to_amode(ctx, v1493, v1492, v1494);
15630
0
                            let v1508 = &constructor_amode_to_gpr_mem(ctx, v1504);
15631
0
                            let v1553 = constructor_x64_movq_to_xmm(ctx, v1508);
15632
0
                            let v1562 = constructor_lower_swiden_low(ctx, I64X2, v1553);
15633
0
                            let v1563 = constructor_output_xmm(ctx, v1562);
15634
0
                            // Rule at src/isa/x64/lower.isle line 2936.
15635
0
                            return Some(v1563);
15636
0
                        }
15637
0
                    }
15638
                }
15639
0
                _ => {}
15640
            }
15641
        }
15642
        &InstructionData::LoadNoOffset {
15643
0
            opcode: ref v1712,
15644
0
            arg: v1713,
15645
0
            flags: v1714,
15646
0
        } => {
15647
0
            match v1712 {
15648
                &Opcode::Bitcast => {
15649
0
                    let v1 = C::first_result(ctx, arg0);
15650
0
                    if let Some(v2) = v1 {
15651
0
                        let v3 = C::value_type(ctx, v2);
15652
0
                        let v1488 = &C::type_register_class(ctx, v3);
15653
0
                        if let Some(v1489) = v1488 {
15654
0
                            match v1489 {
15655
                                &RegisterClass::Gpr {
15656
0
                                    single_register: v1490,
15657
0
                                } => {
15658
0
                                    let v2128 = C::value_type(ctx, v1713);
15659
0
                                    let v2139 = &C::type_register_class(ctx, v2128);
15660
0
                                    if let Some(v2140) = v2139 {
15661
                                        if let &RegisterClass::Gpr {
15662
0
                                            single_register: v2141,
15663
0
                                        } = v2140 {
15664
0
                                            let v2142 = constructor_output_value(ctx, v1713);
15665
0
                                            // Rule at src/isa/x64/lower.isle line 3931.
15666
0
                                            return Some(v2142);
15667
0
                                        }
15668
0
                                    }
15669
                                }
15670
                                &RegisterClass::Xmm => {
15671
0
                                    let v2128 = C::value_type(ctx, v1713);
15672
0
                                    let v2139 = &C::type_register_class(ctx, v2128);
15673
0
                                    if let Some(v2140) = v2139 {
15674
0
                                        if let &RegisterClass::Xmm = v2140 {
15675
0
                                            let v2142 = constructor_output_value(ctx, v1713);
15676
0
                                            // Rule at src/isa/x64/lower.isle line 3935.
15677
0
                                            return Some(v2142);
15678
0
                                        }
15679
0
                                    }
15680
                                }
15681
0
                                _ => {}
15682
                            }
15683
0
                        }
15684
0
                        match v3 {
15685
                            I32 => {
15686
0
                                let v2128 = C::value_type(ctx, v1713);
15687
0
                                if v2128 == F32 {
15688
0
                                    let v2129 = constructor_put_in_xmm(ctx, v1713);
15689
0
                                    let v2130 = constructor_bitcast_xmm_to_gpr(ctx, F32, v2129);
15690
0
                                    let v2131 = constructor_output_gpr(ctx, v2130);
15691
0
                                    // Rule at src/isa/x64/lower.isle line 3918.
15692
0
                                    return Some(v2131);
15693
0
                                }
15694
                            }
15695
                            I64 => {
15696
0
                                let v2128 = C::value_type(ctx, v1713);
15697
0
                                if v2128 == F64 {
15698
0
                                    let v2129 = constructor_put_in_xmm(ctx, v1713);
15699
0
                                    let v2135 = constructor_bitcast_xmm_to_gpr(ctx, F64, v2129);
15700
0
                                    let v2136 = constructor_output_gpr(ctx, v2135);
15701
0
                                    // Rule at src/isa/x64/lower.isle line 3924.
15702
0
                                    return Some(v2136);
15703
0
                                }
15704
                            }
15705
                            F32 => {
15706
0
                                let v2128 = C::value_type(ctx, v1713);
15707
0
                                if v2128 == I32 {
15708
0
                                    let v2132 = constructor_put_in_gpr(ctx, v1713);
15709
0
                                    let v2133 = constructor_bitcast_gpr_to_xmm(ctx, I32, v2132);
15710
0
                                    let v2134 = constructor_output_xmm(ctx, v2133);
15711
0
                                    // Rule at src/isa/x64/lower.isle line 3921.
15712
0
                                    return Some(v2134);
15713
0
                                }
15714
                            }
15715
                            F64 => {
15716
0
                                let v2128 = C::value_type(ctx, v1713);
15717
0
                                if v2128 == I64 {
15718
0
                                    let v2132 = constructor_put_in_gpr(ctx, v1713);
15719
0
                                    let v2137 = constructor_bitcast_gpr_to_xmm(ctx, I64, v2132);
15720
0
                                    let v2138 = constructor_output_xmm(ctx, v2137);
15721
0
                                    // Rule at src/isa/x64/lower.isle line 3927.
15722
0
                                    return Some(v2138);
15723
0
                                }
15724
                            }
15725
0
                            _ => {}
15726
                        }
15727
0
                    }
15728
                }
15729
                &Opcode::AtomicLoad => {
15730
0
                    let v1 = C::first_result(ctx, arg0);
15731
0
                    if let Some(v2) = v1 {
15732
0
                        let v3 = C::value_type(ctx, v2);
15733
0
                        if v3 == I64 {
15734
0
                            let v48 = C::zero_offset(ctx);
15735
0
                            let v1715 = &constructor_to_amode(ctx, v1714, v1713, v48);
15736
0
                            let v1716 = constructor_x64_mov(ctx, v1715);
15737
0
                            let v1717 = constructor_output_reg(ctx, v1716);
15738
0
                            // Rule at src/isa/x64/lower.isle line 3220.
15739
0
                            return Some(v1717);
15740
0
                        }
15741
0
                        let v1245 = C::fits_in_32(ctx, v3);
15742
0
                        if let Some(v1246) = v1245 {
15743
0
                            let v1718 = C::ty_int(ctx, v3);
15744
0
                            if let Some(v1719) = v1718 {
15745
0
                                let v1495 = C::ty_bits_u16(ctx, v1246);
15746
0
                                let v1497 = &C::ext_mode(ctx, v1495, 0x40);
15747
0
                                let v1720 = C::zero_offset(ctx);
15748
0
                                let v1721 = &constructor_to_amode(ctx, v1714, v1713, v1720);
15749
0
                                let v1722 = &constructor_amode_to_gpr_mem(ctx, v1721);
15750
0
                                let v1723 = constructor_x64_movzx(ctx, v1497, v1722);
15751
0
                                let v1724 = constructor_output_gpr(ctx, v1723);
15752
0
                                // Rule at src/isa/x64/lower.isle line 3222.
15753
0
                                return Some(v1724);
15754
0
                            }
15755
0
                        }
15756
0
                    }
15757
                }
15758
0
                _ => {}
15759
            }
15760
        }
15761
        &InstructionData::MultiAry {
15762
48.7k
            opcode: ref v834,
15763
48.7k
            args: v835,
15764
48.7k
        } => {
15765
48.7k
            if let &Opcode::Return = v834 {
15766
48.7k
                let v836 = C::value_list_slice(ctx, v835);
15767
48.7k
                let v837 = constructor_lower_return(ctx, v836);
15768
48.7k
                // Rule at src/isa/x64/lower.isle line 1819.
15769
48.7k
                return Some(v837);
15770
0
            }
15771
        }
15772
        &InstructionData::NullAry {
15773
20.3k
            opcode: ref v31,
15774
20.3k
        } => {
15775
20.3k
            match v31 {
15776
                &Opcode::Debugtrap => {
15777
0
                    let v1259 = &constructor_x64_hlt(ctx);
15778
0
                    let v1260 = constructor_side_effect(ctx, v1259);
15779
0
                    // Rule at src/isa/x64/lower.isle line 2503.
15780
0
                    return Some(v1260);
15781
                }
15782
                &Opcode::GetPinnedReg => {
15783
0
                    let v2252 = constructor_read_pinned_gpr(ctx);
15784
0
                    let v2253 = constructor_output_gpr(ctx, v2252);
15785
0
                    // Rule at src/isa/x64/lower.isle line 4194.
15786
0
                    return Some(v2253);
15787
                }
15788
                &Opcode::GetFramePointer => {
15789
2.18k
                    let v1790 = constructor_x64_rbp(ctx);
15790
2.18k
                    let v1791 = constructor_output_reg(ctx, v1790);
15791
2.18k
                    // Rule at src/isa/x64/lower.isle line 3277.
15792
2.18k
                    return Some(v1791);
15793
                }
15794
                &Opcode::GetStackPointer => {
15795
15.9k
                    let v1792 = constructor_x64_rsp(ctx);
15796
15.9k
                    let v1793 = constructor_output_reg(ctx, v1792);
15797
15.9k
                    // Rule at src/isa/x64/lower.isle line 3280.
15798
15.9k
                    return Some(v1793);
15799
                }
15800
                &Opcode::GetReturnAddress => {
15801
2.18k
                    let v1790 = constructor_x64_rbp(ctx);
15802
2.18k
                    let v47 = C::mem_flags_trusted(ctx);
15803
2.18k
                    let v1794 = Amode::ImmReg {
15804
2.18k
                        simm32: 0x8,
15805
2.18k
                        base: v1790,
15806
2.18k
                        flags: v47,
15807
2.18k
                    };
15808
2.18k
                    let v1795 = &C::amode_to_synthetic_amode(ctx, &v1794);
15809
2.18k
                    let v1796 = constructor_x64_load(ctx, I64, v1795, &ExtKind::None);
15810
2.18k
                    let v1797 = constructor_output_reg(ctx, v1796);
15811
2.18k
                    // Rule at src/isa/x64/lower.isle line 3283.
15812
2.18k
                    return Some(v1797);
15813
                }
15814
                &Opcode::Null => {
15815
0
                    let v1 = C::first_result(ctx, arg0);
15816
0
                    if let Some(v2) = v1 {
15817
0
                        let v3 = C::value_type(ctx, v2);
15818
0
                        let v32 = constructor_imm(ctx, v3, 0x0);
15819
0
                        let v33 = constructor_output_reg(ctx, v32);
15820
0
                        // Rule at src/isa/x64/lower.isle line 37.
15821
0
                        return Some(v33);
15822
0
                    }
15823
                }
15824
                &Opcode::Nop => {
15825
0
                    let v2606 = C::invalid_reg(ctx);
15826
0
                    let v2607 = constructor_output_reg(ctx, v2606);
15827
0
                    // Rule at src/isa/x64/lower.isle line 4741.
15828
0
                    return Some(v2607);
15829
                }
15830
                &Opcode::Fence => {
15831
0
                    let v1692 = &constructor_x64_mfence(ctx);
15832
0
                    let v1693 = constructor_side_effect(ctx, v1692);
15833
0
                    // Rule at src/isa/x64/lower.isle line 3198.
15834
0
                    return Some(v1693);
15835
                }
15836
0
                _ => {}
15837
            }
15838
        }
15839
        &InstructionData::Shuffle {
15840
0
            opcode: ref v2261,
15841
0
            args: ref v2262,
15842
0
            imm: v2263,
15843
0
        } => {
15844
0
            if let &Opcode::Shuffle = v2261 {
15845
0
                let v441 = C::use_sse41(ctx);
15846
0
                if v441 == true {
15847
0
                    let v2267 = C::pblendw_imm(ctx, v2263);
15848
0
                    if let Some(v2268) = v2267 {
15849
0
                        let v2264 = C::unpack_value_array_2(ctx, v2262);
15850
0
                        let v2269 = constructor_put_in_xmm(ctx, v2264.0);
15851
0
                        let v2270 = &C::put_in_xmm_mem(ctx, v2264.1);
15852
0
                        let v2271 = constructor_x64_pblendw(ctx, v2269, v2270, v2268);
15853
0
                        let v2272 = constructor_output_xmm(ctx, v2271);
15854
0
                        // Rule at src/isa/x64/lower.isle line 4214.
15855
0
                        return Some(v2272);
15856
0
                    }
15857
0
                }
15858
0
                let v525 = C::use_ssse3(ctx);
15859
0
                if v525 == true {
15860
0
                    let v2273 = C::palignr_imm_from_immediate(ctx, v2263);
15861
0
                    if let Some(v2274) = v2273 {
15862
0
                        let v2264 = C::unpack_value_array_2(ctx, v2262);
15863
0
                        let v2275 = constructor_put_in_xmm(ctx, v2264.1);
15864
0
                        let v2276 = &C::put_in_xmm_mem(ctx, v2264.0);
15865
0
                        let v2277 = constructor_x64_palignr(ctx, v2275, v2276, v2274);
15866
0
                        let v2278 = constructor_output_xmm(ctx, v2277);
15867
0
                        // Rule at src/isa/x64/lower.isle line 4225.
15868
0
                        return Some(v2278);
15869
0
                    }
15870
0
                }
15871
0
                let v2279 = C::pshuflw_lhs_imm(ctx, v2263);
15872
0
                if let Some(v2280) = v2279 {
15873
0
                    let v2264 = C::unpack_value_array_2(ctx, v2262);
15874
0
                    let v2281 = &C::put_in_xmm_mem(ctx, v2264.0);
15875
0
                    let v2282 = constructor_x64_pshuflw(ctx, v2281, v2280);
15876
0
                    let v2283 = constructor_output_xmm(ctx, v2282);
15877
0
                    // Rule at src/isa/x64/lower.isle line 4237.
15878
0
                    return Some(v2283);
15879
0
                }
15880
0
                let v2284 = C::pshuflw_rhs_imm(ctx, v2263);
15881
0
                if let Some(v2285) = v2284 {
15882
0
                    let v2264 = C::unpack_value_array_2(ctx, v2262);
15883
0
                    let v2286 = &C::put_in_xmm_mem(ctx, v2264.1);
15884
0
                    let v2287 = constructor_x64_pshuflw(ctx, v2286, v2285);
15885
0
                    let v2288 = constructor_output_xmm(ctx, v2287);
15886
0
                    // Rule at src/isa/x64/lower.isle line 4239.
15887
0
                    return Some(v2288);
15888
0
                }
15889
0
                let v2289 = C::pshufhw_lhs_imm(ctx, v2263);
15890
0
                if let Some(v2290) = v2289 {
15891
0
                    let v2264 = C::unpack_value_array_2(ctx, v2262);
15892
0
                    let v2281 = &C::put_in_xmm_mem(ctx, v2264.0);
15893
0
                    let v2291 = constructor_x64_pshufhw(ctx, v2281, v2290);
15894
0
                    let v2292 = constructor_output_xmm(ctx, v2291);
15895
0
                    // Rule at src/isa/x64/lower.isle line 4241.
15896
0
                    return Some(v2292);
15897
0
                }
15898
0
                let v2293 = C::pshufhw_rhs_imm(ctx, v2263);
15899
0
                if let Some(v2294) = v2293 {
15900
0
                    let v2264 = C::unpack_value_array_2(ctx, v2262);
15901
0
                    let v2286 = &C::put_in_xmm_mem(ctx, v2264.1);
15902
0
                    let v2295 = constructor_x64_pshufhw(ctx, v2286, v2294);
15903
0
                    let v2296 = constructor_output_xmm(ctx, v2295);
15904
0
                    // Rule at src/isa/x64/lower.isle line 4243.
15905
0
                    return Some(v2296);
15906
0
                }
15907
0
                let v2297 = C::pshufd_lhs_imm(ctx, v2263);
15908
0
                if let Some(v2298) = v2297 {
15909
0
                    let v2264 = C::unpack_value_array_2(ctx, v2262);
15910
0
                    let v2281 = &C::put_in_xmm_mem(ctx, v2264.0);
15911
0
                    let v2299 = constructor_x64_pshufd(ctx, v2281, v2298);
15912
0
                    let v2300 = constructor_output_xmm(ctx, v2299);
15913
0
                    // Rule at src/isa/x64/lower.isle line 4260.
15914
0
                    return Some(v2300);
15915
0
                }
15916
0
                let v2301 = C::pshufd_rhs_imm(ctx, v2263);
15917
0
                if let Some(v2302) = v2301 {
15918
0
                    let v2264 = C::unpack_value_array_2(ctx, v2262);
15919
0
                    let v2286 = &C::put_in_xmm_mem(ctx, v2264.1);
15920
0
                    let v2303 = constructor_x64_pshufd(ctx, v2286, v2302);
15921
0
                    let v2304 = constructor_output_xmm(ctx, v2303);
15922
0
                    // Rule at src/isa/x64/lower.isle line 4262.
15923
0
                    return Some(v2304);
15924
0
                }
15925
0
                let v2305 = C::u128_from_immediate(ctx, v2263);
15926
0
                if let Some(v2306) = v2305 {
15927
0
                    match v2306 {
15928
                        0x0 => {
15929
0
                            if v525 == true {
15930
0
                                let v2264 = C::unpack_value_array_2(ctx, v2262);
15931
0
                                let v2269 = constructor_put_in_xmm(ctx, v2264.0);
15932
0
                                let v530 = constructor_xmm_zero(ctx, I8X16);
15933
0
                                let v2086 = &C::xmm_to_xmm_mem(ctx, v530);
15934
0
                                let v2323 = constructor_x64_pshufb(ctx, v2269, v2086);
15935
0
                                let v2324 = constructor_output_xmm(ctx, v2323);
15936
0
                                // Rule at src/isa/x64/lower.isle line 4299.
15937
0
                                return Some(v2324);
15938
0
                            }
15939
                        }
15940
                        0x17071606150514041303120211011000 => {
15941
0
                            let v2264 = C::unpack_value_array_2(ctx, v2262);
15942
0
                            let v2269 = constructor_put_in_xmm(ctx, v2264.0);
15943
0
                            let v2270 = &C::put_in_xmm_mem(ctx, v2264.1);
15944
0
                            let v2309 = constructor_x64_punpcklbw(ctx, v2269, v2270);
15945
0
                            let v2310 = constructor_output_xmm(ctx, v2309);
15946
0
                            // Rule at src/isa/x64/lower.isle line 4273.
15947
0
                            return Some(v2310);
15948
                        }
15949
                        0x17160706151405041312030211100100 => {
15950
0
                            let v2264 = C::unpack_value_array_2(ctx, v2262);
15951
0
                            let v2269 = constructor_put_in_xmm(ctx, v2264.0);
15952
0
                            let v2270 = &C::put_in_xmm_mem(ctx, v2264.1);
15953
0
                            let v2313 = constructor_x64_punpcklwd(ctx, v2269, v2270);
15954
0
                            let v2314 = constructor_output_xmm(ctx, v2313);
15955
0
                            // Rule at src/isa/x64/lower.isle line 4279.
15956
0
                            return Some(v2314);
15957
                        }
15958
                        0x17161514070605041312111003020100 => {
15959
0
                            let v2264 = C::unpack_value_array_2(ctx, v2262);
15960
0
                            let v2269 = constructor_put_in_xmm(ctx, v2264.0);
15961
0
                            let v2270 = &C::put_in_xmm_mem(ctx, v2264.1);
15962
0
                            let v2317 = constructor_x64_punpckldq(ctx, v2269, v2270);
15963
0
                            let v2318 = constructor_output_xmm(ctx, v2317);
15964
0
                            // Rule at src/isa/x64/lower.isle line 4285.
15965
0
                            return Some(v2318);
15966
                        }
15967
                        0x17161514131211100706050403020100 => {
15968
0
                            let v2264 = C::unpack_value_array_2(ctx, v2262);
15969
0
                            let v2269 = constructor_put_in_xmm(ctx, v2264.0);
15970
0
                            let v2270 = &C::put_in_xmm_mem(ctx, v2264.1);
15971
0
                            let v2321 = constructor_x64_punpcklqdq(ctx, v2269, v2270);
15972
0
                            let v2322 = constructor_output_xmm(ctx, v2321);
15973
0
                            // Rule at src/isa/x64/lower.isle line 4291.
15974
0
                            return Some(v2322);
15975
                        }
15976
                        0x1F0F1E0E1D0D1C0C1B0B1A0A19091808 => {
15977
0
                            let v2264 = C::unpack_value_array_2(ctx, v2262);
15978
0
                            let v2269 = constructor_put_in_xmm(ctx, v2264.0);
15979
0
                            let v2270 = &C::put_in_xmm_mem(ctx, v2264.1);
15980
0
                            let v2307 = constructor_x64_punpckhbw(ctx, v2269, v2270);
15981
0
                            let v2308 = constructor_output_xmm(ctx, v2307);
15982
0
                            // Rule at src/isa/x64/lower.isle line 4271.
15983
0
                            return Some(v2308);
15984
                        }
15985
                        0x1F1E0F0E1D1C0D0C1B1A0B0A19180908 => {
15986
0
                            let v2264 = C::unpack_value_array_2(ctx, v2262);
15987
0
                            let v2269 = constructor_put_in_xmm(ctx, v2264.0);
15988
0
                            let v2270 = &C::put_in_xmm_mem(ctx, v2264.1);
15989
0
                            let v2311 = constructor_x64_punpckhwd(ctx, v2269, v2270);
15990
0
                            let v2312 = constructor_output_xmm(ctx, v2311);
15991
0
                            // Rule at src/isa/x64/lower.isle line 4277.
15992
0
                            return Some(v2312);
15993
                        }
15994
                        0x1F1E1D1C0F0E0D0C1B1A19180B0A0908 => {
15995
0
                            let v2264 = C::unpack_value_array_2(ctx, v2262);
15996
0
                            let v2269 = constructor_put_in_xmm(ctx, v2264.0);
15997
0
                            let v2270 = &C::put_in_xmm_mem(ctx, v2264.1);
15998
0
                            let v2315 = constructor_x64_punpckhdq(ctx, v2269, v2270);
15999
0
                            let v2316 = constructor_output_xmm(ctx, v2315);
16000
0
                            // Rule at src/isa/x64/lower.isle line 4283.
16001
0
                            return Some(v2316);
16002
                        }
16003
                        0x1F1E1D1C1B1A19180F0E0D0C0B0A0908 => {
16004
0
                            let v2264 = C::unpack_value_array_2(ctx, v2262);
16005
0
                            let v2269 = constructor_put_in_xmm(ctx, v2264.0);
16006
0
                            let v2270 = &C::put_in_xmm_mem(ctx, v2264.1);
16007
0
                            let v2319 = constructor_x64_punpckhqdq(ctx, v2269, v2270);
16008
0
                            let v2320 = constructor_output_xmm(ctx, v2319);
16009
0
                            // Rule at src/isa/x64/lower.isle line 4289.
16010
0
                            return Some(v2320);
16011
                        }
16012
0
                        _ => {}
16013
                    }
16014
0
                }
16015
0
                let v2325 = C::shufps_imm(ctx, v2263);
16016
0
                if let Some(v2326) = v2325 {
16017
0
                    let v2264 = C::unpack_value_array_2(ctx, v2262);
16018
0
                    let v2269 = constructor_put_in_xmm(ctx, v2264.0);
16019
0
                    let v2270 = &C::put_in_xmm_mem(ctx, v2264.1);
16020
0
                    let v2327 = constructor_x64_shufps(ctx, v2269, v2270, v2326);
16021
0
                    let v2328 = constructor_output_xmm(ctx, v2327);
16022
0
                    // Rule at src/isa/x64/lower.isle line 4313.
16023
0
                    return Some(v2328);
16024
0
                }
16025
0
                let v2329 = C::shufps_rev_imm(ctx, v2263);
16026
0
                if let Some(v2330) = v2329 {
16027
0
                    let v2264 = C::unpack_value_array_2(ctx, v2262);
16028
0
                    let v2275 = constructor_put_in_xmm(ctx, v2264.1);
16029
0
                    let v2276 = &C::put_in_xmm_mem(ctx, v2264.0);
16030
0
                    let v2331 = constructor_x64_shufps(ctx, v2275, v2276, v2330);
16031
0
                    let v2332 = constructor_output_xmm(ctx, v2331);
16032
0
                    // Rule at src/isa/x64/lower.isle line 4315.
16033
0
                    return Some(v2332);
16034
0
                }
16035
0
                let v2333 = &C::vec_mask_from_immediate(ctx, v2263);
16036
0
                if let Some(v2334) = v2333 {
16037
0
                    if v525 == true {
16038
0
                        let v2264 = C::unpack_value_array_2(ctx, v2262);
16039
0
                        if v2264.0 == v2264.1 {
16040
0
                            let v2269 = constructor_put_in_xmm(ctx, v2264.0);
16041
0
                            let v2335 = C::shuffle_0_31_mask(ctx, v2334);
16042
0
                            let v2336 = &constructor_const_to_xmm_mem(ctx, v2335);
16043
0
                            let v2337 = constructor_x64_pshufb(ctx, v2269, v2336);
16044
0
                            let v2338 = constructor_output_xmm(ctx, v2337);
16045
0
                            // Rule at src/isa/x64/lower.isle line 4328.
16046
0
                            return Some(v2338);
16047
0
                        }
16048
0
                    }
16049
0
                    let v332 = C::use_avx512vl(ctx);
16050
0
                    if v332 == true {
16051
0
                        let v2343 = C::use_avx512vbmi(ctx);
16052
0
                        if v2343 == true {
16053
0
                            let v2339 = C::perm_from_mask_with_zeros(ctx, v2334);
16054
0
                            if let Some(v2340) = v2339 {
16055
0
                                let v2344 = constructor_x64_xmm_load_const(ctx, I8X16, v2340.0);
16056
0
                                let v2264 = C::unpack_value_array_2(ctx, v2262);
16057
0
                                let v2345 = constructor_put_in_xmm(ctx, v2264.0);
16058
0
                                let v2346 = &C::put_in_xmm_mem(ctx, v2264.1);
16059
0
                                let v2347 = constructor_x64_vpermi2b(ctx, v2344, v2345, v2346);
16060
0
                                let v2348 = &constructor_const_to_xmm_mem(ctx, v2340.1);
16061
0
                                let v2349 = constructor_x64_andps(ctx, v2347, v2348);
16062
0
                                let v2350 = constructor_output_xmm(ctx, v2349);
16063
0
                                // Rule at src/isa/x64/lower.isle line 4335.
16064
0
                                return Some(v2350);
16065
0
                            }
16066
0
                            let v2351 = C::perm_from_mask(ctx, v2334);
16067
0
                            let v2352 = constructor_x64_xmm_load_const(ctx, I8X16, v2351);
16068
0
                            let v2264 = C::unpack_value_array_2(ctx, v2262);
16069
0
                            let v2353 = constructor_put_in_xmm(ctx, v2264.0);
16070
0
                            let v2354 = &C::put_in_xmm_mem(ctx, v2264.1);
16071
0
                            let v2355 = constructor_x64_vpermi2b(ctx, v2352, v2353, v2354);
16072
0
                            let v2356 = constructor_output_xmm(ctx, v2355);
16073
0
                            // Rule at src/isa/x64/lower.isle line 4342.
16074
0
                            return Some(v2356);
16075
0
                        }
16076
0
                    }
16077
0
                    let v2264 = C::unpack_value_array_2(ctx, v2262);
16078
0
                    let v2269 = constructor_put_in_xmm(ctx, v2264.0);
16079
0
                    let v2357 = C::shuffle_0_15_mask(ctx, v2334);
16080
0
                    let v2358 = &constructor_const_to_reg_mem(ctx, v2357);
16081
0
                    let v2359 = constructor_lower_pshufb(ctx, v2269, v2358);
16082
0
                    let v2360 = constructor_put_in_xmm(ctx, v2264.1);
16083
0
                    let v2361 = C::shuffle_16_31_mask(ctx, v2334);
16084
0
                    let v2362 = &constructor_const_to_reg_mem(ctx, v2361);
16085
0
                    let v2363 = constructor_lower_pshufb(ctx, v2360, v2362);
16086
0
                    let v2364 = &C::xmm_to_xmm_mem(ctx, v2363);
16087
0
                    let v2365 = constructor_x64_por(ctx, v2359, v2364);
16088
0
                    let v2366 = constructor_output_xmm(ctx, v2365);
16089
0
                    // Rule at src/isa/x64/lower.isle line 4350.
16090
0
                    return Some(v2366);
16091
0
                }
16092
0
            }
16093
        }
16094
        &InstructionData::StackLoad {
16095
1.81k
            opcode: ref v2172,
16096
1.81k
            stack_slot: v2173,
16097
1.81k
            offset: v2174,
16098
1.81k
        } => {
16099
1.81k
            if let &Opcode::StackAddr = v2172 {
16100
1.81k
                let v2175 = constructor_stack_addr_impl(ctx, v2173, v2174);
16101
1.81k
                let v2176 = constructor_output_gpr(ctx, v2175);
16102
1.81k
                // Rule at src/isa/x64/lower.isle line 4027.
16103
1.81k
                return Some(v2176);
16104
0
            }
16105
        }
16106
        &InstructionData::Store {
16107
970k
            opcode: ref v1566,
16108
970k
            args: ref v1567,
16109
970k
            flags: v1568,
16110
970k
            offset: v1569,
16111
970k
        } => {
16112
970k
            match v1566 {
16113
                &Opcode::Store => {
16114
877k
                    let v1570 = C::unpack_value_array_2(ctx, v1567);
16115
877k
                    let v1588 = C::def_inst(ctx, v1570.0);
16116
877k
                    if let Some(
v1589835k
) = v1588 {
16117
835k
                        let v1590 = C::first_result(ctx, v1589);
16118
835k
                        if let Some(v1591) = v1590 {
16119
835k
                            let v1595 = &C::inst_data(ctx, v1589);
16120
835k
                            match v1595 {
16121
                                &InstructionData::Binary {
16122
128k
                                    opcode: ref v1645,
16123
128k
                                    args: ref v1646,
16124
128k
                                } => {
16125
128k
                                    match v1645 {
16126
                                        &Opcode::Iadd => {
16127
105k
                                            let v1592 = C::value_type(ctx, v1591);
16128
105k
                                            let v1643 = C::ty_32_or_64(ctx, v1592);
16129
105k
                                            if let Some(v1644) = v1643 {
16130
105k
                                                let v1647 = C::unpack_value_array_2(ctx, v1646);
16131
105k
                                                let v1650 = &C::sinkable_load(ctx, v1647.0);
16132
105k
                                                if let Some(
v16512.27k
) = v1650 {
16133
2.27k
                                                    let v1652 = C::def_inst(ctx, v1647.0);
16134
2.27k
                                                    if let Some(v1653) = v1652 {
16135
2.27k
                                                        let v1654 = &C::inst_data(ctx, v1653);
16136
                                                        if let &InstructionData::Load {
16137
2.27k
                                                            opcode: ref v1655,
16138
2.27k
                                                            arg: v1656,
16139
2.27k
                                                            flags: v1657,
16140
2.27k
                                                            offset: v1658,
16141
2.27k
                                                        } = v1654 {
16142
2.27k
                                                            if let &Opcode::Load = v1655 {
16143
2.27k
                                                                if v1568 == v1657 {
16144
2.27k
                                                                    if v1569 == v1658 {
16145
2.27k
                                                                        if v1570.1 == v1656 {
16146
1.82k
                                                                            let v1659 = &constructor_sink_load_to_reg_mem_imm(ctx, v1651);
16147
1.82k
                                                                            let v1660 = &constructor_to_amode(ctx, v1657, v1656, v1658);
16148
1.82k
                                                                            let v1661 = constructor_put_in_gpr(ctx, v1647.1);
16149
1.82k
                                                                            let v1662 = &constructor_x64_add_mem(ctx, v1644, v1660, v1661);
16150
1.82k
                                                                            let v1663 = constructor_side_effect(ctx, v1662);
16151
1.82k
                                                                            // Rule at src/isa/x64/lower.isle line 3071.
16152
1.82k
                                                                            return Some(v1663);
16153
447
                                                                        }
16154
0
                                                                    }
16155
0
                                                                }
16156
0
                                                            }
16157
0
                                                        }
16158
0
                                                    }
16159
102k
                                                }
16160
103k
                                                let v1664 = &C::sinkable_load(ctx, v1647.1);
16161
103k
                                                if let Some(
v166554
) = v1664 {
16162
54
                                                    let v1666 = C::def_inst(ctx, v1647.1);
16163
54
                                                    if let Some(v1667) = v1666 {
16164
54
                                                        let v1668 = &C::inst_data(ctx, v1667);
16165
                                                        if let &InstructionData::Load {
16166
54
                                                            opcode: ref v1669,
16167
54
                                                            arg: v1670,
16168
54
                                                            flags: v1671,
16169
54
                                                            offset: v1672,
16170
54
                                                        } = v1668 {
16171
54
                                                            if let &Opcode::Load = v1669 {
16172
54
                                                                if v1568 == v1671 {
16173
54
                                                                    if v1569 == v1672 {
16174
54
                                                                        if v1570.1 == v1670 {
16175
31
                                                                            let v1673 = &constructor_sink_load_to_reg_mem_imm(ctx, v1665);
16176
31
                                                                            let v1674 = &constructor_to_amode(ctx, v1671, v1670, v1672);
16177
31
                                                                            let v1675 = constructor_put_in_gpr(ctx, v1647.0);
16178
31
                                                                            let v1676 = &constructor_x64_add_mem(ctx, v1644, v1674, v1675);
16179
31
                                                                            let v1677 = constructor_side_effect(ctx, v1676);
16180
31
                                                                            // Rule at src/isa/x64/lower.isle line 3085.
16181
31
                                                                            return Some(v1677);
16182
23
                                                                        }
16183
0
                                                                    }
16184
0
                                                                }
16185
0
                                                            }
16186
0
                                                        }
16187
0
                                                    }
16188
103k
                                                }
16189
0
                                            }
16190
                                        }
16191
                                        &Opcode::Isub => {
16192
17.4k
                                            let v1592 = C::value_type(ctx, v1591);
16193
17.4k
                                            let v1643 = C::ty_32_or_64(ctx, v1592);
16194
17.4k
                                            if let Some(v1644) = v1643 {
16195
17.4k
                                                let v1647 = C::unpack_value_array_2(ctx, v1646);
16196
17.4k
                                                let v1650 = &C::sinkable_load(ctx, v1647.0);
16197
17.4k
                                                if let Some(
v16517
) = v1650 {
16198
7
                                                    let v1652 = C::def_inst(ctx, v1647.0);
16199
7
                                                    if let Some(v1653) = v1652 {
16200
7
                                                        let v1654 = &C::inst_data(ctx, v1653);
16201
                                                        if let &InstructionData::Load {
16202
7
                                                            opcode: ref v1655,
16203
7
                                                            arg: v1656,
16204
7
                                                            flags: v1657,
16205
7
                                                            offset: v1658,
16206
7
                                                        } = v1654 {
16207
7
                                                            if let &Opcode::Load = v1655 {
16208
7
                                                                if v1568 == v1657 {
16209
7
                                                                    if v1569 == v1658 {
16210
7
                                                                        if v1570.1 == v1656 {
16211
7
                                                                            let v1659 = &constructor_sink_load_to_reg_mem_imm(ctx, v1651);
16212
7
                                                                            let v1660 = &constructor_to_amode(ctx, v1657, v1656, v1658);
16213
7
                                                                            let v1661 = constructor_put_in_gpr(ctx, v1647.1);
16214
7
                                                                            let v1678 = &constructor_x64_sub_mem(ctx, v1644, v1660, v1661);
16215
7
                                                                            let v1679 = constructor_side_effect(ctx, v1678);
16216
7
                                                                            // Rule at src/isa/x64/lower.isle line 3099.
16217
7
                                                                            return Some(v1679);
16218
0
                                                                        }
16219
0
                                                                    }
16220
0
                                                                }
16221
0
                                                            }
16222
0
                                                        }
16223
0
                                                    }
16224
17.4k
                                                }
16225
0
                                            }
16226
                                        }
16227
                                        &Opcode::Band => {
16228
1.02k
                                            let v1592 = C::value_type(ctx, v1591);
16229
1.02k
                                            let v1643 = C::ty_32_or_64(ctx, v1592);
16230
1.02k
                                            if let Some(v1644) = v1643 {
16231
1.02k
                                                let v1647 = C::unpack_value_array_2(ctx, v1646);
16232
1.02k
                                                let v1650 = &C::sinkable_load(ctx, v1647.0);
16233
1.02k
                                                if let Some(
v165118
) = v1650 {
16234
18
                                                    let v1652 = C::def_inst(ctx, v1647.0);
16235
18
                                                    if let Some(v1653) = v1652 {
16236
18
                                                        let v1654 = &C::inst_data(ctx, v1653);
16237
                                                        if let &InstructionData::Load {
16238
18
                                                            opcode: ref v1655,
16239
18
                                                            arg: v1656,
16240
18
                                                            flags: v1657,
16241
18
                                                            offset: v1658,
16242
18
                                                        } = v1654 {
16243
18
                                                            if let &Opcode::Load = v1655 {
16244
18
                                                                if v1568 == v1657 {
16245
18
                                                                    if v1569 == v1658 {
16246
18
                                                                        if v1570.1 == v1656 {
16247
0
                                                                            let v1659 = &constructor_sink_load_to_reg_mem_imm(ctx, v1651);
16248
0
                                                                            let v1660 = &constructor_to_amode(ctx, v1657, v1656, v1658);
16249
0
                                                                            let v1661 = constructor_put_in_gpr(ctx, v1647.1);
16250
0
                                                                            let v1680 = &constructor_x64_and_mem(ctx, v1644, v1660, v1661);
16251
0
                                                                            let v1681 = constructor_side_effect(ctx, v1680);
16252
0
                                                                            // Rule at src/isa/x64/lower.isle line 3113.
16253
0
                                                                            return Some(v1681);
16254
18
                                                                        }
16255
0
                                                                    }
16256
0
                                                                }
16257
0
                                                            }
16258
0
                                                        }
16259
0
                                                    }
16260
1.01k
                                                }
16261
1.02k
                                                let v1664 = &C::sinkable_load(ctx, v1647.1);
16262
1.02k
                                                if let Some(
v16650
) = v1664 {
16263
0
                                                    let v1666 = C::def_inst(ctx, v1647.1);
16264
0
                                                    if let Some(v1667) = v1666 {
16265
0
                                                        let v1668 = &C::inst_data(ctx, v1667);
16266
                                                        if let &InstructionData::Load {
16267
0
                                                            opcode: ref v1669,
16268
0
                                                            arg: v1670,
16269
0
                                                            flags: v1671,
16270
0
                                                            offset: v1672,
16271
0
                                                        } = v1668 {
16272
0
                                                            if let &Opcode::Load = v1669 {
16273
0
                                                                if v1568 == v1671 {
16274
0
                                                                    if v1569 == v1672 {
16275
0
                                                                        if v1570.1 == v1670 {
16276
0
                                                                            let v1673 = &constructor_sink_load_to_reg_mem_imm(ctx, v1665);
16277
0
                                                                            let v1674 = &constructor_to_amode(ctx, v1671, v1670, v1672);
16278
0
                                                                            let v1675 = constructor_put_in_gpr(ctx, v1647.0);
16279
0
                                                                            let v1682 = &constructor_x64_and_mem(ctx, v1644, v1674, v1675);
16280
0
                                                                            let v1683 = constructor_side_effect(ctx, v1682);
16281
0
                                                                            // Rule at src/isa/x64/lower.isle line 3127.
16282
0
                                                                            return Some(v1683);
16283
0
                                                                        }
16284
0
                                                                    }
16285
0
                                                                }
16286
0
                                                            }
16287
0
                                                        }
16288
0
                                                    }
16289
1.02k
                                                }
16290
0
                                            }
16291
                                        }
16292
                                        &Opcode::Bor => {
16293
2.12k
                                            let v1592 = C::value_type(ctx, v1591);
16294
2.12k
                                            let v1643 = C::ty_32_or_64(ctx, v1592);
16295
2.12k
                                            if let Some(v1644) = v1643 {
16296
2.12k
                                                let v1647 = C::unpack_value_array_2(ctx, v1646);
16297
2.12k
                                                let v1650 = &C::sinkable_load(ctx, v1647.0);
16298
2.12k
                                                if let Some(
v16510
) = v1650 {
16299
0
                                                    let v1652 = C::def_inst(ctx, v1647.0);
16300
0
                                                    if let Some(v1653) = v1652 {
16301
0
                                                        let v1654 = &C::inst_data(ctx, v1653);
16302
                                                        if let &InstructionData::Load {
16303
0
                                                            opcode: ref v1655,
16304
0
                                                            arg: v1656,
16305
0
                                                            flags: v1657,
16306
0
                                                            offset: v1658,
16307
0
                                                        } = v1654 {
16308
0
                                                            if let &Opcode::Load = v1655 {
16309
0
                                                                if v1568 == v1657 {
16310
0
                                                                    if v1569 == v1658 {
16311
0
                                                                        if v1570.1 == v1656 {
16312
0
                                                                            let v1659 = &constructor_sink_load_to_reg_mem_imm(ctx, v1651);
16313
0
                                                                            let v1660 = &constructor_to_amode(ctx, v1657, v1656, v1658);
16314
0
                                                                            let v1661 = constructor_put_in_gpr(ctx, v1647.1);
16315
0
                                                                            let v1684 = &constructor_x64_or_mem(ctx, v1644, v1660, v1661);
16316
0
                                                                            let v1685 = constructor_side_effect(ctx, v1684);
16317
0
                                                                            // Rule at src/isa/x64/lower.isle line 3141.
16318
0
                                                                            return Some(v1685);
16319
0
                                                                        }
16320
0
                                                                    }
16321
0
                                                                }
16322
0
                                                            }
16323
0
                                                        }
16324
0
                                                    }
16325
2.12k
                                                }
16326
2.12k
                                                let v1664 = &C::sinkable_load(ctx, v1647.1);
16327
2.12k
                                                if let Some(
v16650
) = v1664 {
16328
0
                                                    let v1666 = C::def_inst(ctx, v1647.1);
16329
0
                                                    if let Some(v1667) = v1666 {
16330
0
                                                        let v1668 = &C::inst_data(ctx, v1667);
16331
                                                        if let &InstructionData::Load {
16332
0
                                                            opcode: ref v1669,
16333
0
                                                            arg: v1670,
16334
0
                                                            flags: v1671,
16335
0
                                                            offset: v1672,
16336
0
                                                        } = v1668 {
16337
0
                                                            if let &Opcode::Load = v1669 {
16338
0
                                                                if v1568 == v1671 {
16339
0
                                                                    if v1569 == v1672 {
16340
0
                                                                        if v1570.1 == v1670 {
16341
0
                                                                            let v1673 = &constructor_sink_load_to_reg_mem_imm(ctx, v1665);
16342
0
                                                                            let v1674 = &constructor_to_amode(ctx, v1671, v1670, v1672);
16343
0
                                                                            let v1675 = constructor_put_in_gpr(ctx, v1647.0);
16344
0
                                                                            let v1686 = &constructor_x64_or_mem(ctx, v1644, v1674, v1675);
16345
0
                                                                            let v1687 = constructor_side_effect(ctx, v1686);
16346
0
                                                                            // Rule at src/isa/x64/lower.isle line 3155.
16347
0
                                                                            return Some(v1687);
16348
0
                                                                        }
16349
0
                                                                    }
16350
0
                                                                }
16351
0
                                                            }
16352
0
                                                        }
16353
0
                                                    }
16354
2.12k
                                                }
16355
0
                                            }
16356
                                        }
16357
                                        &Opcode::Bxor => {
16358
222
                                            let v1592 = C::value_type(ctx, v1591);
16359
222
                                            let v1643 = C::ty_32_or_64(ctx, v1592);
16360
222
                                            if let Some(v1644) = v1643 {
16361
222
                                                let v1647 = C::unpack_value_array_2(ctx, v1646);
16362
222
                                                let v1650 = &C::sinkable_load(ctx, v1647.0);
16363
222
                                                if let Some(
v16510
) = v1650 {
16364
0
                                                    let v1652 = C::def_inst(ctx, v1647.0);
16365
0
                                                    if let Some(v1653) = v1652 {
16366
0
                                                        let v1654 = &C::inst_data(ctx, v1653);
16367
                                                        if let &InstructionData::Load {
16368
0
                                                            opcode: ref v1655,
16369
0
                                                            arg: v1656,
16370
0
                                                            flags: v1657,
16371
0
                                                            offset: v1658,
16372
0
                                                        } = v1654 {
16373
0
                                                            if let &Opcode::Load = v1655 {
16374
0
                                                                if v1568 == v1657 {
16375
0
                                                                    if v1569 == v1658 {
16376
0
                                                                        if v1570.1 == v1656 {
16377
0
                                                                            let v1659 = &constructor_sink_load_to_reg_mem_imm(ctx, v1651);
16378
0
                                                                            let v1660 = &constructor_to_amode(ctx, v1657, v1656, v1658);
16379
0
                                                                            let v1661 = constructor_put_in_gpr(ctx, v1647.1);
16380
0
                                                                            let v1688 = &constructor_x64_xor_mem(ctx, v1644, v1660, v1661);
16381
0
                                                                            let v1689 = constructor_side_effect(ctx, v1688);
16382
0
                                                                            // Rule at src/isa/x64/lower.isle line 3169.
16383
0
                                                                            return Some(v1689);
16384
0
                                                                        }
16385
0
                                                                    }
16386
0
                                                                }
16387
0
                                                            }
16388
0
                                                        }
16389
0
                                                    }
16390
222
                                                }
16391
222
                                                let v1664 = &C::sinkable_load(ctx, v1647.1);
16392
222
                                                if let Some(
v16650
) = v1664 {
16393
0
                                                    let v1666 = C::def_inst(ctx, v1647.1);
16394
0
                                                    if let Some(v1667) = v1666 {
16395
0
                                                        let v1668 = &C::inst_data(ctx, v1667);
16396
                                                        if let &InstructionData::Load {
16397
0
                                                            opcode: ref v1669,
16398
0
                                                            arg: v1670,
16399
0
                                                            flags: v1671,
16400
0
                                                            offset: v1672,
16401
0
                                                        } = v1668 {
16402
0
                                                            if let &Opcode::Load = v1669 {
16403
0
                                                                if v1568 == v1671 {
16404
0
                                                                    if v1569 == v1672 {
16405
0
                                                                        if v1570.1 == v1670 {
16406
0
                                                                            let v1673 = &constructor_sink_load_to_reg_mem_imm(ctx, v1665);
16407
0
                                                                            let v1674 = &constructor_to_amode(ctx, v1671, v1670, v1672);
16408
0
                                                                            let v1675 = constructor_put_in_gpr(ctx, v1647.0);
16409
0
                                                                            let v1690 = &constructor_x64_xor_mem(ctx, v1644, v1674, v1675);
16410
0
                                                                            let v1691 = constructor_side_effect(ctx, v1690);
16411
0
                                                                            // Rule at src/isa/x64/lower.isle line 3183.
16412
0
                                                                            return Some(v1691);
16413
0
                                                                        }
16414
0
                                                                    }
16415
0
                                                                }
16416
0
                                                            }
16417
0
                                                        }
16418
0
                                                    }
16419
222
                                                }
16420
0
                                            }
16421
                                        }
16422
3.06k
                                        _ => {}
16423
                                    }
16424
                                }
16425
                                &InstructionData::BinaryImm8 {
16426
0
                                    opcode: ref v1626,
16427
0
                                    arg: v1627,
16428
0
                                    imm: v1628,
16429
0
                                } => {
16430
0
                                    if let &Opcode::Extractlane = v1626 {
16431
0
                                        let v1592 = C::value_type(ctx, v1591);
16432
0
                                        match v1592 {
16433
                                            I8 => {
16434
0
                                                let v441 = C::use_sse41(ctx);
16435
0
                                                if v441 == true {
16436
0
                                                    let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16437
0
                                                    let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16438
0
                                                    let v1630 = constructor_put_in_xmm(ctx, v1627);
16439
0
                                                    let v1629 = C::u8_from_uimm8(ctx, v1628);
16440
0
                                                    let v1635 = &constructor_x64_pextrb_store(ctx, v1578, v1630, v1629);
16441
0
                                                    let v1636 = constructor_side_effect(ctx, v1635);
16442
0
                                                    // Rule at src/isa/x64/lower.isle line 3039.
16443
0
                                                    return Some(v1636);
16444
0
                                                }
16445
                                            }
16446
                                            I16 => {
16447
0
                                                let v441 = C::use_sse41(ctx);
16448
0
                                                if v441 == true {
16449
0
                                                    let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16450
0
                                                    let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16451
0
                                                    let v1630 = constructor_put_in_xmm(ctx, v1627);
16452
0
                                                    let v1629 = C::u8_from_uimm8(ctx, v1628);
16453
0
                                                    let v1637 = &constructor_x64_pextrw_store(ctx, v1578, v1630, v1629);
16454
0
                                                    let v1638 = constructor_side_effect(ctx, v1637);
16455
0
                                                    // Rule at src/isa/x64/lower.isle line 3046.
16456
0
                                                    return Some(v1638);
16457
0
                                                }
16458
                                            }
16459
                                            I32 => {
16460
0
                                                let v441 = C::use_sse41(ctx);
16461
0
                                                if v441 == true {
16462
0
                                                    let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16463
0
                                                    let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16464
0
                                                    let v1630 = constructor_put_in_xmm(ctx, v1627);
16465
0
                                                    let v1629 = C::u8_from_uimm8(ctx, v1628);
16466
0
                                                    let v1639 = &constructor_x64_pextrd_store(ctx, v1578, v1630, v1629);
16467
0
                                                    let v1640 = constructor_side_effect(ctx, v1639);
16468
0
                                                    // Rule at src/isa/x64/lower.isle line 3053.
16469
0
                                                    return Some(v1640);
16470
0
                                                }
16471
                                            }
16472
                                            I64 => {
16473
0
                                                let v441 = C::use_sse41(ctx);
16474
0
                                                if v441 == true {
16475
0
                                                    let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16476
0
                                                    let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16477
0
                                                    let v1630 = constructor_put_in_xmm(ctx, v1627);
16478
0
                                                    let v1629 = C::u8_from_uimm8(ctx, v1628);
16479
0
                                                    let v1641 = &constructor_x64_pextrq_store(ctx, v1578, v1630, v1629);
16480
0
                                                    let v1642 = constructor_side_effect(ctx, v1641);
16481
0
                                                    // Rule at src/isa/x64/lower.isle line 3060.
16482
0
                                                    return Some(v1642);
16483
0
                                                }
16484
                                            }
16485
                                            F32 => {
16486
0
                                                let v1629 = C::u8_from_uimm8(ctx, v1628);
16487
0
                                                if v1629 == 0x0 {
16488
0
                                                    let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16489
0
                                                    let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16490
0
                                                    let v1630 = constructor_put_in_xmm(ctx, v1627);
16491
0
                                                    let v1631 = &constructor_x64_movss_store(ctx, v1578, v1630);
16492
0
                                                    let v1632 = constructor_side_effect(ctx, v1631);
16493
0
                                                    // Rule at src/isa/x64/lower.isle line 3027.
16494
0
                                                    return Some(v1632);
16495
0
                                                }
16496
                                            }
16497
                                            F64 => {
16498
0
                                                let v1629 = C::u8_from_uimm8(ctx, v1628);
16499
0
                                                if v1629 == 0x0 {
16500
0
                                                    let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16501
0
                                                    let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16502
0
                                                    let v1630 = constructor_put_in_xmm(ctx, v1627);
16503
0
                                                    let v1633 = &constructor_x64_movsd_store(ctx, v1578, v1630);
16504
0
                                                    let v1634 = constructor_side_effect(ctx, v1633);
16505
0
                                                    // Rule at src/isa/x64/lower.isle line 3033.
16506
0
                                                    return Some(v1634);
16507
0
                                                }
16508
                                            }
16509
0
                                            _ => {}
16510
                                        }
16511
0
                                    }
16512
                                }
16513
                                &InstructionData::UnaryImm {
16514
305k
                                    opcode: ref v1596,
16515
305k
                                    imm: v1597,
16516
305k
                                } => {
16517
305k
                                    if let &Opcode::Iconst = v1596 {
16518
305k
                                        let v1592 = C::value_type(ctx, v1591);
16519
305k
                                        let v1593 = C::fits_in_64(ctx, v1592);
16520
305k
                                        if let Some(v1594) = v1593 {
16521
305k
                                            let v1598 = C::simm32(ctx, v1597);
16522
305k
                                            if let Some(
v1599253k
) = v1598 {
16523
253k
                                                let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16524
253k
                                                let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16525
253k
                                                let v1600 = &constructor_x64_movimm_m(ctx, v1594, v1578, v1599);
16526
253k
                                                let v1601 = constructor_side_effect(ctx, v1600);
16527
253k
                                                // Rule at src/isa/x64/lower.isle line 2963.
16528
253k
                                                return Some(v1601);
16529
52.2k
                                            }
16530
0
                                        }
16531
0
                                    }
16532
                                }
16533
400k
                                _ => {}
16534
                            }
16535
0
                        }
16536
42.3k
                    }
16537
622k
                    let v1573 = C::value_type(ctx, v1570.0);
16538
622k
                    match v1573 {
16539
                        I128 => {
16540
0
                            let v1615 = C::put_in_regs(ctx, v1570.0);
16541
0
                            let v1616 = constructor_value_regs_get_gpr(ctx, v1615, 0x0);
16542
0
                            let v1617 = constructor_value_regs_get_gpr(ctx, v1615, 0x1);
16543
0
                            let v1618 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16544
0
                            let v1619 = &C::amode_offset(ctx, v1618, 0x8);
16545
0
                            let v1620 = &C::amode_to_synthetic_amode(ctx, v1618);
16546
0
                            let v1621 = &constructor_x64_movrm(ctx, I64, v1620, v1616);
16547
0
                            let v1622 = &C::amode_to_synthetic_amode(ctx, v1619);
16548
0
                            let v1623 = &constructor_x64_movrm(ctx, I64, v1622, v1617);
16549
0
                            let v1624 = &constructor_side_effect_concat(ctx, v1621, v1623);
16550
0
                            let v1625 = constructor_side_effect(ctx, v1624);
16551
0
                            // Rule at src/isa/x64/lower.isle line 3008.
16552
0
                            return Some(v1625);
16553
                        }
16554
                        F32 => {
16555
0
                            let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16556
0
                            let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16557
0
                            let v1602 = constructor_put_in_xmm(ctx, v1570.0);
16558
0
                            let v1603 = &constructor_x64_movss_store(ctx, v1578, v1602);
16559
0
                            let v1604 = constructor_side_effect(ctx, v1603);
16560
0
                            // Rule at src/isa/x64/lower.isle line 2968.
16561
0
                            return Some(v1604);
16562
                        }
16563
                        F64 => {
16564
1
                            let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16565
1
                            let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16566
1
                            let v1602 = constructor_put_in_xmm(ctx, v1570.0);
16567
1
                            let v1605 = &constructor_x64_movsd_store(ctx, v1578, v1602);
16568
1
                            let v1606 = constructor_side_effect(ctx, v1605);
16569
1
                            // Rule at src/isa/x64/lower.isle line 2976.
16570
1
                            return Some(v1606);
16571
                        }
16572
                        F32X4 => {
16573
0
                            let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16574
0
                            let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16575
0
                            let v1602 = constructor_put_in_xmm(ctx, v1570.0);
16576
0
                            let v1607 = &constructor_x64_movups_store(ctx, v1578, v1602);
16577
0
                            let v1608 = constructor_side_effect(ctx, v1607);
16578
0
                            // Rule at src/isa/x64/lower.isle line 2984.
16579
0
                            return Some(v1608);
16580
                        }
16581
                        F64X2 => {
16582
0
                            let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16583
0
                            let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16584
0
                            let v1602 = constructor_put_in_xmm(ctx, v1570.0);
16585
0
                            let v1609 = &constructor_x64_movupd_store(ctx, v1578, v1602);
16586
0
                            let v1610 = constructor_side_effect(ctx, v1609);
16587
0
                            // Rule at src/isa/x64/lower.isle line 2992.
16588
0
                            return Some(v1610);
16589
                        }
16590
622k
                        _ => {}
16591
622k
                    }
16592
622k
                    let v1611 = C::ty_vec128_int(ctx, v1573);
16593
622k
                    if let Some(
v16120
) = v1611 {
16594
0
                        let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16595
0
                        let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16596
0
                        let v1602 = constructor_put_in_xmm(ctx, v1570.0);
16597
0
                        let v1613 = &constructor_x64_movdqu_store(ctx, v1578, v1602);
16598
0
                        let v1614 = constructor_side_effect(ctx, v1613);
16599
0
                        // Rule at src/isa/x64/lower.isle line 3000.
16600
0
                        return Some(v1614);
16601
622k
                    }
16602
622k
                    let v1574 = &C::type_register_class(ctx, v1573);
16603
622k
                    if let Some(v1575) = v1574 {
16604
                        if let &RegisterClass::Gpr {
16605
622k
                            single_register: v1576,
16606
622k
                        } = v1575 {
16607
622k
                            let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16608
622k
                            let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16609
622k
                            let v1579 = constructor_put_in_gpr(ctx, v1570.0);
16610
622k
                            let v1580 = &constructor_x64_movrm(ctx, v1573, v1578, v1579);
16611
622k
                            let v1581 = constructor_side_effect(ctx, v1580);
16612
622k
                            // Rule at src/isa/x64/lower.isle line 2944.
16613
622k
                            return Some(v1581);
16614
0
                        }
16615
0
                    }
16616
                }
16617
                &Opcode::Istore8 => {
16618
72.6k
                    let v1570 = C::unpack_value_array_2(ctx, v1567);
16619
72.6k
                    let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16620
72.6k
                    let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16621
72.6k
                    let v1579 = constructor_put_in_gpr(ctx, v1570.0);
16622
72.6k
                    let v1582 = &constructor_x64_movrm(ctx, I8, v1578, v1579);
16623
72.6k
                    let v1583 = constructor_side_effect(ctx, v1582);
16624
72.6k
                    // Rule at src/isa/x64/lower.isle line 2952.
16625
72.6k
                    return Some(v1583);
16626
                }
16627
                &Opcode::Istore16 => {
16628
18.7k
                    let v1570 = C::unpack_value_array_2(ctx, v1567);
16629
18.7k
                    let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16630
18.7k
                    let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16631
18.7k
                    let v1579 = constructor_put_in_gpr(ctx, v1570.0);
16632
18.7k
                    let v1584 = &constructor_x64_movrm(ctx, I16, v1578, v1579);
16633
18.7k
                    let v1585 = constructor_side_effect(ctx, v1584);
16634
18.7k
                    // Rule at src/isa/x64/lower.isle line 2955.
16635
18.7k
                    return Some(v1585);
16636
                }
16637
                &Opcode::Istore32 => {
16638
1.33k
                    let v1570 = C::unpack_value_array_2(ctx, v1567);
16639
1.33k
                    let v1577 = &constructor_to_amode(ctx, v1568, v1570.1, v1569);
16640
1.33k
                    let v1578 = &C::amode_to_synthetic_amode(ctx, v1577);
16641
1.33k
                    let v1579 = constructor_put_in_gpr(ctx, v1570.0);
16642
1.33k
                    let v1586 = &constructor_x64_movrm(ctx, I32, v1578, v1579);
16643
1.33k
                    let v1587 = constructor_side_effect(ctx, v1586);
16644
1.33k
                    // Rule at src/isa/x64/lower.isle line 2958.
16645
1.33k
                    return Some(v1587);
16646
                }
16647
0
                _ => {}
16648
            }
16649
        }
16650
        &InstructionData::StoreNoOffset {
16651
0
            opcode: ref v1725,
16652
0
            args: ref v1726,
16653
0
            flags: v1727,
16654
0
        } => {
16655
0
            if let &Opcode::AtomicStore = v1725 {
16656
0
                let v1728 = C::unpack_value_array_2(ctx, v1726);
16657
0
                let v1731 = C::value_type(ctx, v1728.0);
16658
0
                let v1732 = C::fits_in_64(ctx, v1731);
16659
0
                if let Some(v1733) = v1732 {
16660
0
                    let v1734 = C::ty_int(ctx, v1731);
16661
0
                    if let Some(v1735) = v1734 {
16662
0
                        let v48 = C::zero_offset(ctx);
16663
0
                        let v1736 = &constructor_to_amode(ctx, v1727, v1728.1, v48);
16664
0
                        let v1737 = &C::amode_to_synthetic_amode(ctx, v1736);
16665
0
                        let v1738 = constructor_put_in_gpr(ctx, v1728.0);
16666
0
                        let v1739 = &constructor_x64_movrm(ctx, v1733, v1737, v1738);
16667
0
                        let v1740 = &constructor_x64_mfence(ctx);
16668
0
                        let v1741 = &constructor_side_effect_concat(ctx, v1739, v1740);
16669
0
                        let v1742 = constructor_side_effect(ctx, v1741);
16670
0
                        // Rule at src/isa/x64/lower.isle line 3230.
16671
0
                        return Some(v1742);
16672
0
                    }
16673
0
                }
16674
0
            }
16675
        }
16676
        &InstructionData::Ternary {
16677
53.3k
            opcode: ref v652,
16678
53.3k
            args: ref v653,
16679
53.3k
        } => {
16680
53.3k
            match v652 {
16681
                &Opcode::Select => {
16682
23.3k
                    let v1 = C::first_result(ctx, arg0);
16683
23.3k
                    if let Some(v2) = v1 {
16684
23.3k
                        let v654 = C::unpack_value_array_3(ctx, v653);
16685
23.3k
                        let v1025 = C::maybe_uextend(ctx, v654.0);
16686
23.3k
                        if let Some(v1026) = v1025 {
16687
23.3k
                            let v1027 = C::def_inst(ctx, v1026);
16688
23.3k
                            if let Some(
v102821.9k
) = v1027 {
16689
21.9k
                                let v1029 = &C::inst_data(ctx, v1028);
16690
21.9k
                                match v1029 {
16691
                                    &InstructionData::FloatCompare {
16692
0
                                        opcode: ref v1030,
16693
0
                                        args: ref v1031,
16694
0
                                        cond: ref v1032,
16695
0
                                    } => {
16696
0
                                        if let &Opcode::Fcmp = v1030 {
16697
0
                                            match v1032 {
16698
                                                &FloatCC::Equal => {
16699
0
                                                    let v1033 = C::unpack_value_array_2(ctx, v1031);
16700
0
                                                    let v1039 = &constructor_emit_fcmp(ctx, &FloatCC::NotEqual, v1033.0, v1033.1);
16701
0
                                                    let v3 = C::value_type(ctx, v2);
16702
0
                                                    let v1040 = constructor_lower_select_fcmp(ctx, v3, v1039, v654.2, v654.1);
16703
0
                                                    // Rule at src/isa/x64/lower.isle line 2070.
16704
0
                                                    return Some(v1040);
16705
                                                }
16706
                                                &FloatCC::LessThan => {
16707
0
                                                    let v3 = C::value_type(ctx, v2);
16708
0
                                                    match v3 {
16709
                                                        F32 => {
16710
0
                                                            let v1033 = C::unpack_value_array_2(ctx, v1031);
16711
0
                                                            if v654.1 == v1033.1 {
16712
0
                                                                if v654.2 == v1033.0 {
16713
0
                                                                    let v1073 = constructor_put_in_xmm(ctx, v1033.1);
16714
0
                                                                    let v1074 = &C::put_in_xmm_mem(ctx, v1033.0);
16715
0
                                                                    let v1075 = constructor_x64_maxss(ctx, v1073, v1074);
16716
0
                                                                    let v1076 = constructor_output_xmm(ctx, v1075);
16717
0
                                                                    // Rule at src/isa/x64/lower.isle line 2112.
16718
0
                                                                    return Some(v1076);
16719
0
                                                                }
16720
0
                                                            }
16721
0
                                                            if v654.1 == v1033.0 {
16722
0
                                                                if v654.2 == v1033.1 {
16723
0
                                                                    let v1067 = constructor_put_in_xmm(ctx, v1033.0);
16724
0
                                                                    let v1068 = &C::put_in_xmm_mem(ctx, v1033.1);
16725
0
                                                                    let v1069 = constructor_x64_minss(ctx, v1067, v1068);
16726
0
                                                                    let v1070 = constructor_output_xmm(ctx, v1069);
16727
0
                                                                    // Rule at src/isa/x64/lower.isle line 2108.
16728
0
                                                                    return Some(v1070);
16729
0
                                                                }
16730
0
                                                            }
16731
                                                        }
16732
                                                        F64 => {
16733
0
                                                            let v1033 = C::unpack_value_array_2(ctx, v1031);
16734
0
                                                            if v654.1 == v1033.1 {
16735
0
                                                                if v654.2 == v1033.0 {
16736
0
                                                                    let v1073 = constructor_put_in_xmm(ctx, v1033.1);
16737
0
                                                                    let v1074 = &C::put_in_xmm_mem(ctx, v1033.0);
16738
0
                                                                    let v1077 = constructor_x64_maxsd(ctx, v1073, v1074);
16739
0
                                                                    let v1078 = constructor_output_xmm(ctx, v1077);
16740
0
                                                                    // Rule at src/isa/x64/lower.isle line 2114.
16741
0
                                                                    return Some(v1078);
16742
0
                                                                }
16743
0
                                                            }
16744
0
                                                            if v654.1 == v1033.0 {
16745
0
                                                                if v654.2 == v1033.1 {
16746
0
                                                                    let v1067 = constructor_put_in_xmm(ctx, v1033.0);
16747
0
                                                                    let v1068 = &C::put_in_xmm_mem(ctx, v1033.1);
16748
0
                                                                    let v1071 = constructor_x64_minsd(ctx, v1067, v1068);
16749
0
                                                                    let v1072 = constructor_output_xmm(ctx, v1071);
16750
0
                                                                    // Rule at src/isa/x64/lower.isle line 2110.
16751
0
                                                                    return Some(v1072);
16752
0
                                                                }
16753
0
                                                            }
16754
                                                        }
16755
0
                                                        _ => {}
16756
                                                    }
16757
                                                }
16758
0
                                                _ => {}
16759
                                            }
16760
0
                                            let v1033 = C::unpack_value_array_2(ctx, v1031);
16761
0
                                            let v1036 = &constructor_emit_fcmp(ctx, v1032, v1033.0, v1033.1);
16762
0
                                            let v3 = C::value_type(ctx, v2);
16763
0
                                            let v1037 = constructor_lower_select_fcmp(ctx, v3, v1036, v654.1, v654.2);
16764
0
                                            // Rule at src/isa/x64/lower.isle line 2068.
16765
0
                                            return Some(v1037);
16766
0
                                        }
16767
                                    }
16768
                                    &InstructionData::IntCompare {
16769
13.4k
                                        opcode: ref v1041,
16770
13.4k
                                        args: ref v1042,
16771
13.4k
                                        cond: ref v1043,
16772
13.4k
                                    } => {
16773
13.4k
                                        if let &Opcode::Icmp = v1041 {
16774
13.4k
                                            let v1044 = C::unpack_value_array_2(ctx, v1042);
16775
13.4k
                                            let v1047 = C::value_type(ctx, v1044.0);
16776
13.4k
                                            let v1048 = C::fits_in_64(ctx, v1047);
16777
13.4k
                                            if let Some(v1049) = v1048 {
16778
13.4k
                                                let v1050 = &constructor_emit_cmp(ctx, v1043, v1044.0, v1044.1);
16779
13.4k
                                                let v3 = C::value_type(ctx, v2);
16780
13.4k
                                                let v1051 = constructor_lower_select_icmp(ctx, v3, v1050, v654.1, v654.2);
16781
13.4k
                                                // Rule at src/isa/x64/lower.isle line 2084.
16782
13.4k
                                                return Some(v1051);
16783
0
                                            }
16784
0
                                        }
16785
                                    }
16786
8.52k
                                    _ => {}
16787
                                }
16788
1.42k
                            }
16789
0
                        }
16790
9.94k
                        let v1052 = C::value_type(ctx, v654.0);
16791
9.94k
                        let v1053 = C::fits_in_64(ctx, v1052);
16792
9.94k
                        if let Some(v1054) = v1053 {
16793
9.94k
                            let v1055 = &C::raw_operand_size_of_type(ctx, v1054);
16794
9.94k
                            let v1056 = constructor_put_in_gpr(ctx, v654.0);
16795
9.94k
                            let v1057 = &C::gpr_to_gpr_mem_imm(ctx, v1056);
16796
9.94k
                            let v1058 = &constructor_x64_test(ctx, v1055, v1057, v1056);
16797
9.94k
                            let v3 = C::value_type(ctx, v2);
16798
9.94k
                            let v1060 = &constructor_cmove_from_values(ctx, v3, &CC::NZ, v654.1, v654.2);
16799
9.94k
                            let v1061 = constructor_with_flags(ctx, v1058, v1060);
16800
9.94k
                            let v1062 = C::output(ctx, v1061);
16801
9.94k
                            // Rule at src/isa/x64/lower.isle line 2090.
16802
9.94k
                            return Some(v1062);
16803
0
                        }
16804
0
                        if v1052 == I128 {
16805
0
                            let v701 = C::put_in_regs(ctx, v654.0);
16806
0
                            let v1064 = &constructor_cmp_zero_i128(ctx, &CC::Z, v701);
16807
0
                            let v1065 = constructor_select_icmp(ctx, v1064, v654.1, v654.2);
16808
0
                            let v1066 = C::output(ctx, v1065);
16809
0
                            // Rule at src/isa/x64/lower.isle line 2097.
16810
0
                            return Some(v1066);
16811
0
                        }
16812
0
                    }
16813
                }
16814
                &Opcode::SelectSpectreGuard => {
16815
29.9k
                    let v654 = C::unpack_value_array_3(ctx, v653);
16816
29.9k
                    let v674 = C::def_inst(ctx, v654.0);
16817
29.9k
                    if let Some(v675) = v674 {
16818
29.9k
                        let v676 = &C::inst_data(ctx, v675);
16819
                        if let &InstructionData::IntCompare {
16820
29.9k
                            opcode: ref v1798,
16821
29.9k
                            args: ref v1799,
16822
29.9k
                            cond: ref v1800,
16823
29.9k
                        } = v676 {
16824
29.9k
                            if let &Opcode::Icmp = v1798 {
16825
29.9k
                                let v1801 = C::unpack_value_array_2(ctx, v1799);
16826
29.9k
                                let v1804 = &constructor_emit_cmp(ctx, v1800, v1801.0, v1801.1);
16827
29.9k
                                let v1805 = constructor_select_icmp(ctx, v1804, v654.1, v654.2);
16828
29.9k
                                let v1806 = C::output(ctx, v1805);
16829
29.9k
                                // Rule at src/isa/x64/lower.isle line 3349.
16830
29.9k
                                return Some(v1806);
16831
0
                            }
16832
0
                        }
16833
0
                    }
16834
0
                    let v1 = C::first_result(ctx, arg0);
16835
0
                    if let Some(v2) = v1 {
16836
0
                        let v1052 = C::value_type(ctx, v654.0);
16837
0
                        let v1053 = C::fits_in_64(ctx, v1052);
16838
0
                        if let Some(v1054) = v1053 {
16839
0
                            let v1055 = &C::raw_operand_size_of_type(ctx, v1054);
16840
0
                            let v1056 = constructor_put_in_gpr(ctx, v654.0);
16841
0
                            let v1057 = &C::gpr_to_gpr_mem_imm(ctx, v1056);
16842
0
                            let v1058 = &constructor_x64_test(ctx, v1055, v1057, v1056);
16843
0
                            let v3 = C::value_type(ctx, v2);
16844
0
                            let v1060 = &constructor_cmove_from_values(ctx, v3, &CC::NZ, v654.1, v654.2);
16845
0
                            let v1061 = constructor_with_flags(ctx, v1058, v1060);
16846
0
                            let v1062 = C::output(ctx, v1061);
16847
0
                            // Rule at src/isa/x64/lower.isle line 3352.
16848
0
                            return Some(v1062);
16849
0
                        }
16850
0
                        if v1052 == I128 {
16851
0
                            let v701 = C::put_in_regs(ctx, v654.0);
16852
0
                            let v1064 = &constructor_cmp_zero_i128(ctx, &CC::Z, v701);
16853
0
                            let v1065 = constructor_select_icmp(ctx, v1064, v654.1, v654.2);
16854
0
                            let v1066 = C::output(ctx, v1065);
16855
0
                            // Rule at src/isa/x64/lower.isle line 3357.
16856
0
                            return Some(v1066);
16857
0
                        }
16858
0
                    }
16859
                }
16860
                &Opcode::Bitselect => {
16861
0
                    let v1 = C::first_result(ctx, arg0);
16862
0
                    if let Some(v2) = v1 {
16863
0
                        let v3 = C::value_type(ctx, v2);
16864
0
                        let v162 = C::ty_scalar_float(ctx, v3);
16865
0
                        if let Some(v163) = v162 {
16866
0
                            let v654 = C::unpack_value_array_3(ctx, v653);
16867
0
                            let v658 = constructor_put_in_xmm(ctx, v654.0);
16868
0
                            let v670 = &C::put_in_xmm_mem(ctx, v654.1);
16869
0
                            let v721 = constructor_sse_and(ctx, v163, v658, v670);
16870
0
                            let v722 = constructor_put_in_xmm(ctx, v654.0);
16871
0
                            let v723 = constructor_vector_all_ones(ctx);
16872
0
                            let v724 = &C::xmm_to_xmm_mem(ctx, v723);
16873
0
                            let v725 = constructor_x64_xor_vector(ctx, v163, v722, v724);
16874
0
                            let v726 = &C::put_in_xmm_mem(ctx, v654.2);
16875
0
                            let v727 = constructor_sse_and(ctx, v163, v725, v726);
16876
0
                            let v728 = &C::xmm_to_xmm_mem(ctx, v727);
16877
0
                            let v729 = constructor_sse_or(ctx, v163, v721, v728);
16878
0
                            let v730 = constructor_output_xmm(ctx, v729);
16879
0
                            // Rule at src/isa/x64/lower.isle line 1458.
16880
0
                            return Some(v730);
16881
0
                        }
16882
0
                        let v709 = C::ty_int_ref_scalar_64_extract(ctx, v3);
16883
0
                        if let Some(v710) = v709 {
16884
0
                            let v654 = C::unpack_value_array_3(ctx, v653);
16885
0
                            let v711 = constructor_put_in_gpr(ctx, v654.0);
16886
0
                            let v712 = &constructor_put_in_gpr_mem_imm(ctx, v654.1);
16887
0
                            let v713 = constructor_x64_and(ctx, v710, v711, v712);
16888
0
                            let v714 = constructor_put_in_gpr(ctx, v654.0);
16889
0
                            let v715 = constructor_x64_not(ctx, v710, v714);
16890
0
                            let v716 = &constructor_put_in_gpr_mem_imm(ctx, v654.2);
16891
0
                            let v717 = constructor_x64_and(ctx, v710, v715, v716);
16892
0
                            let v718 = &C::gpr_to_gpr_mem_imm(ctx, v717);
16893
0
                            let v719 = constructor_x64_or(ctx, v710, v713, v718);
16894
0
                            let v720 = constructor_output_gpr(ctx, v719);
16895
0
                            // Rule at src/isa/x64/lower.isle line 1453.
16896
0
                            return Some(v720);
16897
0
                        }
16898
0
                        match v3 {
16899
                            I128 => {
16900
0
                                let v654 = C::unpack_value_array_3(ctx, v653);
16901
0
                                let v701 = C::put_in_regs(ctx, v654.0);
16902
0
                                let v702 = C::put_in_regs(ctx, v654.1);
16903
0
                                let v703 = constructor_and_i128(ctx, v701, v702);
16904
0
                                let v704 = constructor_i128_not(ctx, v654.0);
16905
0
                                let v705 = C::put_in_regs(ctx, v654.2);
16906
0
                                let v706 = constructor_and_i128(ctx, v704, v705);
16907
0
                                let v707 = constructor_or_i128(ctx, v703, v706);
16908
0
                                let v708 = C::output(ctx, v707);
16909
0
                                // Rule at src/isa/x64/lower.isle line 1448.
16910
0
                                return Some(v708);
16911
                            }
16912
                            F32X4 => {
16913
0
                                let v654 = C::unpack_value_array_3(ctx, v653);
16914
0
                                let v674 = C::def_inst(ctx, v654.0);
16915
0
                                if let Some(v675) = v674 {
16916
0
                                    let v676 = &C::inst_data(ctx, v675);
16917
                                    if let &InstructionData::LoadNoOffset {
16918
0
                                        opcode: ref v677,
16919
0
                                        arg: v678,
16920
0
                                        flags: v679,
16921
0
                                    } = v676 {
16922
0
                                        if let &Opcode::Bitcast = v677 {
16923
0
                                            let v680 = C::def_inst(ctx, v678);
16924
0
                                            if let Some(v681) = v680 {
16925
0
                                                let v682 = &C::inst_data(ctx, v681);
16926
                                                if let &InstructionData::FloatCompare {
16927
0
                                                    opcode: ref v683,
16928
0
                                                    args: ref v684,
16929
0
                                                    cond: ref v685,
16930
0
                                                } = v682 {
16931
0
                                                    if let &Opcode::Fcmp = v683 {
16932
0
                                                        if let &FloatCC::LessThan = v685 {
16933
0
                                                            let v686 = C::unpack_value_array_2(ctx, v684);
16934
0
                                                            if v654.1 == v686.1 {
16935
0
                                                                if v654.2 == v686.0 {
16936
0
                                                                    let v695 = constructor_put_in_xmm(ctx, v686.1);
16937
0
                                                                    let v696 = &C::put_in_xmm_mem(ctx, v686.0);
16938
0
                                                                    let v697 = constructor_x64_maxps(ctx, v695, v696);
16939
0
                                                                    let v698 = constructor_output_xmm(ctx, v697);
16940
0
                                                                    // Rule at src/isa/x64/lower.isle line 1441.
16941
0
                                                                    return Some(v698);
16942
0
                                                                }
16943
0
                                                            }
16944
0
                                                            if v654.1 == v686.0 {
16945
0
                                                                if v654.2 == v686.1 {
16946
0
                                                                    let v689 = constructor_put_in_xmm(ctx, v686.0);
16947
0
                                                                    let v690 = &C::put_in_xmm_mem(ctx, v686.1);
16948
0
                                                                    let v691 = constructor_x64_minps(ctx, v689, v690);
16949
0
                                                                    let v692 = constructor_output_xmm(ctx, v691);
16950
0
                                                                    // Rule at src/isa/x64/lower.isle line 1436.
16951
0
                                                                    return Some(v692);
16952
0
                                                                }
16953
0
                                                            }
16954
0
                                                        }
16955
0
                                                    }
16956
0
                                                }
16957
0
                                            }
16958
0
                                        }
16959
0
                                    }
16960
0
                                }
16961
                            }
16962
                            F64X2 => {
16963
0
                                let v654 = C::unpack_value_array_3(ctx, v653);
16964
0
                                let v674 = C::def_inst(ctx, v654.0);
16965
0
                                if let Some(v675) = v674 {
16966
0
                                    let v676 = &C::inst_data(ctx, v675);
16967
                                    if let &InstructionData::LoadNoOffset {
16968
0
                                        opcode: ref v677,
16969
0
                                        arg: v678,
16970
0
                                        flags: v679,
16971
0
                                    } = v676 {
16972
0
                                        if let &Opcode::Bitcast = v677 {
16973
0
                                            let v680 = C::def_inst(ctx, v678);
16974
0
                                            if let Some(v681) = v680 {
16975
0
                                                let v682 = &C::inst_data(ctx, v681);
16976
                                                if let &InstructionData::FloatCompare {
16977
0
                                                    opcode: ref v683,
16978
0
                                                    args: ref v684,
16979
0
                                                    cond: ref v685,
16980
0
                                                } = v682 {
16981
0
                                                    if let &Opcode::Fcmp = v683 {
16982
0
                                                        if let &FloatCC::LessThan = v685 {
16983
0
                                                            let v686 = C::unpack_value_array_2(ctx, v684);
16984
0
                                                            if v654.1 == v686.1 {
16985
0
                                                                if v654.2 == v686.0 {
16986
0
                                                                    let v695 = constructor_put_in_xmm(ctx, v686.1);
16987
0
                                                                    let v696 = &C::put_in_xmm_mem(ctx, v686.0);
16988
0
                                                                    let v699 = constructor_x64_maxpd(ctx, v695, v696);
16989
0
                                                                    let v700 = constructor_output_xmm(ctx, v699);
16990
0
                                                                    // Rule at src/isa/x64/lower.isle line 1443.
16991
0
                                                                    return Some(v700);
16992
0
                                                                }
16993
0
                                                            }
16994
0
                                                            if v654.1 == v686.0 {
16995
0
                                                                if v654.2 == v686.1 {
16996
0
                                                                    let v689 = constructor_put_in_xmm(ctx, v686.0);
16997
0
                                                                    let v690 = &C::put_in_xmm_mem(ctx, v686.1);
16998
0
                                                                    let v693 = constructor_x64_minpd(ctx, v689, v690);
16999
0
                                                                    let v694 = constructor_output_xmm(ctx, v693);
17000
0
                                                                    // Rule at src/isa/x64/lower.isle line 1438.
17001
0
                                                                    return Some(v694);
17002
0
                                                                }
17003
0
                                                            }
17004
0
                                                        }
17005
0
                                                    }
17006
0
                                                }
17007
0
                                            }
17008
0
                                        }
17009
0
                                    }
17010
0
                                }
17011
                            }
17012
0
                            _ => {}
17013
                        }
17014
0
                        let v64 = C::multi_lane(ctx, v3);
17015
0
                        if let Some(v65) = v64 {
17016
0
                            let v441 = C::use_sse41(ctx);
17017
0
                            if v441 == true {
17018
0
                                let v654 = C::unpack_value_array_3(ctx, v653);
17019
0
                                let v667 = constructor_all_ones_or_all_zeros(ctx, v654.0);
17020
0
                                if let Some(v668) = v667 {
17021
0
                                    let v669 = constructor_put_in_xmm(ctx, v654.2);
17022
0
                                    let v670 = &C::put_in_xmm_mem(ctx, v654.1);
17023
0
                                    let v671 = constructor_put_in_xmm(ctx, v654.0);
17024
0
                                    let v672 = constructor_x64_pblendvb(ctx, v669, v670, v671);
17025
0
                                    let v673 = constructor_output_xmm(ctx, v672);
17026
0
                                    // Rule at src/isa/x64/lower.isle line 1415.
17027
0
                                    return Some(v673);
17028
0
                                }
17029
0
                            }
17030
0
                            let v654 = C::unpack_value_array_3(ctx, v653);
17031
0
                            let v658 = constructor_put_in_xmm(ctx, v654.0);
17032
0
                            let v659 = constructor_put_in_xmm(ctx, v654.1);
17033
0
                            let v660 = &C::xmm_to_xmm_mem(ctx, v658);
17034
0
                            let v661 = constructor_sse_and(ctx, v3, v659, v660);
17035
0
                            let v662 = &C::put_in_xmm_mem(ctx, v654.2);
17036
0
                            let v663 = constructor_sse_and_not(ctx, v3, v658, v662);
17037
0
                            let v664 = &C::xmm_to_xmm_mem(ctx, v661);
17038
0
                            let v665 = constructor_sse_or(ctx, v3, v663, v664);
17039
0
                            let v666 = constructor_output_xmm(ctx, v665);
17040
0
                            // Rule at src/isa/x64/lower.isle line 1401.
17041
0
                            return Some(v666);
17042
0
                        }
17043
0
                    }
17044
                }
17045
                &Opcode::X86Blendv => {
17046
0
                    let v1 = C::first_result(ctx, arg0);
17047
0
                    if let Some(v2) = v1 {
17048
0
                        let v3 = C::value_type(ctx, v2);
17049
0
                        match v3 {
17050
                            I8X16 => {
17051
0
                                let v441 = C::use_sse41(ctx);
17052
0
                                if v441 == true {
17053
0
                                    let v654 = C::unpack_value_array_3(ctx, v653);
17054
0
                                    let v669 = constructor_put_in_xmm(ctx, v654.2);
17055
0
                                    let v670 = &C::put_in_xmm_mem(ctx, v654.1);
17056
0
                                    let v671 = constructor_put_in_xmm(ctx, v654.0);
17057
0
                                    let v672 = constructor_x64_pblendvb(ctx, v669, v670, v671);
17058
0
                                    let v673 = constructor_output_xmm(ctx, v672);
17059
0
                                    // Rule at src/isa/x64/lower.isle line 1466.
17060
0
                                    return Some(v673);
17061
0
                                }
17062
                            }
17063
                            I32X4 => {
17064
0
                                let v441 = C::use_sse41(ctx);
17065
0
                                if v441 == true {
17066
0
                                    let v654 = C::unpack_value_array_3(ctx, v653);
17067
0
                                    let v669 = constructor_put_in_xmm(ctx, v654.2);
17068
0
                                    let v670 = &C::put_in_xmm_mem(ctx, v654.1);
17069
0
                                    let v671 = constructor_put_in_xmm(ctx, v654.0);
17070
0
                                    let v731 = constructor_x64_blendvps(ctx, v669, v670, v671);
17071
0
                                    let v732 = constructor_output_xmm(ctx, v731);
17072
0
                                    // Rule at src/isa/x64/lower.isle line 1471.
17073
0
                                    return Some(v732);
17074
0
                                }
17075
                            }
17076
                            I64X2 => {
17077
0
                                let v441 = C::use_sse41(ctx);
17078
0
                                if v441 == true {
17079
0
                                    let v654 = C::unpack_value_array_3(ctx, v653);
17080
0
                                    let v669 = constructor_put_in_xmm(ctx, v654.2);
17081
0
                                    let v670 = &C::put_in_xmm_mem(ctx, v654.1);
17082
0
                                    let v671 = constructor_put_in_xmm(ctx, v654.0);
17083
0
                                    let v733 = constructor_x64_blendvpd(ctx, v669, v670, v671);
17084
0
                                    let v734 = constructor_output_xmm(ctx, v733);
17085
0
                                    // Rule at src/isa/x64/lower.isle line 1476.
17086
0
                                    return Some(v734);
17087
0
                                }
17088
                            }
17089
0
                            _ => {}
17090
                        }
17091
0
                    }
17092
                }
17093
                &Opcode::Fma => {
17094
0
                    let v1 = C::first_result(ctx, arg0);
17095
0
                    if let Some(v2) = v1 {
17096
0
                        let v1485 = C::use_fma(ctx);
17097
0
                        if v1485 == true {
17098
0
                            let v3 = C::value_type(ctx, v2);
17099
0
                            let v654 = C::unpack_value_array_3(ctx, v653);
17100
0
                            let v1486 = constructor_fmadd(ctx, v3, v654.0, v654.1, v654.2);
17101
0
                            let v1487 = constructor_output_xmm(ctx, v1486);
17102
0
                            // Rule at src/isa/x64/lower.isle line 2823.
17103
0
                            return Some(v1487);
17104
0
                        }
17105
0
                        let v3 = C::value_type(ctx, v2);
17106
0
                        match v3 {
17107
                            F32 => {
17108
0
                                let v654 = C::unpack_value_array_3(ctx, v653);
17109
0
                                let v1406 = C::put_in_reg(ctx, v654.0);
17110
0
                                let v1407 = C::put_in_reg(ctx, v654.1);
17111
0
                                let v1408 = C::put_in_reg(ctx, v654.2);
17112
0
                                let v1409 = C::libcall_3(ctx, &LibCall::FmaF32, v1406, v1407, v1408);
17113
0
                                let v1410 = constructor_output_reg(ctx, v1409);
17114
0
                                // Rule at src/isa/x64/lower.isle line 2778.
17115
0
                                return Some(v1410);
17116
                            }
17117
                            F64 => {
17118
0
                                let v654 = C::unpack_value_array_3(ctx, v653);
17119
0
                                let v1406 = C::put_in_reg(ctx, v654.0);
17120
0
                                let v1407 = C::put_in_reg(ctx, v654.1);
17121
0
                                let v1408 = C::put_in_reg(ctx, v654.2);
17122
0
                                let v1412 = C::libcall_3(ctx, &LibCall::FmaF64, v1406, v1407, v1408);
17123
0
                                let v1413 = constructor_output_reg(ctx, v1412);
17124
0
                                // Rule at src/isa/x64/lower.isle line 2780.
17125
0
                                return Some(v1413);
17126
                            }
17127
                            F32X4 => {
17128
0
                                let v654 = C::unpack_value_array_3(ctx, v653);
17129
0
                                let v658 = constructor_put_in_xmm(ctx, v654.0);
17130
0
                                let v659 = constructor_put_in_xmm(ctx, v654.1);
17131
0
                                let v1414 = constructor_put_in_xmm(ctx, v654.2);
17132
0
                                let v1415 = C::xmm_to_reg(ctx, v658);
17133
0
                                let v1416 = C::xmm_to_reg(ctx, v659);
17134
0
                                let v1417 = C::xmm_to_reg(ctx, v1414);
17135
0
                                let v1418 = C::libcall_3(ctx, &LibCall::FmaF32, v1415, v1416, v1417);
17136
0
                                let v1419 = C::xmm_new(ctx, v1418);
17137
0
                                let v1420 = &C::xmm_to_xmm_mem(ctx, v658);
17138
0
                                let v1422 = constructor_x64_pshufd(ctx, v1420, 0x1);
17139
0
                                let v1423 = C::xmm_to_reg(ctx, v1422);
17140
0
                                let v1424 = &C::xmm_to_xmm_mem(ctx, v659);
17141
0
                                let v1425 = constructor_x64_pshufd(ctx, v1424, 0x1);
17142
0
                                let v1426 = C::xmm_to_reg(ctx, v1425);
17143
0
                                let v1427 = &C::xmm_to_xmm_mem(ctx, v1414);
17144
0
                                let v1428 = constructor_x64_pshufd(ctx, v1427, 0x1);
17145
0
                                let v1429 = C::xmm_to_reg(ctx, v1428);
17146
0
                                let v1430 = C::libcall_3(ctx, &LibCall::FmaF32, v1423, v1426, v1429);
17147
0
                                let v1431 = C::xmm_new(ctx, v1430);
17148
0
                                let v1432 = &C::xmm_to_xmm_mem(ctx, v658);
17149
0
                                let v1434 = constructor_x64_pshufd(ctx, v1432, 0x2);
17150
0
                                let v1435 = C::xmm_to_reg(ctx, v1434);
17151
0
                                let v1436 = &C::xmm_to_xmm_mem(ctx, v659);
17152
0
                                let v1437 = constructor_x64_pshufd(ctx, v1436, 0x2);
17153
0
                                let v1438 = C::xmm_to_reg(ctx, v1437);
17154
0
                                let v1439 = &C::xmm_to_xmm_mem(ctx, v1414);
17155
0
                                let v1440 = constructor_x64_pshufd(ctx, v1439, 0x2);
17156
0
                                let v1441 = C::xmm_to_reg(ctx, v1440);
17157
0
                                let v1442 = C::libcall_3(ctx, &LibCall::FmaF32, v1435, v1438, v1441);
17158
0
                                let v1443 = C::xmm_new(ctx, v1442);
17159
0
                                let v1444 = &C::xmm_to_xmm_mem(ctx, v658);
17160
0
                                let v1446 = constructor_x64_pshufd(ctx, v1444, 0x3);
17161
0
                                let v1447 = C::xmm_to_reg(ctx, v1446);
17162
0
                                let v1448 = &C::xmm_to_xmm_mem(ctx, v659);
17163
0
                                let v1449 = constructor_x64_pshufd(ctx, v1448, 0x3);
17164
0
                                let v1450 = C::xmm_to_reg(ctx, v1449);
17165
0
                                let v1451 = &C::xmm_to_xmm_mem(ctx, v1414);
17166
0
                                let v1452 = constructor_x64_pshufd(ctx, v1451, 0x3);
17167
0
                                let v1453 = C::xmm_to_reg(ctx, v1452);
17168
0
                                let v1454 = C::libcall_3(ctx, &LibCall::FmaF32, v1447, v1450, v1453);
17169
0
                                let v1455 = C::xmm_new(ctx, v1454);
17170
0
                                let v1456 = C::xmm_to_reg(ctx, v1431);
17171
0
                                let v1457 = &constructor_xmm_to_reg_mem(ctx, v1456);
17172
0
                                let v1458 = &C::xmm_mem_to_reg_mem(ctx, v1457);
17173
0
                                let v1459 = constructor_vec_insert_lane(ctx, F32X4, v1419, v1458, 0x1);
17174
0
                                let v1460 = C::xmm_to_reg(ctx, v1443);
17175
0
                                let v1461 = &constructor_xmm_to_reg_mem(ctx, v1460);
17176
0
                                let v1462 = &C::xmm_mem_to_reg_mem(ctx, v1461);
17177
0
                                let v1463 = constructor_vec_insert_lane(ctx, F32X4, v1459, v1462, 0x2);
17178
0
                                let v1464 = C::xmm_to_reg(ctx, v1455);
17179
0
                                let v1465 = &constructor_xmm_to_reg_mem(ctx, v1464);
17180
0
                                let v1466 = &C::xmm_mem_to_reg_mem(ctx, v1465);
17181
0
                                let v1467 = constructor_vec_insert_lane(ctx, F32X4, v1463, v1466, 0x3);
17182
0
                                let v1468 = constructor_output_xmm(ctx, v1467);
17183
0
                                // Rule at src/isa/x64/lower.isle line 2783.
17184
0
                                return Some(v1468);
17185
                            }
17186
                            F64X2 => {
17187
0
                                let v654 = C::unpack_value_array_3(ctx, v653);
17188
0
                                let v658 = constructor_put_in_xmm(ctx, v654.0);
17189
0
                                let v659 = constructor_put_in_xmm(ctx, v654.1);
17190
0
                                let v1414 = constructor_put_in_xmm(ctx, v654.2);
17191
0
                                let v1415 = C::xmm_to_reg(ctx, v658);
17192
0
                                let v1416 = C::xmm_to_reg(ctx, v659);
17193
0
                                let v1417 = C::xmm_to_reg(ctx, v1414);
17194
0
                                let v1469 = C::libcall_3(ctx, &LibCall::FmaF64, v1415, v1416, v1417);
17195
0
                                let v1470 = C::xmm_new(ctx, v1469);
17196
0
                                let v1420 = &C::xmm_to_xmm_mem(ctx, v658);
17197
0
                                let v1472 = constructor_x64_pshufd(ctx, v1420, 0xEE);
17198
0
                                let v1473 = C::xmm_to_reg(ctx, v1472);
17199
0
                                let v1424 = &C::xmm_to_xmm_mem(ctx, v659);
17200
0
                                let v1474 = constructor_x64_pshufd(ctx, v1424, 0xEE);
17201
0
                                let v1475 = C::xmm_to_reg(ctx, v1474);
17202
0
                                let v1427 = &C::xmm_to_xmm_mem(ctx, v1414);
17203
0
                                let v1476 = constructor_x64_pshufd(ctx, v1427, 0xEE);
17204
0
                                let v1477 = C::xmm_to_reg(ctx, v1476);
17205
0
                                let v1478 = C::libcall_3(ctx, &LibCall::FmaF64, v1473, v1475, v1477);
17206
0
                                let v1479 = C::xmm_new(ctx, v1478);
17207
0
                                let v1480 = C::xmm_to_reg(ctx, v1479);
17208
0
                                let v1481 = &constructor_xmm_to_reg_mem(ctx, v1480);
17209
0
                                let v1482 = &C::xmm_mem_to_reg_mem(ctx, v1481);
17210
0
                                let v1483 = constructor_vec_insert_lane(ctx, F64X2, v1470, v1482, 0x1);
17211
0
                                let v1484 = constructor_output_xmm(ctx, v1483);
17212
0
                                // Rule at src/isa/x64/lower.isle line 2807.
17213
0
                                return Some(v1484);
17214
                            }
17215
0
                            _ => {}
17216
                        }
17217
0
                    }
17218
                }
17219
0
                _ => {}
17220
            }
17221
        }
17222
        &InstructionData::TernaryImm8 {
17223
0
            opcode: ref v735,
17224
0
            args: ref v736,
17225
0
            imm: v737,
17226
0
        } => {
17227
0
            if let &Opcode::Insertlane = v735 {
17228
0
                let v738 = C::unpack_value_array_2(ctx, v736);
17229
0
                let v743 = constructor_put_in_xmm(ctx, v738.0);
17230
0
                let v744 = &C::put_in_reg_mem(ctx, v738.1);
17231
0
                let v741 = C::value_type(ctx, v738.0);
17232
0
                let v742 = C::u8_from_uimm8(ctx, v737);
17233
0
                let v745 = constructor_vec_insert_lane(ctx, v741, v743, v744, v742);
17234
0
                let v746 = constructor_output_xmm(ctx, v745);
17235
0
                // Rule at src/isa/x64/lower.isle line 1483.
17236
0
                return Some(v746);
17237
0
            }
17238
        }
17239
        &InstructionData::Trap {
17240
117k
            opcode: ref v805,
17241
117k
            code: ref v806,
17242
117k
        } => {
17243
117k
            match v805 {
17244
                &Opcode::Trap => {
17245
117k
                    let v807 = &constructor_x64_ud2(ctx, v806);
17246
117k
                    let v808 = constructor_side_effect(ctx, v807);
17247
117k
                    // Rule at src/isa/x64/lower.isle line 1786.
17248
117k
                    return Some(v808);
17249
                }
17250
                &Opcode::ResumableTrap => {
17251
0
                    let v807 = &constructor_x64_ud2(ctx, v806);
17252
0
                    let v808 = constructor_side_effect(ctx, v807);
17253
0
                    // Rule at src/isa/x64/lower.isle line 1813.
17254
0
                    return Some(v808);
17255
                }
17256
0
                _ => {}
17257
            }
17258
        }
17259
        &InstructionData::Unary {
17260
795k
            opcode: ref v380,
17261
795k
            arg: v381,
17262
795k
        } => {
17263
795k
            match v380 {
17264
                &Opcode::Splat => {
17265
0
                    let v1 = C::first_result(ctx, arg0);
17266
0
                    if let Some(v2) = v1 {
17267
0
                        let v3 = C::value_type(ctx, v2);
17268
0
                        let v64 = C::multi_lane(ctx, v3);
17269
0
                        if let Some(v65) = v64 {
17270
0
                            match v65.0 {
17271
                                0x20 => {
17272
0
                                    if v65.1 == 0x4 {
17273
0
                                        let v2416 = &C::sinkable_load(ctx, v381);
17274
0
                                        if let Some(v2417) = v2416 {
17275
0
                                            let v2482 = C::use_avx(ctx);
17276
0
                                            if v2482 == true {
17277
0
                                                let v2483 = &constructor_sink_load_to_xmm_mem(ctx, v2417);
17278
0
                                                let v2484 = constructor_x64_vbroadcastss(ctx, v2483);
17279
0
                                                let v2485 = constructor_output_xmm(ctx, v2484);
17280
0
                                                // Rule at src/isa/x64/lower.isle line 4543.
17281
0
                                                return Some(v2485);
17282
0
                                            }
17283
0
                                            let v2420 = &C::sink_load(ctx, v2417);
17284
0
                                            let v2421 = constructor_x64_movss_load(ctx, v2420);
17285
0
                                            let v2479 = &C::xmm_to_xmm_mem(ctx, v2421);
17286
0
                                            let v2480 = constructor_x64_shufps(ctx, v2421, v2479, 0x0);
17287
0
                                            let v2481 = constructor_output_xmm(ctx, v2480);
17288
0
                                            // Rule at src/isa/x64/lower.isle line 4540.
17289
0
                                            return Some(v2481);
17290
0
                                        }
17291
0
                                    }
17292
                                }
17293
                                0x40 => {
17294
0
                                    if v65.1 == 0x2 {
17295
0
                                        let v525 = C::use_ssse3(ctx);
17296
0
                                        if v525 == true {
17297
0
                                            let v2416 = &C::sinkable_load(ctx, v381);
17298
0
                                            if let Some(v2417) = v2416 {
17299
0
                                                let v2483 = &constructor_sink_load_to_xmm_mem(ctx, v2417);
17300
0
                                                let v2493 = constructor_x64_movddup(ctx, v2483);
17301
0
                                                let v2494 = constructor_output_xmm(ctx, v2493);
17302
0
                                                // Rule at src/isa/x64/lower.isle line 4554.
17303
0
                                                return Some(v2494);
17304
0
                                            }
17305
0
                                        }
17306
0
                                    }
17307
                                }
17308
0
                                _ => {}
17309
                            }
17310
0
                        }
17311
0
                        match v3 {
17312
                            I8X16 => {
17313
0
                                let v2446 = &C::sinkable_load_exact(ctx, v381);
17314
0
                                if let Some(v2447) = v2446 {
17315
0
                                    let v2442 = C::use_avx2(ctx);
17316
0
                                    if v2442 == true {
17317
0
                                        let v2453 = &constructor_sink_load_to_xmm_mem(ctx, v2447);
17318
0
                                        let v2454 = constructor_x64_vpbroadcastb(ctx, v2453);
17319
0
                                        let v2455 = constructor_output_xmm(ctx, v2454);
17320
0
                                        // Rule at src/isa/x64/lower.isle line 4491.
17321
0
                                        return Some(v2455);
17322
0
                                    }
17323
0
                                    let v441 = C::use_sse41(ctx);
17324
0
                                    if v441 == true {
17325
0
                                        let v525 = C::use_ssse3(ctx);
17326
0
                                        if v525 == true {
17327
0
                                            let v2448 = constructor_xmm_uninit_value(ctx);
17328
0
                                            let v2449 = &constructor_sink_load_to_gpr_mem(ctx, v2447);
17329
0
                                            let v2450 = constructor_x64_pinsrb(ctx, v2448, v2449, 0x0);
17330
0
                                            let v969 = constructor_xmm_zero(ctx, I8X16);
17331
0
                                            let v970 = &C::xmm_to_xmm_mem(ctx, v969);
17332
0
                                            let v2451 = constructor_x64_pshufb(ctx, v2450, v970);
17333
0
                                            let v2452 = constructor_output_xmm(ctx, v2451);
17334
0
                                            // Rule at src/isa/x64/lower.isle line 4487.
17335
0
                                            return Some(v2452);
17336
0
                                        }
17337
0
                                    }
17338
0
                                }
17339
0
                                let v2442 = C::use_avx2(ctx);
17340
0
                                if v2442 == true {
17341
0
                                    let v382 = constructor_put_in_gpr(ctx, v381);
17342
0
                                    let v2437 = constructor_bitcast_gpr_to_xmm(ctx, I32, v382);
17343
0
                                    let v2443 = &C::xmm_to_xmm_mem(ctx, v2437);
17344
0
                                    let v2444 = constructor_x64_vpbroadcastb(ctx, v2443);
17345
0
                                    let v2445 = constructor_output_xmm(ctx, v2444);
17346
0
                                    // Rule at src/isa/x64/lower.isle line 4484.
17347
0
                                    return Some(v2445);
17348
0
                                }
17349
0
                                let v525 = C::use_ssse3(ctx);
17350
0
                                if v525 == true {
17351
0
                                    let v382 = constructor_put_in_gpr(ctx, v381);
17352
0
                                    let v2437 = constructor_bitcast_gpr_to_xmm(ctx, I32, v382);
17353
0
                                    let v2438 = constructor_xmm_zero(ctx, I8X16);
17354
0
                                    let v2439 = &C::xmm_to_xmm_mem(ctx, v2438);
17355
0
                                    let v2440 = constructor_x64_pshufb(ctx, v2437, v2439);
17356
0
                                    let v2441 = constructor_output_xmm(ctx, v2440);
17357
0
                                    // Rule at src/isa/x64/lower.isle line 4481.
17358
0
                                    return Some(v2441);
17359
0
                                }
17360
0
                                let v2427 = &constructor_put_in_gpr_mem(ctx, v381);
17361
0
                                let v2428 = constructor_x64_movd_to_xmm(ctx, v2427);
17362
0
                                let v2429 = &C::xmm_to_xmm_mem(ctx, v2428);
17363
0
                                let v2430 = constructor_x64_punpcklbw(ctx, v2428, v2429);
17364
0
                                let v2431 = &C::xmm_to_xmm_mem(ctx, v2430);
17365
0
                                let v2433 = constructor_x64_pshuflw(ctx, v2431, 0x0);
17366
0
                                let v2434 = &C::xmm_to_xmm_mem(ctx, v2433);
17367
0
                                let v2435 = constructor_x64_pshufd(ctx, v2434, 0x0);
17368
0
                                let v2436 = constructor_output_xmm(ctx, v2435);
17369
0
                                // Rule at src/isa/x64/lower.isle line 4478.
17370
0
                                return Some(v2436);
17371
                            }
17372
                            I16X8 => {
17373
0
                                let v2446 = &C::sinkable_load_exact(ctx, v381);
17374
0
                                if let Some(v2447) = v2446 {
17375
0
                                    let v2442 = C::use_avx2(ctx);
17376
0
                                    if v2442 == true {
17377
0
                                        let v2453 = &constructor_sink_load_to_xmm_mem(ctx, v2447);
17378
0
                                        let v2468 = constructor_x64_vpbroadcastw(ctx, v2453);
17379
0
                                        let v2469 = constructor_output_xmm(ctx, v2468);
17380
0
                                        // Rule at src/isa/x64/lower.isle line 4507.
17381
0
                                        return Some(v2469);
17382
0
                                    }
17383
0
                                    let v2448 = constructor_xmm_uninit_value(ctx);
17384
0
                                    let v2449 = &constructor_sink_load_to_gpr_mem(ctx, v2447);
17385
0
                                    let v2462 = constructor_x64_pinsrw(ctx, v2448, v2449, 0x0);
17386
0
                                    let v2463 = &C::xmm_to_xmm_mem(ctx, v2462);
17387
0
                                    let v2464 = constructor_x64_pshuflw(ctx, v2463, 0x0);
17388
0
                                    let v2465 = &C::xmm_to_xmm_mem(ctx, v2464);
17389
0
                                    let v2466 = constructor_x64_pshufd(ctx, v2465, 0x0);
17390
0
                                    let v2467 = constructor_output_xmm(ctx, v2466);
17391
0
                                    // Rule at src/isa/x64/lower.isle line 4505.
17392
0
                                    return Some(v2467);
17393
0
                                }
17394
0
                                let v2442 = C::use_avx2(ctx);
17395
0
                                if v2442 == true {
17396
0
                                    let v382 = constructor_put_in_gpr(ctx, v381);
17397
0
                                    let v2437 = constructor_bitcast_gpr_to_xmm(ctx, I32, v382);
17398
0
                                    let v2443 = &C::xmm_to_xmm_mem(ctx, v2437);
17399
0
                                    let v2460 = constructor_x64_vpbroadcastw(ctx, v2443);
17400
0
                                    let v2461 = constructor_output_xmm(ctx, v2460);
17401
0
                                    // Rule at src/isa/x64/lower.isle line 4502.
17402
0
                                    return Some(v2461);
17403
0
                                }
17404
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17405
0
                                let v2437 = constructor_bitcast_gpr_to_xmm(ctx, I32, v382);
17406
0
                                let v2443 = &C::xmm_to_xmm_mem(ctx, v2437);
17407
0
                                let v2456 = constructor_x64_pshuflw(ctx, v2443, 0x0);
17408
0
                                let v2457 = &C::xmm_to_xmm_mem(ctx, v2456);
17409
0
                                let v2458 = constructor_x64_pshufd(ctx, v2457, 0x0);
17410
0
                                let v2459 = constructor_output_xmm(ctx, v2458);
17411
0
                                // Rule at src/isa/x64/lower.isle line 4500.
17412
0
                                return Some(v2459);
17413
                            }
17414
                            I32X4 => {
17415
0
                                let v2442 = C::use_avx2(ctx);
17416
0
                                if v2442 == true {
17417
0
                                    let v382 = constructor_put_in_gpr(ctx, v381);
17418
0
                                    let v2437 = constructor_bitcast_gpr_to_xmm(ctx, I32, v382);
17419
0
                                    let v2443 = &C::xmm_to_xmm_mem(ctx, v2437);
17420
0
                                    let v2472 = constructor_x64_vpbroadcastd(ctx, v2443);
17421
0
                                    let v2473 = constructor_output_xmm(ctx, v2472);
17422
0
                                    // Rule at src/isa/x64/lower.isle line 4517.
17423
0
                                    return Some(v2473);
17424
0
                                }
17425
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17426
0
                                let v2437 = constructor_bitcast_gpr_to_xmm(ctx, I32, v382);
17427
0
                                let v2443 = &C::xmm_to_xmm_mem(ctx, v2437);
17428
0
                                let v2470 = constructor_x64_pshufd(ctx, v2443, 0x0);
17429
0
                                let v2471 = constructor_output_xmm(ctx, v2470);
17430
0
                                // Rule at src/isa/x64/lower.isle line 4515.
17431
0
                                return Some(v2471);
17432
                            }
17433
                            I64X2 => {
17434
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17435
0
                                let v2486 = constructor_bitcast_gpr_to_xmm(ctx, I64, v382);
17436
0
                                let v2487 = &C::xmm_to_xmm_mem(ctx, v2486);
17437
0
                                let v2489 = constructor_x64_pshufd(ctx, v2487, 0x44);
17438
0
                                let v2490 = constructor_output_xmm(ctx, v2489);
17439
0
                                // Rule at src/isa/x64/lower.isle line 4550.
17440
0
                                return Some(v2490);
17441
                            }
17442
                            F32X4 => {
17443
0
                                let v2442 = C::use_avx2(ctx);
17444
0
                                if v2442 == true {
17445
0
                                    let v526 = &C::put_in_xmm_mem(ctx, v381);
17446
0
                                    let v2477 = constructor_x64_vbroadcastss(ctx, v526);
17447
0
                                    let v2478 = constructor_output_xmm(ctx, v2477);
17448
0
                                    // Rule at src/isa/x64/lower.isle line 4527.
17449
0
                                    return Some(v2478);
17450
0
                                }
17451
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
17452
0
                                let v2474 = constructor_put_in_xmm(ctx, v381);
17453
0
                                let v397 = &C::put_in_xmm_mem(ctx, v381);
17454
0
                                let v2475 = constructor_x64_shufps(ctx, v2474, v397, 0x0);
17455
0
                                let v2476 = constructor_output_xmm(ctx, v2475);
17456
0
                                // Rule at src/isa/x64/lower.isle line 4524.
17457
0
                                return Some(v2476);
17458
                            }
17459
                            F64X2 => {
17460
0
                                let v526 = &C::put_in_xmm_mem(ctx, v381);
17461
0
                                let v2491 = constructor_x64_pshufd(ctx, v526, 0x44);
17462
0
                                let v2492 = constructor_output_xmm(ctx, v2491);
17463
0
                                // Rule at src/isa/x64/lower.isle line 4552.
17464
0
                                return Some(v2492);
17465
                            }
17466
0
                            _ => {}
17467
                        }
17468
0
                    }
17469
                }
17470
                &Opcode::SetPinnedReg => {
17471
0
                    let v382 = constructor_put_in_gpr(ctx, v381);
17472
0
                    let v2254 = &constructor_write_pinned_gpr(ctx, v382);
17473
0
                    let v2255 = constructor_side_effect(ctx, v2254);
17474
0
                    // Rule at src/isa/x64/lower.isle line 4199.
17475
0
                    return Some(v2255);
17476
                }
17477
                &Opcode::VanyTrue => {
17478
0
                    let v441 = C::use_sse41(ctx);
17479
0
                    if v441 == true {
17480
0
                        let v529 = constructor_put_in_xmm(ctx, v381);
17481
0
                        let v1328 = &C::xmm_to_xmm_mem(ctx, v529);
17482
0
                        let v2495 = &constructor_x64_ptest(ctx, v1328, v529);
17483
0
                        let v2496 = &constructor_x64_setcc(ctx, &CC::NZ);
17484
0
                        let v2497 = constructor_with_flags(ctx, v2495, v2496);
17485
0
                        let v2498 = C::output(ctx, v2497);
17486
0
                        // Rule at src/isa/x64/lower.isle line 4560.
17487
0
                        return Some(v2498);
17488
0
                    }
17489
0
                    let v529 = constructor_put_in_xmm(ctx, v381);
17490
0
                    let v530 = constructor_xmm_zero(ctx, I8X16);
17491
0
                    let v2086 = &C::xmm_to_xmm_mem(ctx, v530);
17492
0
                    let v2499 = constructor_x64_pcmpeqb(ctx, v529, v2086);
17493
0
                    let v2501 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v2499);
17494
0
                    let v2503 = RegMemImm::Imm {
17495
0
                        simm32: 0xFFFF,
17496
0
                    };
17497
0
                    let v2504 = &C::gpr_mem_imm_new(ctx, &v2503);
17498
0
                    let v2505 = &constructor_x64_cmp(ctx, &OperandSize::Size32, v2504, v2501);
17499
0
                    let v2506 = &constructor_x64_setcc(ctx, &CC::NZ);
17500
0
                    let v2507 = constructor_with_flags(ctx, v2505, v2506);
17501
0
                    let v2508 = C::output(ctx, v2507);
17502
0
                    // Rule at src/isa/x64/lower.isle line 4569.
17503
0
                    return Some(v2508);
17504
                }
17505
                &Opcode::VallTrue => {
17506
0
                    let v441 = C::use_sse41(ctx);
17507
0
                    if v441 == true {
17508
0
                        let v529 = constructor_put_in_xmm(ctx, v381);
17509
0
                        let v640 = C::value_type(ctx, v381);
17510
0
                        let v2509 = constructor_xmm_zero(ctx, v640);
17511
0
                        let v2510 = constructor_vec_int_type(ctx, v640);
17512
0
                        let v2511 = &C::xmm_to_xmm_mem(ctx, v2509);
17513
0
                        let v2512 = constructor_x64_pcmpeq(ctx, v2510, v529, v2511);
17514
0
                        let v2513 = &C::xmm_to_xmm_mem(ctx, v2512);
17515
0
                        let v2514 = &constructor_x64_ptest(ctx, v2513, v2512);
17516
0
                        let v2515 = &constructor_x64_setcc(ctx, &CC::Z);
17517
0
                        let v2516 = constructor_with_flags(ctx, v2514, v2515);
17518
0
                        let v2517 = C::output(ctx, v2516);
17519
0
                        // Rule at src/isa/x64/lower.isle line 4579.
17520
0
                        return Some(v2517);
17521
0
                    }
17522
0
                    let v640 = C::value_type(ctx, v381);
17523
0
                    let v2518 = constructor_vec_int_type(ctx, v640);
17524
0
                    let v2474 = constructor_put_in_xmm(ctx, v381);
17525
0
                    let v2519 = constructor_xmm_zero(ctx, v640);
17526
0
                    let v2520 = &C::xmm_to_xmm_mem(ctx, v2519);
17527
0
                    let v2521 = constructor_x64_pcmpeq(ctx, v2518, v2474, v2520);
17528
0
                    let v2522 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v2521);
17529
0
                    let v2523 = &C::gpr_to_gpr_mem_imm(ctx, v2522);
17530
0
                    let v2524 = &constructor_x64_test(ctx, &OperandSize::Size32, v2523, v2522);
17531
0
                    let v2525 = &constructor_x64_setcc(ctx, &CC::Z);
17532
0
                    let v2526 = constructor_with_flags(ctx, v2524, v2525);
17533
0
                    let v2527 = C::output(ctx, v2526);
17534
0
                    // Rule at src/isa/x64/lower.isle line 4589.
17535
0
                    return Some(v2527);
17536
                }
17537
                &Opcode::VhighBits => {
17538
0
                    let v640 = C::value_type(ctx, v381);
17539
0
                    let v2528 = C::multi_lane(ctx, v640);
17540
0
                    if let Some(v2529) = v2528 {
17541
0
                        match v2529.0 {
17542
                            0x8 => {
17543
0
                                if v2529.1 == 0x10 {
17544
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
17545
0
                                    let v2532 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v529);
17546
0
                                    let v2533 = constructor_output_gpr(ctx, v2532);
17547
0
                                    // Rule at src/isa/x64/lower.isle line 4606.
17548
0
                                    return Some(v2533);
17549
0
                                }
17550
                            }
17551
                            0x10 => {
17552
0
                                if v2529.1 == 0x8 {
17553
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
17554
0
                                    let v1328 = &C::xmm_to_xmm_mem(ctx, v529);
17555
0
                                    let v2538 = constructor_x64_packsswb(ctx, v529, v1328);
17556
0
                                    let v2539 = constructor_x64_pmovmskb(ctx, &OperandSize::Size32, v2538);
17557
0
                                    let v1216 = Imm8Reg::Imm8 {
17558
0
                                        imm: 0x8,
17559
0
                                    };
17560
0
                                    let v2205 = &C::imm8_reg_to_imm8_gpr(ctx, &v1216);
17561
0
                                    let v2540 = constructor_x64_shr(ctx, I64, v2539, v2205);
17562
0
                                    let v2541 = constructor_output_gpr(ctx, v2540);
17563
0
                                    // Rule at src/isa/x64/lower.isle line 4621.
17564
0
                                    return Some(v2541);
17565
0
                                }
17566
                            }
17567
                            0x20 => {
17568
0
                                if v2529.1 == 0x4 {
17569
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
17570
0
                                    let v2534 = constructor_x64_movmskps(ctx, &OperandSize::Size32, v529);
17571
0
                                    let v2535 = constructor_output_gpr(ctx, v2534);
17572
0
                                    // Rule at src/isa/x64/lower.isle line 4609.
17573
0
                                    return Some(v2535);
17574
0
                                }
17575
                            }
17576
                            0x40 => {
17577
0
                                if v2529.1 == 0x2 {
17578
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
17579
0
                                    let v2536 = constructor_x64_movmskpd(ctx, &OperandSize::Size32, v529);
17580
0
                                    let v2537 = constructor_output_gpr(ctx, v2536);
17581
0
                                    // Rule at src/isa/x64/lower.isle line 4612.
17582
0
                                    return Some(v2537);
17583
0
                                }
17584
                            }
17585
0
                            _ => {}
17586
                        }
17587
0
                    }
17588
                }
17589
                &Opcode::Ineg => {
17590
738
                    let v1 = C::first_result(ctx, arg0);
17591
738
                    if let Some(v2) = v1 {
17592
738
                        let v3 = C::value_type(ctx, v2);
17593
738
                        match v3 {
17594
                            I8X16 => {
17595
0
                                let v395 = constructor_imm(ctx, I8X16, 0x0);
17596
0
                                let v396 = C::xmm_new(ctx, v395);
17597
0
                                let v397 = &C::put_in_xmm_mem(ctx, v381);
17598
0
                                let v398 = constructor_x64_psubb(ctx, v396, v397);
17599
0
                                let v399 = constructor_output_xmm(ctx, v398);
17600
0
                                // Rule at src/isa/x64/lower.isle line 942.
17601
0
                                return Some(v399);
17602
                            }
17603
                            I16X8 => {
17604
0
                                let v401 = constructor_imm(ctx, I16X8, 0x0);
17605
0
                                let v402 = C::xmm_new(ctx, v401);
17606
0
                                let v397 = &C::put_in_xmm_mem(ctx, v381);
17607
0
                                let v403 = constructor_x64_psubw(ctx, v402, v397);
17608
0
                                let v404 = constructor_output_xmm(ctx, v403);
17609
0
                                // Rule at src/isa/x64/lower.isle line 945.
17610
0
                                return Some(v404);
17611
                            }
17612
                            I32X4 => {
17613
0
                                let v406 = constructor_imm(ctx, I32X4, 0x0);
17614
0
                                let v407 = C::xmm_new(ctx, v406);
17615
0
                                let v397 = &C::put_in_xmm_mem(ctx, v381);
17616
0
                                let v408 = constructor_x64_psubd(ctx, v407, v397);
17617
0
                                let v409 = constructor_output_xmm(ctx, v408);
17618
0
                                // Rule at src/isa/x64/lower.isle line 948.
17619
0
                                return Some(v409);
17620
                            }
17621
                            I64X2 => {
17622
0
                                let v411 = constructor_imm(ctx, I64X2, 0x0);
17623
0
                                let v412 = C::xmm_new(ctx, v411);
17624
0
                                let v397 = &C::put_in_xmm_mem(ctx, v381);
17625
0
                                let v413 = constructor_x64_psubq(ctx, v412, v397);
17626
0
                                let v414 = constructor_output_xmm(ctx, v413);
17627
0
                                // Rule at src/isa/x64/lower.isle line 951.
17628
0
                                return Some(v414);
17629
                            }
17630
738
                            _ => {}
17631
738
                        }
17632
738
                        let v4 = C::fits_in_64(ctx, v3);
17633
738
                        if let Some(v5) = v4 {
17634
738
                            let v382 = constructor_put_in_gpr(ctx, v381);
17635
738
                            let v383 = constructor_x64_neg(ctx, v5, v382);
17636
738
                            let v384 = constructor_output_gpr(ctx, v383);
17637
738
                            // Rule at src/isa/x64/lower.isle line 928.
17638
738
                            return Some(v384);
17639
0
                        }
17640
0
                        if v3 == I128 {
17641
0
                            let v385 = C::put_in_regs(ctx, v381);
17642
0
                            let v386 = constructor_value_regs_get_gpr(ctx, v385, 0x0);
17643
0
                            let v387 = constructor_value_regs_get_gpr(ctx, v385, 0x1);
17644
0
                            let v388 = &constructor_x64_neg_paired(ctx, I64, v386);
17645
0
                            let v389 = constructor_imm(ctx, I64, 0x0);
17646
0
                            let v390 = C::gpr_new(ctx, v389);
17647
0
                            let v391 = &C::gpr_to_gpr_mem_imm(ctx, v387);
17648
0
                            let v392 = &constructor_x64_sbb_paired(ctx, I64, v390, v391);
17649
0
                            let v393 = constructor_with_flags(ctx, v388, v392);
17650
0
                            let v394 = C::output(ctx, v393);
17651
0
                            // Rule at src/isa/x64/lower.isle line 931.
17652
0
                            return Some(v394);
17653
0
                        }
17654
0
                    }
17655
                }
17656
                &Opcode::Iabs => {
17657
0
                    let v1 = C::first_result(ctx, arg0);
17658
0
                    if let Some(v2) = v1 {
17659
0
                        let v3 = C::value_type(ctx, v2);
17660
0
                        match v3 {
17661
                            I128 => {
17662
0
                                let v385 = C::put_in_regs(ctx, v381);
17663
0
                                let v386 = constructor_value_regs_get_gpr(ctx, v385, 0x0);
17664
0
                                let v387 = constructor_value_regs_get_gpr(ctx, v385, 0x1);
17665
0
                                let v388 = &constructor_x64_neg_paired(ctx, I64, v386);
17666
0
                                let v389 = constructor_imm(ctx, I64, 0x0);
17667
0
                                let v582 = &constructor_reg_to_gpr_mem_imm(ctx, v389);
17668
0
                                let v583 = &constructor_x64_adc_paired(ctx, I64, v387, v582);
17669
0
                                let v584 = constructor_with_flags(ctx, v388, v583);
17670
0
                                let v585 = C::value_regs_get(ctx, v584, 0x1);
17671
0
                                let v586 = C::gpr_new(ctx, v585);
17672
0
                                let v587 = &constructor_x64_neg_paired(ctx, I64, v586);
17673
0
                                let v588 = &constructor_produces_flags_ignore(ctx, v587);
17674
0
                                let v589 = &C::gpr_to_gpr_mem(ctx, v386);
17675
0
                                let v590 = C::value_regs_get(ctx, v584, 0x0);
17676
0
                                let v591 = C::gpr_new(ctx, v590);
17677
0
                                let v592 = &constructor_cmove(ctx, I64, &CC::S, v589, v591);
17678
0
                                let v593 = &C::gpr_to_gpr_mem(ctx, v387);
17679
0
                                let v594 = constructor_produces_flags_get_reg(ctx, v587);
17680
0
                                let v595 = C::gpr_new(ctx, v594);
17681
0
                                let v596 = &constructor_cmove(ctx, I64, &CC::S, v593, v595);
17682
0
                                let v597 = &constructor_consumes_flags_concat(ctx, v592, v596);
17683
0
                                let v598 = constructor_with_flags(ctx, v588, v597);
17684
0
                                let v599 = C::output(ctx, v598);
17685
0
                                // Rule at src/isa/x64/lower.isle line 1269.
17686
0
                                return Some(v599);
17687
                            }
17688
                            I8X16 => {
17689
0
                                let v525 = C::use_ssse3(ctx);
17690
0
                                if v525 == true {
17691
0
                                    let v526 = &C::put_in_xmm_mem(ctx, v381);
17692
0
                                    let v527 = constructor_x64_pabsb(ctx, v526);
17693
0
                                    let v528 = constructor_output_xmm(ctx, v527);
17694
0
                                    // Rule at src/isa/x64/lower.isle line 1185.
17695
0
                                    return Some(v528);
17696
0
                                }
17697
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
17698
0
                                let v530 = constructor_xmm_zero(ctx, I8X16);
17699
0
                                let v531 = &C::xmm_to_xmm_mem(ctx, v529);
17700
0
                                let v532 = constructor_x64_psubb(ctx, v530, v531);
17701
0
                                let v533 = &C::xmm_to_xmm_mem(ctx, v532);
17702
0
                                let v534 = constructor_x64_pminub(ctx, v529, v533);
17703
0
                                let v535 = constructor_output_xmm(ctx, v534);
17704
0
                                // Rule at src/isa/x64/lower.isle line 1192.
17705
0
                                return Some(v535);
17706
                            }
17707
                            I16X8 => {
17708
0
                                let v525 = C::use_ssse3(ctx);
17709
0
                                if v525 == true {
17710
0
                                    let v526 = &C::put_in_xmm_mem(ctx, v381);
17711
0
                                    let v536 = constructor_x64_pabsw(ctx, v526);
17712
0
                                    let v537 = constructor_output_xmm(ctx, v536);
17713
0
                                    // Rule at src/isa/x64/lower.isle line 1199.
17714
0
                                    return Some(v537);
17715
0
                                }
17716
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
17717
0
                                let v538 = constructor_xmm_zero(ctx, I16X8);
17718
0
                                let v531 = &C::xmm_to_xmm_mem(ctx, v529);
17719
0
                                let v539 = constructor_x64_psubw(ctx, v538, v531);
17720
0
                                let v540 = &C::xmm_to_xmm_mem(ctx, v539);
17721
0
                                let v541 = constructor_x64_pmaxsw(ctx, v529, v540);
17722
0
                                let v542 = constructor_output_xmm(ctx, v541);
17723
0
                                // Rule at src/isa/x64/lower.isle line 1203.
17724
0
                                return Some(v542);
17725
                            }
17726
                            I32X4 => {
17727
0
                                let v525 = C::use_ssse3(ctx);
17728
0
                                if v525 == true {
17729
0
                                    let v526 = &C::put_in_xmm_mem(ctx, v381);
17730
0
                                    let v543 = constructor_x64_pabsd(ctx, v526);
17731
0
                                    let v544 = constructor_output_xmm(ctx, v543);
17732
0
                                    // Rule at src/isa/x64/lower.isle line 1210.
17733
0
                                    return Some(v544);
17734
0
                                }
17735
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
17736
0
                                let v546 = &C::xmi_imm(ctx, 0x1F);
17737
0
                                let v547 = constructor_x64_psrad(ctx, v529, v546);
17738
0
                                let v548 = &C::xmm_to_xmm_mem(ctx, v547);
17739
0
                                let v549 = constructor_x64_pxor(ctx, v529, v548);
17740
0
                                let v550 = &C::xmm_to_xmm_mem(ctx, v547);
17741
0
                                let v551 = constructor_x64_psubd(ctx, v549, v550);
17742
0
                                let v552 = constructor_output_xmm(ctx, v551);
17743
0
                                // Rule at src/isa/x64/lower.isle line 1220.
17744
0
                                return Some(v552);
17745
                            }
17746
                            I64X2 => {
17747
0
                                let v332 = C::use_avx512vl(ctx);
17748
0
                                if v332 == true {
17749
0
                                    let v333 = C::use_avx512f(ctx);
17750
0
                                    if v333 == true {
17751
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
17752
0
                                        let v553 = constructor_x64_vpabsq(ctx, v526);
17753
0
                                        let v554 = constructor_output_xmm(ctx, v553);
17754
0
                                        // Rule at src/isa/x64/lower.isle line 1229.
17755
0
                                        return Some(v554);
17756
0
                                    }
17757
0
                                }
17758
0
                                let v441 = C::use_sse41(ctx);
17759
0
                                if v441 == true {
17760
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
17761
0
                                    let v555 = constructor_imm(ctx, I64X2, 0x0);
17762
0
                                    let v556 = C::xmm_new(ctx, v555);
17763
0
                                    let v557 = &C::xmm_to_xmm_mem(ctx, v529);
17764
0
                                    let v558 = constructor_x64_psubq(ctx, v556, v557);
17765
0
                                    let v559 = &C::xmm_to_xmm_mem(ctx, v529);
17766
0
                                    let v560 = constructor_x64_blendvpd(ctx, v558, v559, v558);
17767
0
                                    let v561 = constructor_output_xmm(ctx, v560);
17768
0
                                    // Rule at src/isa/x64/lower.isle line 1238.
17769
0
                                    return Some(v561);
17770
0
                                }
17771
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
17772
0
                                let v562 = RegMemImm::Imm {
17773
0
                                    simm32: 0x1F,
17774
0
                                };
17775
0
                                let v563 = &C::xmm_mem_imm_new(ctx, &v562);
17776
0
                                let v564 = constructor_x64_psrad(ctx, v529, v563);
17777
0
                                let v565 = &C::xmm_to_xmm_mem(ctx, v564);
17778
0
                                let v567 = constructor_x64_pshufd(ctx, v565, 0xF5);
17779
0
                                let v568 = &C::xmm_to_xmm_mem(ctx, v567);
17780
0
                                let v569 = constructor_x64_pxor(ctx, v529, v568);
17781
0
                                let v570 = &C::xmm_to_xmm_mem(ctx, v567);
17782
0
                                let v571 = constructor_x64_psubq(ctx, v569, v570);
17783
0
                                let v572 = constructor_output_xmm(ctx, v571);
17784
0
                                // Rule at src/isa/x64/lower.isle line 1247.
17785
0
                                return Some(v572);
17786
                            }
17787
0
                            _ => {}
17788
0
                        }
17789
0
                        let v4 = C::fits_in_64(ctx, v3);
17790
0
                        if let Some(v5) = v4 {
17791
0
                            let v382 = constructor_put_in_gpr(ctx, v381);
17792
0
                            let v573 = &constructor_x64_neg_paired(ctx, v5, v382);
17793
0
                            let v574 = constructor_produces_flags_get_reg(ctx, v573);
17794
0
                            let v575 = C::gpr_new(ctx, v574);
17795
0
                            let v577 = &C::gpr_to_gpr_mem(ctx, v382);
17796
0
                            let v578 = &constructor_cmove(ctx, v5, &CC::S, v577, v575);
17797
0
                            let v579 = &constructor_produces_flags_ignore(ctx, v573);
17798
0
                            let v580 = constructor_with_flags_reg(ctx, v579, v578);
17799
0
                            let v581 = constructor_output_reg(ctx, v580);
17800
0
                            // Rule at src/isa/x64/lower.isle line 1256.
17801
0
                            return Some(v581);
17802
0
                        }
17803
0
                    }
17804
                }
17805
                &Opcode::Bnot => {
17806
1.29k
                    let v1 = C::first_result(ctx, arg0);
17807
1.29k
                    if let Some(v2) = v1 {
17808
1.29k
                        let v3 = C::value_type(ctx, v2);
17809
1.29k
                        if v3 == I128 {
17810
0
                            let v645 = constructor_i128_not(ctx, v381);
17811
0
                            let v646 = C::output(ctx, v645);
17812
0
                            // Rule at src/isa/x64/lower.isle line 1386.
17813
0
                            return Some(v646);
17814
1.29k
                        }
17815
1.29k
                        let v64 = C::multi_lane(ctx, v3);
17816
1.29k
                        if let Some(
v650
) = v64 {
17817
0
                            let v529 = constructor_put_in_xmm(ctx, v381);
17818
0
                            let v610 = constructor_vector_all_ones(ctx);
17819
0
                            let v647 = &C::xmm_to_xmm_mem(ctx, v610);
17820
0
                            let v650 = constructor_x64_xor_vector(ctx, v3, v529, v647);
17821
0
                            let v651 = constructor_output_xmm(ctx, v650);
17822
0
                            // Rule at src/isa/x64/lower.isle line 1396.
17823
0
                            return Some(v651);
17824
1.29k
                        }
17825
1.29k
                        let v152 = C::ty_int_ref_scalar_64(ctx, v3);
17826
1.29k
                        if let Some(v153) = v152 {
17827
1.29k
                            let v382 = constructor_put_in_gpr(ctx, v381);
17828
1.29k
                            let v643 = constructor_x64_not(ctx, v3, v382);
17829
1.29k
                            let v644 = constructor_output_gpr(ctx, v643);
17830
1.29k
                            // Rule at src/isa/x64/lower.isle line 1371.
17831
1.29k
                            return Some(v644);
17832
0
                        }
17833
0
                        let v162 = C::ty_scalar_float(ctx, v3);
17834
0
                        if let Some(v163) = v162 {
17835
0
                            let v529 = constructor_put_in_xmm(ctx, v381);
17836
0
                            let v610 = constructor_vector_all_ones(ctx);
17837
0
                            let v647 = &C::xmm_to_xmm_mem(ctx, v610);
17838
0
                            let v648 = constructor_x64_xor_vector(ctx, v163, v529, v647);
17839
0
                            let v649 = constructor_output_xmm(ctx, v648);
17840
0
                            // Rule at src/isa/x64/lower.isle line 1391.
17841
0
                            return Some(v649);
17842
0
                        }
17843
0
                    }
17844
                }
17845
                &Opcode::Bitrev => {
17846
0
                    let v1 = C::first_result(ctx, arg0);
17847
0
                    if let Some(v2) = v1 {
17848
0
                        let v3 = C::value_type(ctx, v2);
17849
0
                        match v3 {
17850
                            I8 => {
17851
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17852
0
                                let v1199 = constructor_do_bitrev8(ctx, I32, v382);
17853
0
                                let v1200 = constructor_output_gpr(ctx, v1199);
17854
0
                                // Rule at src/isa/x64/lower.isle line 2344.
17855
0
                                return Some(v1200);
17856
                            }
17857
                            I16 => {
17858
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17859
0
                                let v1201 = constructor_do_bitrev16(ctx, I32, v382);
17860
0
                                let v1202 = constructor_output_gpr(ctx, v1201);
17861
0
                                // Rule at src/isa/x64/lower.isle line 2347.
17862
0
                                return Some(v1202);
17863
                            }
17864
                            I32 => {
17865
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17866
0
                                let v1203 = constructor_do_bitrev32(ctx, I32, v382);
17867
0
                                let v1204 = constructor_output_gpr(ctx, v1203);
17868
0
                                // Rule at src/isa/x64/lower.isle line 2350.
17869
0
                                return Some(v1204);
17870
                            }
17871
                            I64 => {
17872
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
17873
0
                                let v1205 = constructor_do_bitrev64(ctx, I64, v382);
17874
0
                                let v1206 = constructor_output_gpr(ctx, v1205);
17875
0
                                // Rule at src/isa/x64/lower.isle line 2353.
17876
0
                                return Some(v1206);
17877
                            }
17878
                            I128 => {
17879
0
                                let v385 = C::put_in_regs(ctx, v381);
17880
0
                                let v1089 = constructor_value_regs_get_gpr(ctx, v385, 0x1);
17881
0
                                let v1207 = constructor_do_bitrev64(ctx, I64, v1089);
17882
0
                                let v1208 = C::gpr_to_reg(ctx, v1207);
17883
0
                                let v1209 = C::put_in_regs(ctx, v381);
17884
0
                                let v1210 = constructor_value_regs_get_gpr(ctx, v1209, 0x0);
17885
0
                                let v1211 = constructor_do_bitrev64(ctx, I64, v1210);
17886
0
                                let v1212 = C::gpr_to_reg(ctx, v1211);
17887
0
                                let v1213 = C::value_regs(ctx, v1208, v1212);
17888
0
                                let v1214 = C::output(ctx, v1213);
17889
0
                                // Rule at src/isa/x64/lower.isle line 2356.
17890
0
                                return Some(v1214);
17891
                            }
17892
0
                            _ => {}
17893
                        }
17894
0
                    }
17895
                }
17896
                &Opcode::Clz => {
17897
381
                    let v1 = C::first_result(ctx, arg0);
17898
381
                    if let Some(v2) = v1 {
17899
381
                        let v3 = C::value_type(ctx, v2);
17900
381
                        let v45 = C::ty_32_or_64(ctx, v3);
17901
381
                        if let Some(v46) = v45 {
17902
381
                            let v1079 = C::use_lzcnt(ctx);
17903
381
                            if v1079 == true {
17904
381
                                let v382 = constructor_put_in_gpr(ctx, v381);
17905
381
                                let v1080 = constructor_x64_lzcnt(ctx, v46, v382);
17906
381
                                let v1081 = constructor_output_gpr(ctx, v1080);
17907
381
                                // Rule at src/isa/x64/lower.isle line 2123.
17908
381
                                return Some(v1081);
17909
0
                            }
17910
0
                            let v382 = constructor_put_in_gpr(ctx, v381);
17911
0
                            let v1082 = constructor_do_clz(ctx, v46, v46, v382);
17912
0
                            let v1083 = constructor_output_gpr(ctx, v1082);
17913
0
                            // Rule at src/isa/x64/lower.isle line 2127.
17914
0
                            return Some(v1083);
17915
0
                        }
17916
0
                        let v1084 = C::ty_8_or_16(ctx, v3);
17917
0
                        if let Some(v1085) = v1084 {
17918
0
                            let v1086 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Zero);
17919
0
                            let v1087 = constructor_do_clz(ctx, I32, v1085, v1086);
17920
0
                            let v1088 = constructor_output_gpr(ctx, v1087);
17921
0
                            // Rule at src/isa/x64/lower.isle line 2130.
17922
0
                            return Some(v1088);
17923
0
                        }
17924
0
                        if v3 == I128 {
17925
0
                            let v385 = C::put_in_regs(ctx, v381);
17926
0
                            let v1089 = constructor_value_regs_get_gpr(ctx, v385, 0x1);
17927
0
                            let v1090 = constructor_do_clz(ctx, I64, I64, v1089);
17928
0
                            let v1091 = C::put_in_regs(ctx, v381);
17929
0
                            let v1092 = constructor_value_regs_get_gpr(ctx, v1091, 0x0);
17930
0
                            let v1093 = constructor_do_clz(ctx, I64, I64, v1092);
17931
0
                            let v1095 = RegMemImm::Imm {
17932
0
                                simm32: 0x40,
17933
0
                            };
17934
0
                            let v1096 = &C::gpr_mem_imm_new(ctx, &v1095);
17935
0
                            let v1097 = constructor_x64_add(ctx, I64, v1093, v1096);
17936
0
                            let v1099 = &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0x40, v1090);
17937
0
                            let v1100 = &C::gpr_to_gpr_mem(ctx, v1090);
17938
0
                            let v1101 = &constructor_cmove(ctx, I64, &CC::NZ, v1100, v1097);
17939
0
                            let v1102 = constructor_with_flags_reg(ctx, v1099, v1101);
17940
0
                            let v1103 = C::gpr_new(ctx, v1102);
17941
0
                            let v1104 = C::gpr_to_reg(ctx, v1103);
17942
0
                            let v1105 = constructor_imm(ctx, I64, 0x0);
17943
0
                            let v1106 = C::value_regs(ctx, v1104, v1105);
17944
0
                            let v1107 = C::output(ctx, v1106);
17945
0
                            // Rule at src/isa/x64/lower.isle line 2135.
17946
0
                            return Some(v1107);
17947
0
                        }
17948
0
                    }
17949
                }
17950
                &Opcode::Ctz => {
17951
145
                    let v1 = C::first_result(ctx, arg0);
17952
145
                    if let Some(v2) = v1 {
17953
145
                        let v3 = C::value_type(ctx, v2);
17954
145
                        let v45 = C::ty_32_or_64(ctx, v3);
17955
145
                        if let Some(v46) = v45 {
17956
145
                            let v188 = C::use_bmi1(ctx);
17957
145
                            if v188 == true {
17958
145
                                let v382 = constructor_put_in_gpr(ctx, v381);
17959
145
                                let v1108 = constructor_x64_tzcnt(ctx, v46, v382);
17960
145
                                let v1109 = constructor_output_gpr(ctx, v1108);
17961
145
                                // Rule at src/isa/x64/lower.isle line 2160.
17962
145
                                return Some(v1109);
17963
0
                            }
17964
0
                            let v382 = constructor_put_in_gpr(ctx, v381);
17965
0
                            let v1110 = constructor_do_ctz(ctx, v46, v46, v382);
17966
0
                            let v1111 = constructor_output_gpr(ctx, v1110);
17967
0
                            // Rule at src/isa/x64/lower.isle line 2164.
17968
0
                            return Some(v1111);
17969
0
                        }
17970
0
                        let v1084 = C::ty_8_or_16(ctx, v3);
17971
0
                        if let Some(v1085) = v1084 {
17972
0
                            let v1086 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Zero);
17973
0
                            let v1112 = constructor_do_ctz(ctx, I32, v1085, v1086);
17974
0
                            let v1113 = constructor_output_gpr(ctx, v1112);
17975
0
                            // Rule at src/isa/x64/lower.isle line 2167.
17976
0
                            return Some(v1113);
17977
0
                        }
17978
0
                        if v3 == I128 {
17979
0
                            let v385 = C::put_in_regs(ctx, v381);
17980
0
                            let v386 = constructor_value_regs_get_gpr(ctx, v385, 0x0);
17981
0
                            let v1114 = constructor_do_ctz(ctx, I64, I64, v386);
17982
0
                            let v1091 = C::put_in_regs(ctx, v381);
17983
0
                            let v1115 = constructor_value_regs_get_gpr(ctx, v1091, 0x1);
17984
0
                            let v1116 = constructor_do_ctz(ctx, I64, I64, v1115);
17985
0
                            let v1095 = RegMemImm::Imm {
17986
0
                                simm32: 0x40,
17987
0
                            };
17988
0
                            let v1096 = &C::gpr_mem_imm_new(ctx, &v1095);
17989
0
                            let v1117 = constructor_x64_add(ctx, I64, v1116, v1096);
17990
0
                            let v1118 = &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0x40, v1114);
17991
0
                            let v1119 = &C::gpr_to_gpr_mem(ctx, v1117);
17992
0
                            let v1120 = &constructor_cmove(ctx, I64, &CC::Z, v1119, v1114);
17993
0
                            let v1121 = constructor_with_flags_reg(ctx, v1118, v1120);
17994
0
                            let v1122 = C::gpr_new(ctx, v1121);
17995
0
                            let v1123 = C::gpr_to_reg(ctx, v1122);
17996
0
                            let v1105 = constructor_imm(ctx, I64, 0x0);
17997
0
                            let v1124 = C::value_regs(ctx, v1123, v1105);
17998
0
                            let v1125 = C::output(ctx, v1124);
17999
0
                            // Rule at src/isa/x64/lower.isle line 2172.
18000
0
                            return Some(v1125);
18001
0
                        }
18002
0
                    }
18003
                }
18004
                &Opcode::Bswap => {
18005
0
                    let v1 = C::first_result(ctx, arg0);
18006
0
                    if let Some(v2) = v1 {
18007
0
                        let v3 = C::value_type(ctx, v2);
18008
0
                        match v3 {
18009
                            I16 => {
18010
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
18011
0
                                let v1216 = Imm8Reg::Imm8 {
18012
0
                                    imm: 0x8,
18013
0
                                };
18014
0
                                let v1217 = &C::imm8_reg_to_imm8_gpr(ctx, &v1216);
18015
0
                                let v1218 = constructor_x64_rotl(ctx, I16, v382, v1217);
18016
0
                                let v1219 = constructor_output_gpr(ctx, v1218);
18017
0
                                // Rule at src/isa/x64/lower.isle line 2423.
18018
0
                                return Some(v1219);
18019
                            }
18020
                            I32 => {
18021
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
18022
0
                                let v1220 = constructor_x64_bswap(ctx, I32, v382);
18023
0
                                let v1221 = constructor_output_gpr(ctx, v1220);
18024
0
                                // Rule at src/isa/x64/lower.isle line 2426.
18025
0
                                return Some(v1221);
18026
                            }
18027
                            I64 => {
18028
0
                                let v382 = constructor_put_in_gpr(ctx, v381);
18029
0
                                let v1222 = constructor_x64_bswap(ctx, I64, v382);
18030
0
                                let v1223 = constructor_output_gpr(ctx, v1222);
18031
0
                                // Rule at src/isa/x64/lower.isle line 2429.
18032
0
                                return Some(v1223);
18033
                            }
18034
                            I128 => {
18035
0
                                let v385 = C::put_in_regs(ctx, v381);
18036
0
                                let v1089 = constructor_value_regs_get_gpr(ctx, v385, 0x1);
18037
0
                                let v1224 = constructor_x64_bswap(ctx, I64, v1089);
18038
0
                                let v1225 = C::gpr_to_reg(ctx, v1224);
18039
0
                                let v1209 = C::put_in_regs(ctx, v381);
18040
0
                                let v1210 = constructor_value_regs_get_gpr(ctx, v1209, 0x0);
18041
0
                                let v1226 = constructor_x64_bswap(ctx, I64, v1210);
18042
0
                                let v1227 = C::gpr_to_reg(ctx, v1226);
18043
0
                                let v1228 = C::value_regs(ctx, v1225, v1227);
18044
0
                                let v1229 = C::output(ctx, v1228);
18045
0
                                // Rule at src/isa/x64/lower.isle line 2432.
18046
0
                                return Some(v1229);
18047
                            }
18048
0
                            _ => {}
18049
                        }
18050
0
                    }
18051
                }
18052
                &Opcode::Popcnt => {
18053
89
                    let v1 = C::first_result(ctx, arg0);
18054
89
                    if let Some(v2) = v1 {
18055
89
                        let v1126 = C::use_popcnt(ctx);
18056
89
                        if v1126 == true {
18057
89
                            let v3 = C::value_type(ctx, v2);
18058
89
                            let v45 = C::ty_32_or_64(ctx, v3);
18059
89
                            if let Some(v46) = v45 {
18060
89
                                let v382 = constructor_put_in_gpr(ctx, v381);
18061
89
                                let v1127 = constructor_x64_popcnt(ctx, v46, v382);
18062
89
                                let v1128 = constructor_output_gpr(ctx, v1127);
18063
89
                                // Rule at src/isa/x64/lower.isle line 2191.
18064
89
                                return Some(v1128);
18065
0
                            }
18066
0
                            let v1084 = C::ty_8_or_16(ctx, v3);
18067
0
                            if let Some(v1085) = v1084 {
18068
0
                                let v1086 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Zero);
18069
0
                                let v1129 = constructor_x64_popcnt(ctx, I32, v1086);
18070
0
                                let v1130 = constructor_output_gpr(ctx, v1129);
18071
0
                                // Rule at src/isa/x64/lower.isle line 2195.
18072
0
                                return Some(v1130);
18073
0
                            }
18074
0
                        }
18075
0
                        let v3 = C::value_type(ctx, v2);
18076
0
                        match v3 {
18077
                            I128 => {
18078
0
                                if v1126 == true {
18079
0
                                    let v385 = C::put_in_regs(ctx, v381);
18080
0
                                    let v386 = constructor_value_regs_get_gpr(ctx, v385, 0x0);
18081
0
                                    let v1131 = constructor_x64_popcnt(ctx, I64, v386);
18082
0
                                    let v1091 = C::put_in_regs(ctx, v381);
18083
0
                                    let v1115 = constructor_value_regs_get_gpr(ctx, v1091, 0x1);
18084
0
                                    let v1132 = constructor_x64_popcnt(ctx, I64, v1115);
18085
0
                                    let v1133 = &C::gpr_to_gpr_mem_imm(ctx, v1132);
18086
0
                                    let v1134 = constructor_x64_add(ctx, I64, v1131, v1133);
18087
0
                                    let v1135 = C::gpr_to_reg(ctx, v1134);
18088
0
                                    let v1136 = constructor_imm(ctx, I64, 0x0);
18089
0
                                    let v1137 = C::value_regs(ctx, v1135, v1136);
18090
0
                                    let v1138 = C::output(ctx, v1137);
18091
0
                                    // Rule at src/isa/x64/lower.isle line 2199.
18092
0
                                    return Some(v1138);
18093
0
                                }
18094
0
                                let v385 = C::put_in_regs(ctx, v381);
18095
0
                                let v386 = constructor_value_regs_get_gpr(ctx, v385, 0x0);
18096
0
                                let v1143 = constructor_do_popcnt(ctx, I64, v386);
18097
0
                                let v1091 = C::put_in_regs(ctx, v381);
18098
0
                                let v1115 = constructor_value_regs_get_gpr(ctx, v1091, 0x1);
18099
0
                                let v1144 = constructor_do_popcnt(ctx, I64, v1115);
18100
0
                                let v1145 = &C::gpr_to_gpr_mem_imm(ctx, v1144);
18101
0
                                let v1146 = constructor_x64_add(ctx, I64, v1143, v1145);
18102
0
                                let v1147 = C::gpr_to_reg(ctx, v1146);
18103
0
                                let v1136 = constructor_imm(ctx, I64, 0x0);
18104
0
                                let v1148 = C::value_regs(ctx, v1147, v1136);
18105
0
                                let v1149 = C::output(ctx, v1148);
18106
0
                                // Rule at src/isa/x64/lower.isle line 2215.
18107
0
                                return Some(v1149);
18108
                            }
18109
                            I8X16 => {
18110
0
                                let v332 = C::use_avx512vl(ctx);
18111
0
                                if v332 == true {
18112
0
                                    let v1150 = C::use_avx512bitalg(ctx);
18113
0
                                    if v1150 == true {
18114
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18115
0
                                        let v1151 = constructor_x64_vpopcntb(ctx, v526);
18116
0
                                        let v1152 = constructor_output_xmm(ctx, v1151);
18117
0
                                        // Rule at src/isa/x64/lower.isle line 2288.
18118
0
                                        return Some(v1152);
18119
0
                                    }
18120
0
                                }
18121
0
                                let v525 = C::use_ssse3(ctx);
18122
0
                                if v525 == true {
18123
0
                                    let v1154 = C::emit_u128_le_const(ctx, 0xF0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F);
18124
0
                                    let v1155 = &constructor_const_to_xmm_mem(ctx, v1154);
18125
0
                                    let v1156 = constructor_put_in_xmm(ctx, v381);
18126
0
                                    let v1157 = constructor_sse_and(ctx, I8X16, v1156, v1155);
18127
0
                                    let v1158 = constructor_put_in_xmm(ctx, v381);
18128
0
                                    let v1160 = &C::xmi_imm(ctx, 0x4);
18129
0
                                    let v1161 = constructor_x64_psrlw(ctx, v1158, v1160);
18130
0
                                    let v1162 = constructor_sse_and(ctx, I8X16, v1161, v1155);
18131
0
                                    let v1164 = C::emit_u128_le_const(ctx, 0x4030302030202010302020102010100);
18132
0
                                    let v1165 = constructor_x64_xmm_load_const(ctx, I8X16, v1164);
18133
0
                                    let v1166 = &C::xmm_to_xmm_mem(ctx, v1157);
18134
0
                                    let v1167 = constructor_x64_pshufb(ctx, v1165, v1166);
18135
0
                                    let v1168 = &C::xmm_to_xmm_mem(ctx, v1162);
18136
0
                                    let v1169 = constructor_x64_pshufb(ctx, v1165, v1168);
18137
0
                                    let v1170 = &C::xmm_to_xmm_mem(ctx, v1169);
18138
0
                                    let v1171 = constructor_x64_paddb(ctx, v1167, v1170);
18139
0
                                    let v1172 = constructor_output_xmm(ctx, v1171);
18140
0
                                    // Rule at src/isa/x64/lower.isle line 2314.
18141
0
                                    return Some(v1172);
18142
0
                                }
18143
0
                                let v1174 = C::emit_u128_le_const(ctx, 0x77777777777777777777777777777777);
18144
0
                                let v1175 = &constructor_const_to_xmm_mem(ctx, v1174);
18145
0
                                let v1156 = constructor_put_in_xmm(ctx, v381);
18146
0
                                let v1176 = &C::xmi_imm(ctx, 0x1);
18147
0
                                let v1177 = constructor_x64_psrlq(ctx, v1156, v1176);
18148
0
                                let v1178 = constructor_x64_pand(ctx, v1177, v1175);
18149
0
                                let v1179 = &C::xmm_to_xmm_mem(ctx, v1178);
18150
0
                                let v1180 = constructor_x64_psubb(ctx, v1156, v1179);
18151
0
                                let v1181 = &C::xmi_imm(ctx, 0x1);
18152
0
                                let v1182 = constructor_x64_psrlq(ctx, v1178, v1181);
18153
0
                                let v1183 = constructor_x64_pand(ctx, v1182, v1175);
18154
0
                                let v1184 = &C::xmm_to_xmm_mem(ctx, v1183);
18155
0
                                let v1185 = constructor_x64_psubb(ctx, v1180, v1184);
18156
0
                                let v1186 = &C::xmi_imm(ctx, 0x1);
18157
0
                                let v1187 = constructor_x64_psrlq(ctx, v1183, v1186);
18158
0
                                let v1188 = constructor_x64_pand(ctx, v1187, v1175);
18159
0
                                let v1189 = &C::xmm_to_xmm_mem(ctx, v1188);
18160
0
                                let v1190 = constructor_x64_psubb(ctx, v1185, v1189);
18161
0
                                let v1191 = &C::xmi_imm(ctx, 0x4);
18162
0
                                let v1192 = constructor_x64_psrlw(ctx, v1190, v1191);
18163
0
                                let v1193 = &C::xmm_to_xmm_mem(ctx, v1192);
18164
0
                                let v1194 = constructor_x64_paddb(ctx, v1190, v1193);
18165
0
                                let v1195 = C::emit_u128_le_const(ctx, 0xF0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F);
18166
0
                                let v1196 = &constructor_const_to_xmm_mem(ctx, v1195);
18167
0
                                let v1197 = constructor_x64_pand(ctx, v1194, v1196);
18168
0
                                let v1198 = constructor_output_xmm(ctx, v1197);
18169
0
                                // Rule at src/isa/x64/lower.isle line 2330.
18170
0
                                return Some(v1198);
18171
                            }
18172
0
                            _ => {}
18173
0
                        }
18174
0
                        let v45 = C::ty_32_or_64(ctx, v3);
18175
0
                        if let Some(v46) = v45 {
18176
0
                            let v382 = constructor_put_in_gpr(ctx, v381);
18177
0
                            let v1139 = constructor_do_popcnt(ctx, v46, v382);
18178
0
                            let v1140 = constructor_output_gpr(ctx, v1139);
18179
0
                            // Rule at src/isa/x64/lower.isle line 2205.
18180
0
                            return Some(v1140);
18181
0
                        }
18182
0
                        let v1084 = C::ty_8_or_16(ctx, v3);
18183
0
                        if let Some(v1085) = v1084 {
18184
0
                            let v1086 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Zero);
18185
0
                            let v1141 = constructor_do_popcnt(ctx, I32, v1086);
18186
0
                            let v1142 = constructor_output_gpr(ctx, v1141);
18187
0
                            // Rule at src/isa/x64/lower.isle line 2210.
18188
0
                            return Some(v1142);
18189
0
                        }
18190
0
                    }
18191
                }
18192
                &Opcode::Sqrt => {
18193
0
                    let v1 = C::first_result(ctx, arg0);
18194
0
                    if let Some(v2) = v1 {
18195
0
                        let v3 = C::value_type(ctx, v2);
18196
0
                        match v3 {
18197
                            F32 => {
18198
0
                                let v1314 = constructor_xmm_zero(ctx, F32X4);
18199
0
                                let v1315 = &C::put_in_xmm_mem(ctx, v381);
18200
0
                                let v1316 = constructor_x64_sqrtss(ctx, v1314, v1315);
18201
0
                                let v1317 = constructor_output_xmm(ctx, v1316);
18202
0
                                // Rule at src/isa/x64/lower.isle line 2579.
18203
0
                                return Some(v1317);
18204
                            }
18205
                            F64 => {
18206
0
                                let v1319 = constructor_xmm_zero(ctx, F64X2);
18207
0
                                let v1315 = &C::put_in_xmm_mem(ctx, v381);
18208
0
                                let v1320 = constructor_x64_sqrtsd(ctx, v1319, v1315);
18209
0
                                let v1321 = constructor_output_xmm(ctx, v1320);
18210
0
                                // Rule at src/isa/x64/lower.isle line 2581.
18211
0
                                return Some(v1321);
18212
                            }
18213
                            F32X4 => {
18214
0
                                let v526 = &C::put_in_xmm_mem(ctx, v381);
18215
0
                                let v1322 = constructor_x64_sqrtps(ctx, v526);
18216
0
                                let v1323 = constructor_output_xmm(ctx, v1322);
18217
0
                                // Rule at src/isa/x64/lower.isle line 2583.
18218
0
                                return Some(v1323);
18219
                            }
18220
                            F64X2 => {
18221
0
                                let v526 = &C::put_in_xmm_mem(ctx, v381);
18222
0
                                let v1324 = constructor_x64_sqrtpd(ctx, v526);
18223
0
                                let v1325 = constructor_output_xmm(ctx, v1324);
18224
0
                                // Rule at src/isa/x64/lower.isle line 2585.
18225
0
                                return Some(v1325);
18226
                            }
18227
0
                            _ => {}
18228
                        }
18229
0
                    }
18230
                }
18231
                &Opcode::Fneg => {
18232
0
                    let v1 = C::first_result(ctx, arg0);
18233
0
                    if let Some(v2) = v1 {
18234
0
                        let v3 = C::value_type(ctx, v2);
18235
0
                        match v3 {
18236
                            F32 => {
18237
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18238
0
                                let v621 = constructor_imm(ctx, F32, 0x80000000);
18239
0
                                let v622 = &constructor_reg_to_xmm_mem(ctx, v621);
18240
0
                                let v623 = constructor_x64_xorps(ctx, v529, v622);
18241
0
                                let v624 = constructor_output_xmm(ctx, v623);
18242
0
                                // Rule at src/isa/x64/lower.isle line 1309.
18243
0
                                return Some(v624);
18244
                            }
18245
                            F64 => {
18246
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18247
0
                                let v626 = constructor_imm(ctx, F64, 0x8000000000000000);
18248
0
                                let v627 = &constructor_reg_to_xmm_mem(ctx, v626);
18249
0
                                let v628 = constructor_x64_xorpd(ctx, v529, v627);
18250
0
                                let v629 = constructor_output_xmm(ctx, v628);
18251
0
                                // Rule at src/isa/x64/lower.isle line 1312.
18252
0
                                return Some(v629);
18253
                            }
18254
                            F32X4 => {
18255
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18256
0
                                let v610 = constructor_vector_all_ones(ctx);
18257
0
                                let v630 = &C::xmi_imm(ctx, 0x1F);
18258
0
                                let v631 = constructor_x64_pslld(ctx, v610, v630);
18259
0
                                let v632 = &C::xmm_to_xmm_mem(ctx, v631);
18260
0
                                let v633 = constructor_x64_xorps(ctx, v529, v632);
18261
0
                                let v634 = constructor_output_xmm(ctx, v633);
18262
0
                                // Rule at src/isa/x64/lower.isle line 1315.
18263
0
                                return Some(v634);
18264
                            }
18265
                            F64X2 => {
18266
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18267
0
                                let v610 = constructor_vector_all_ones(ctx);
18268
0
                                let v635 = &C::xmi_imm(ctx, 0x3F);
18269
0
                                let v636 = constructor_x64_psllq(ctx, v610, v635);
18270
0
                                let v637 = &C::xmm_to_xmm_mem(ctx, v636);
18271
0
                                let v638 = constructor_x64_xorpd(ctx, v529, v637);
18272
0
                                let v639 = constructor_output_xmm(ctx, v638);
18273
0
                                // Rule at src/isa/x64/lower.isle line 1319.
18274
0
                                return Some(v639);
18275
                            }
18276
0
                            _ => {}
18277
                        }
18278
0
                    }
18279
                }
18280
                &Opcode::Fabs => {
18281
0
                    let v1 = C::first_result(ctx, arg0);
18282
0
                    if let Some(v2) = v1 {
18283
0
                        let v3 = C::value_type(ctx, v2);
18284
0
                        match v3 {
18285
                            F32 => {
18286
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18287
0
                                let v601 = constructor_imm(ctx, F32, 0x7FFFFFFF);
18288
0
                                let v602 = &constructor_reg_to_xmm_mem(ctx, v601);
18289
0
                                let v603 = constructor_x64_andps(ctx, v529, v602);
18290
0
                                let v604 = constructor_output_xmm(ctx, v603);
18291
0
                                // Rule at src/isa/x64/lower.isle line 1291.
18292
0
                                return Some(v604);
18293
                            }
18294
                            F64 => {
18295
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18296
0
                                let v606 = constructor_imm(ctx, F64, 0x7FFFFFFFFFFFFFFF);
18297
0
                                let v607 = &constructor_reg_to_xmm_mem(ctx, v606);
18298
0
                                let v608 = constructor_x64_andpd(ctx, v529, v607);
18299
0
                                let v609 = constructor_output_xmm(ctx, v608);
18300
0
                                // Rule at src/isa/x64/lower.isle line 1294.
18301
0
                                return Some(v609);
18302
                            }
18303
                            F32X4 => {
18304
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18305
0
                                let v610 = constructor_vector_all_ones(ctx);
18306
0
                                let v611 = &C::xmi_imm(ctx, 0x1);
18307
0
                                let v612 = constructor_x64_psrld(ctx, v610, v611);
18308
0
                                let v613 = &C::xmm_to_xmm_mem(ctx, v612);
18309
0
                                let v614 = constructor_x64_andps(ctx, v529, v613);
18310
0
                                let v615 = constructor_output_xmm(ctx, v614);
18311
0
                                // Rule at src/isa/x64/lower.isle line 1298.
18312
0
                                return Some(v615);
18313
                            }
18314
                            F64X2 => {
18315
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18316
0
                                let v610 = constructor_vector_all_ones(ctx);
18317
0
                                let v611 = &C::xmi_imm(ctx, 0x1);
18318
0
                                let v616 = constructor_x64_psrlq(ctx, v610, v611);
18319
0
                                let v617 = &C::xmm_to_xmm_mem(ctx, v616);
18320
0
                                let v618 = constructor_x64_andpd(ctx, v529, v617);
18321
0
                                let v619 = constructor_output_xmm(ctx, v618);
18322
0
                                // Rule at src/isa/x64/lower.isle line 1303.
18323
0
                                return Some(v619);
18324
                            }
18325
0
                            _ => {}
18326
                        }
18327
0
                    }
18328
                }
18329
                &Opcode::Ceil => {
18330
0
                    let v2159 = &C::put_in_reg_mem(ctx, v381);
18331
0
                    let v640 = C::value_type(ctx, v381);
18332
0
                    let v2161 = constructor_x64_round(ctx, v640, v2159, &RoundImm::RoundUp);
18333
0
                    let v2162 = constructor_output_xmm(ctx, v2161);
18334
0
                    // Rule at src/isa/x64/lower.isle line 4007.
18335
0
                    return Some(v2162);
18336
                }
18337
                &Opcode::Floor => {
18338
0
                    let v2159 = &C::put_in_reg_mem(ctx, v381);
18339
0
                    let v640 = C::value_type(ctx, v381);
18340
0
                    let v2164 = constructor_x64_round(ctx, v640, v2159, &RoundImm::RoundDown);
18341
0
                    let v2165 = constructor_output_xmm(ctx, v2164);
18342
0
                    // Rule at src/isa/x64/lower.isle line 4012.
18343
0
                    return Some(v2165);
18344
                }
18345
                &Opcode::Trunc => {
18346
0
                    let v2159 = &C::put_in_reg_mem(ctx, v381);
18347
0
                    let v640 = C::value_type(ctx, v381);
18348
0
                    let v2170 = constructor_x64_round(ctx, v640, v2159, &RoundImm::RoundZero);
18349
0
                    let v2171 = constructor_output_xmm(ctx, v2170);
18350
0
                    // Rule at src/isa/x64/lower.isle line 4022.
18351
0
                    return Some(v2171);
18352
                }
18353
                &Opcode::Nearest => {
18354
0
                    let v2159 = &C::put_in_reg_mem(ctx, v381);
18355
0
                    let v640 = C::value_type(ctx, v381);
18356
0
                    let v2167 = constructor_x64_round(ctx, v640, v2159, &RoundImm::RoundNearest);
18357
0
                    let v2168 = constructor_output_xmm(ctx, v2167);
18358
0
                    // Rule at src/isa/x64/lower.isle line 4017.
18359
0
                    return Some(v2168);
18360
                }
18361
                &Opcode::IsNull => {
18362
0
                    let v640 = C::value_type(ctx, v381);
18363
0
                    if v640 == R64 {
18364
0
                        let v382 = constructor_put_in_gpr(ctx, v381);
18365
0
                        let v1231 = &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0x0, v382);
18366
0
                        let v1232 = &constructor_x64_setcc(ctx, &CC::Z);
18367
0
                        let v1233 = constructor_with_flags(ctx, v1231, v1232);
18368
0
                        let v1234 = C::output(ctx, v1233);
18369
0
                        // Rule at src/isa/x64/lower.isle line 2440.
18370
0
                        return Some(v1234);
18371
0
                    }
18372
                }
18373
                &Opcode::IsInvalid => {
18374
0
                    let v640 = C::value_type(ctx, v381);
18375
0
                    if v640 == R64 {
18376
0
                        let v382 = constructor_put_in_gpr(ctx, v381);
18377
0
                        let v1236 = &constructor_x64_cmp_imm(ctx, &OperandSize::Size64, 0xFFFFFFFF, v382);
18378
0
                        let v1232 = &constructor_x64_setcc(ctx, &CC::Z);
18379
0
                        let v1237 = constructor_with_flags(ctx, v1236, v1232);
18380
0
                        let v1238 = C::output(ctx, v1237);
18381
0
                        // Rule at src/isa/x64/lower.isle line 2448.
18382
0
                        return Some(v1238);
18383
0
                    }
18384
                }
18385
                &Opcode::ScalarToVector => {
18386
0
                    let v2416 = &C::sinkable_load(ctx, v381);
18387
0
                    if let Some(v2417) = v2416 {
18388
0
                        let v640 = C::value_type(ctx, v381);
18389
0
                        let v2423 = C::ty_64(ctx, v640);
18390
0
                        if let Some(v2424) = v2423 {
18391
0
                            let v2420 = &C::sink_load(ctx, v2417);
18392
0
                            let v2425 = constructor_x64_movsd_load(ctx, v2420);
18393
0
                            let v2426 = constructor_output_xmm(ctx, v2425);
18394
0
                            // Rule at src/isa/x64/lower.isle line 4462.
18395
0
                            return Some(v2426);
18396
0
                        }
18397
0
                        let v2418 = C::ty_32(ctx, v640);
18398
0
                        if let Some(v2419) = v2418 {
18399
0
                            let v2420 = &C::sink_load(ctx, v2417);
18400
0
                            let v2421 = constructor_x64_movss_load(ctx, v2420);
18401
0
                            let v2422 = constructor_output_xmm(ctx, v2421);
18402
0
                            // Rule at src/isa/x64/lower.isle line 4460.
18403
0
                            return Some(v2422);
18404
0
                        }
18405
0
                    }
18406
0
                    let v640 = C::value_type(ctx, v381);
18407
0
                    let v1875 = C::ty_scalar_float(ctx, v640);
18408
0
                    if let Some(v1876) = v1875 {
18409
0
                        let v1257 = constructor_output_value(ctx, v381);
18410
0
                        // Rule at src/isa/x64/lower.isle line 4450.
18411
0
                        return Some(v1257);
18412
0
                    }
18413
0
                    let v382 = constructor_put_in_gpr(ctx, v381);
18414
0
                    let v2414 = constructor_bitcast_gpr_to_xmm(ctx, v640, v382);
18415
0
                    let v2415 = constructor_output_xmm(ctx, v2414);
18416
0
                    // Rule at src/isa/x64/lower.isle line 4455.
18417
0
                    return Some(v2415);
18418
                }
18419
                &Opcode::Bmask => {
18420
0
                    let v1 = C::first_result(ctx, arg0);
18421
0
                    if let Some(v2) = v1 {
18422
0
                        let v385 = C::put_in_regs(ctx, v381);
18423
0
                        let v3 = C::value_type(ctx, v2);
18424
0
                        let v640 = C::value_type(ctx, v381);
18425
0
                        let v641 = constructor_lower_bmask(ctx, v3, v640, v385);
18426
0
                        let v642 = C::output(ctx, v641);
18427
0
                        // Rule at src/isa/x64/lower.isle line 1364.
18428
0
                        return Some(v642);
18429
0
                    }
18430
                }
18431
                &Opcode::Ireduce => {
18432
12.7k
                    let v1 = C::first_result(ctx, arg0);
18433
12.7k
                    if let Some(v2) = v1 {
18434
12.7k
                        let v3 = C::value_type(ctx, v2);
18435
12.7k
                        let v4 = C::fits_in_64(ctx, v3);
18436
12.7k
                        if let Some(v5) = v4 {
18437
12.7k
                            let v385 = C::put_in_regs(ctx, v381);
18438
12.7k
                            let v386 = constructor_value_regs_get_gpr(ctx, v385, 0x0);
18439
12.7k
                            let v1258 = constructor_output_gpr(ctx, v386);
18440
12.7k
                            // Rule at src/isa/x64/lower.isle line 2498.
18441
12.7k
                            return Some(v1258);
18442
0
                        }
18443
0
                        let v640 = C::value_type(ctx, v381);
18444
0
                        if v3 == v640 {
18445
0
                            let v1257 = constructor_output_value(ctx, v381);
18446
0
                            // Rule at src/isa/x64/lower.isle line 2492.
18447
0
                            return Some(v1257);
18448
0
                        }
18449
0
                    }
18450
                }
18451
                &Opcode::SwidenLow => {
18452
0
                    let v1 = C::first_result(ctx, arg0);
18453
0
                    if let Some(v2) = v1 {
18454
0
                        let v3 = C::value_type(ctx, v2);
18455
0
                        match v3 {
18456
                            I16X8 => {
18457
0
                                let v441 = C::use_sse41(ctx);
18458
0
                                if v441 == true {
18459
0
                                    let v640 = C::value_type(ctx, v381);
18460
0
                                    if v640 == I8X16 {
18461
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18462
0
                                        let v2045 = constructor_x64_pmovsxbw(ctx, v526);
18463
0
                                        let v2046 = constructor_output_xmm(ctx, v2045);
18464
0
                                        // Rule at src/isa/x64/lower.isle line 3727.
18465
0
                                        return Some(v2046);
18466
0
                                    }
18467
0
                                }
18468
                            }
18469
                            I32X4 => {
18470
0
                                let v441 = C::use_sse41(ctx);
18471
0
                                if v441 == true {
18472
0
                                    let v640 = C::value_type(ctx, v381);
18473
0
                                    if v640 == I16X8 {
18474
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18475
0
                                        let v2047 = constructor_x64_pmovsxwd(ctx, v526);
18476
0
                                        let v2048 = constructor_output_xmm(ctx, v2047);
18477
0
                                        // Rule at src/isa/x64/lower.isle line 3730.
18478
0
                                        return Some(v2048);
18479
0
                                    }
18480
0
                                }
18481
                            }
18482
                            I64X2 => {
18483
0
                                let v441 = C::use_sse41(ctx);
18484
0
                                if v441 == true {
18485
0
                                    let v640 = C::value_type(ctx, v381);
18486
0
                                    if v640 == I32X4 {
18487
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18488
0
                                        let v2049 = constructor_x64_pmovsxdq(ctx, v526);
18489
0
                                        let v2050 = constructor_output_xmm(ctx, v2049);
18490
0
                                        // Rule at src/isa/x64/lower.isle line 3733.
18491
0
                                        return Some(v2050);
18492
0
                                    }
18493
0
                                }
18494
                            }
18495
0
                            _ => {}
18496
                        }
18497
0
                        let v529 = constructor_put_in_xmm(ctx, v381);
18498
0
                        let v2051 = constructor_lower_swiden_low(ctx, v3, v529);
18499
0
                        let v2052 = constructor_output_xmm(ctx, v2051);
18500
0
                        // Rule at src/isa/x64/lower.isle line 3737.
18501
0
                        return Some(v2052);
18502
0
                    }
18503
                }
18504
                &Opcode::SwidenHigh => {
18505
0
                    let v1 = C::first_result(ctx, arg0);
18506
0
                    if let Some(v2) = v1 {
18507
0
                        let v3 = C::value_type(ctx, v2);
18508
0
                        match v3 {
18509
                            I16X8 => {
18510
0
                                let v640 = C::value_type(ctx, v381);
18511
0
                                if v640 == I8X16 {
18512
0
                                    let v441 = C::use_sse41(ctx);
18513
0
                                    if v441 == true {
18514
0
                                        let v525 = C::use_ssse3(ctx);
18515
0
                                        if v525 == true {
18516
0
                                            let v529 = constructor_put_in_xmm(ctx, v381);
18517
0
                                            let v1328 = &C::xmm_to_xmm_mem(ctx, v529);
18518
0
                                            let v2053 = constructor_x64_palignr(ctx, v529, v1328, 0x8);
18519
0
                                            let v2054 = &C::xmm_to_xmm_mem(ctx, v2053);
18520
0
                                            let v2055 = constructor_x64_pmovsxbw(ctx, v2054);
18521
0
                                            let v2056 = constructor_output_xmm(ctx, v2055);
18522
0
                                            // Rule at src/isa/x64/lower.isle line 3760.
18523
0
                                            return Some(v2056);
18524
0
                                        }
18525
0
                                    }
18526
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
18527
0
                                    let v1328 = &C::xmm_to_xmm_mem(ctx, v529);
18528
0
                                    let v2063 = constructor_x64_punpckhbw(ctx, v529, v1328);
18529
0
                                    let v2064 = &C::xmi_imm(ctx, 0x8);
18530
0
                                    let v2065 = constructor_x64_psraw(ctx, v2063, v2064);
18531
0
                                    let v2066 = constructor_output_xmm(ctx, v2065);
18532
0
                                    // Rule at src/isa/x64/lower.isle line 3776.
18533
0
                                    return Some(v2066);
18534
0
                                }
18535
                            }
18536
                            I32X4 => {
18537
0
                                let v640 = C::value_type(ctx, v381);
18538
0
                                if v640 == I16X8 {
18539
0
                                    let v441 = C::use_sse41(ctx);
18540
0
                                    if v441 == true {
18541
0
                                        let v525 = C::use_ssse3(ctx);
18542
0
                                        if v525 == true {
18543
0
                                            let v529 = constructor_put_in_xmm(ctx, v381);
18544
0
                                            let v1328 = &C::xmm_to_xmm_mem(ctx, v529);
18545
0
                                            let v2053 = constructor_x64_palignr(ctx, v529, v1328, 0x8);
18546
0
                                            let v2054 = &C::xmm_to_xmm_mem(ctx, v2053);
18547
0
                                            let v2057 = constructor_x64_pmovsxwd(ctx, v2054);
18548
0
                                            let v2058 = constructor_output_xmm(ctx, v2057);
18549
0
                                            // Rule at src/isa/x64/lower.isle line 3765.
18550
0
                                            return Some(v2058);
18551
0
                                        }
18552
0
                                    }
18553
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
18554
0
                                    let v1328 = &C::xmm_to_xmm_mem(ctx, v529);
18555
0
                                    let v2067 = constructor_x64_punpckhwd(ctx, v529, v1328);
18556
0
                                    let v1860 = &C::xmi_imm(ctx, 0x10);
18557
0
                                    let v2068 = constructor_x64_psrad(ctx, v2067, v1860);
18558
0
                                    let v2069 = constructor_output_xmm(ctx, v2068);
18559
0
                                    // Rule at src/isa/x64/lower.isle line 3779.
18560
0
                                    return Some(v2069);
18561
0
                                }
18562
                            }
18563
                            I64X2 => {
18564
0
                                let v640 = C::value_type(ctx, v381);
18565
0
                                if v640 == I32X4 {
18566
0
                                    let v441 = C::use_sse41(ctx);
18567
0
                                    if v441 == true {
18568
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18569
0
                                        let v2059 = constructor_x64_pshufd(ctx, v526, 0xEE);
18570
0
                                        let v2060 = &C::xmm_to_xmm_mem(ctx, v2059);
18571
0
                                        let v2061 = constructor_x64_pmovsxdq(ctx, v2060);
18572
0
                                        let v2062 = constructor_output_xmm(ctx, v2061);
18573
0
                                        // Rule at src/isa/x64/lower.isle line 3770.
18574
0
                                        return Some(v2062);
18575
0
                                    }
18576
0
                                    let v526 = &C::put_in_xmm_mem(ctx, v381);
18577
0
                                    let v2071 = constructor_x64_pshufd(ctx, v526, 0xE);
18578
0
                                    let v2072 = constructor_xmm_zero(ctx, I32X4);
18579
0
                                    let v2073 = &C::xmm_to_xmm_mem(ctx, v2071);
18580
0
                                    let v2074 = constructor_x64_pcmpgtd(ctx, v2072, v2073);
18581
0
                                    let v2075 = &C::xmm_to_xmm_mem(ctx, v2074);
18582
0
                                    let v2076 = constructor_x64_punpckldq(ctx, v2071, v2075);
18583
0
                                    let v2077 = constructor_output_xmm(ctx, v2076);
18584
0
                                    // Rule at src/isa/x64/lower.isle line 3784.
18585
0
                                    return Some(v2077);
18586
0
                                }
18587
                            }
18588
0
                            _ => {}
18589
                        }
18590
0
                    }
18591
                }
18592
                &Opcode::UwidenLow => {
18593
0
                    let v1 = C::first_result(ctx, arg0);
18594
0
                    if let Some(v2) = v1 {
18595
0
                        let v3 = C::value_type(ctx, v2);
18596
0
                        match v3 {
18597
                            I16X8 => {
18598
0
                                let v441 = C::use_sse41(ctx);
18599
0
                                if v441 == true {
18600
0
                                    let v640 = C::value_type(ctx, v381);
18601
0
                                    if v640 == I8X16 {
18602
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18603
0
                                        let v2078 = constructor_x64_pmovzxbw(ctx, v526);
18604
0
                                        let v2079 = constructor_output_xmm(ctx, v2078);
18605
0
                                        // Rule at src/isa/x64/lower.isle line 3792.
18606
0
                                        return Some(v2079);
18607
0
                                    }
18608
0
                                }
18609
                            }
18610
                            I32X4 => {
18611
0
                                let v441 = C::use_sse41(ctx);
18612
0
                                if v441 == true {
18613
0
                                    let v640 = C::value_type(ctx, v381);
18614
0
                                    if v640 == I16X8 {
18615
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18616
0
                                        let v2080 = constructor_x64_pmovzxwd(ctx, v526);
18617
0
                                        let v2081 = constructor_output_xmm(ctx, v2080);
18618
0
                                        // Rule at src/isa/x64/lower.isle line 3795.
18619
0
                                        return Some(v2081);
18620
0
                                    }
18621
0
                                }
18622
                            }
18623
                            I64X2 => {
18624
0
                                let v441 = C::use_sse41(ctx);
18625
0
                                if v441 == true {
18626
0
                                    let v640 = C::value_type(ctx, v381);
18627
0
                                    if v640 == I32X4 {
18628
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18629
0
                                        let v2082 = constructor_x64_pmovzxdq(ctx, v526);
18630
0
                                        let v2083 = constructor_output_xmm(ctx, v2082);
18631
0
                                        // Rule at src/isa/x64/lower.isle line 3798.
18632
0
                                        return Some(v2083);
18633
0
                                    }
18634
0
                                }
18635
                            }
18636
0
                            _ => {}
18637
                        }
18638
0
                        let v529 = constructor_put_in_xmm(ctx, v381);
18639
0
                        let v2084 = constructor_lower_uwiden_low(ctx, v3, v529);
18640
0
                        let v2085 = constructor_output_xmm(ctx, v2084);
18641
0
                        // Rule at src/isa/x64/lower.isle line 3802.
18642
0
                        return Some(v2085);
18643
0
                    }
18644
                }
18645
                &Opcode::UwidenHigh => {
18646
0
                    let v1 = C::first_result(ctx, arg0);
18647
0
                    if let Some(v2) = v1 {
18648
0
                        let v3 = C::value_type(ctx, v2);
18649
0
                        match v3 {
18650
                            I16X8 => {
18651
0
                                let v640 = C::value_type(ctx, v381);
18652
0
                                if v640 == I8X16 {
18653
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
18654
0
                                    let v530 = constructor_xmm_zero(ctx, I8X16);
18655
0
                                    let v2086 = &C::xmm_to_xmm_mem(ctx, v530);
18656
0
                                    let v2087 = constructor_x64_punpckhbw(ctx, v529, v2086);
18657
0
                                    let v2088 = constructor_output_xmm(ctx, v2087);
18658
0
                                    // Rule at src/isa/x64/lower.isle line 3817.
18659
0
                                    return Some(v2088);
18660
0
                                }
18661
                            }
18662
                            I32X4 => {
18663
0
                                let v640 = C::value_type(ctx, v381);
18664
0
                                if v640 == I16X8 {
18665
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
18666
0
                                    let v530 = constructor_xmm_zero(ctx, I8X16);
18667
0
                                    let v2086 = &C::xmm_to_xmm_mem(ctx, v530);
18668
0
                                    let v2089 = constructor_x64_punpckhwd(ctx, v529, v2086);
18669
0
                                    let v2090 = constructor_output_xmm(ctx, v2089);
18670
0
                                    // Rule at src/isa/x64/lower.isle line 3819.
18671
0
                                    return Some(v2090);
18672
0
                                }
18673
                            }
18674
                            I64X2 => {
18675
0
                                let v640 = C::value_type(ctx, v381);
18676
0
                                if v640 == I32X4 {
18677
0
                                    let v529 = constructor_put_in_xmm(ctx, v381);
18678
0
                                    let v1899 = constructor_xmm_zero(ctx, F32X4);
18679
0
                                    let v1900 = &C::xmm_to_xmm_mem(ctx, v1899);
18680
0
                                    let v2091 = constructor_x64_unpckhps(ctx, v529, v1900);
18681
0
                                    let v2092 = constructor_output_xmm(ctx, v2091);
18682
0
                                    // Rule at src/isa/x64/lower.isle line 3821.
18683
0
                                    return Some(v2092);
18684
0
                                }
18685
                            }
18686
0
                            _ => {}
18687
                        }
18688
0
                    }
18689
                }
18690
                &Opcode::Uextend => {
18691
779k
                    let v1 = C::first_result(ctx, arg0);
18692
779k
                    if let Some(v2) = v1 {
18693
779k
                        let v3 = C::value_type(ctx, v2);
18694
779k
                        match v3 {
18695
                            I64 => {
18696
767k
                                let v1239 = constructor_extend_to_gpr(ctx, v381, I64, &ExtendKind::Zero);
18697
767k
                                let v1244 = constructor_output_gpr(ctx, v1239);
18698
767k
                                // Rule at src/isa/x64/lower.isle line 2461.
18699
767k
                                return Some(v1244);
18700
                            }
18701
                            I128 => {
18702
0
                                let v1239 = constructor_extend_to_gpr(ctx, v381, I64, &ExtendKind::Zero);
18703
0
                                let v1240 = C::gpr_to_reg(ctx, v1239);
18704
0
                                let v1241 = constructor_imm(ctx, I64, 0x0);
18705
0
                                let v1242 = C::value_regs(ctx, v1240, v1241);
18706
0
                                let v1243 = C::output(ctx, v1242);
18707
0
                                // Rule at src/isa/x64/lower.isle line 2457.
18708
0
                                return Some(v1243);
18709
                            }
18710
11.7k
                            _ => {}
18711
11.7k
                        }
18712
11.7k
                        let v1245 = C::fits_in_32(ctx, v3);
18713
11.7k
                        if let Some(v1246) = v1245 {
18714
11.7k
                            let v1086 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Zero);
18715
11.7k
                            let v1247 = constructor_output_gpr(ctx, v1086);
18716
11.7k
                            // Rule at src/isa/x64/lower.isle line 2466.
18717
11.7k
                            return Some(v1247);
18718
0
                        }
18719
0
                    }
18720
                }
18721
                &Opcode::Sextend => {
18722
484
                    let v1 = C::first_result(ctx, arg0);
18723
484
                    if let Some(v2) = v1 {
18724
484
                        let v3 = C::value_type(ctx, v2);
18725
484
                        match v3 {
18726
                            I64 => {
18727
6
                                let v1248 = constructor_extend_to_gpr(ctx, v381, I64, &ExtendKind::Sign);
18728
6
                                let v1254 = constructor_output_gpr(ctx, v1248);
18729
6
                                // Rule at src/isa/x64/lower.isle line 2481.
18730
6
                                return Some(v1254);
18731
                            }
18732
                            I128 => {
18733
0
                                let v1248 = constructor_extend_to_gpr(ctx, v381, I64, &ExtendKind::Sign);
18734
0
                                let v858 = Imm8Reg::Imm8 {
18735
0
                                    imm: 0x3F,
18736
0
                                };
18737
0
                                let v859 = &C::imm8_reg_to_imm8_gpr(ctx, &v858);
18738
0
                                let v1249 = constructor_x64_sar(ctx, I64, v1248, v859);
18739
0
                                let v1250 = C::gpr_to_reg(ctx, v1248);
18740
0
                                let v1251 = C::gpr_to_reg(ctx, v1249);
18741
0
                                let v1252 = C::value_regs(ctx, v1250, v1251);
18742
0
                                let v1253 = C::output(ctx, v1252);
18743
0
                                // Rule at src/isa/x64/lower.isle line 2475.
18744
0
                                return Some(v1253);
18745
                            }
18746
478
                            _ => {}
18747
478
                        }
18748
478
                        let v1245 = C::fits_in_32(ctx, v3);
18749
478
                        if let Some(v1246) = v1245 {
18750
478
                            let v1255 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Sign);
18751
478
                            let v1256 = constructor_output_gpr(ctx, v1255);
18752
478
                            // Rule at src/isa/x64/lower.isle line 2486.
18753
478
                            return Some(v1256);
18754
0
                        }
18755
0
                    }
18756
                }
18757
                &Opcode::Fpromote => {
18758
0
                    let v1 = C::first_result(ctx, arg0);
18759
0
                    if let Some(v2) = v1 {
18760
0
                        let v3 = C::value_type(ctx, v2);
18761
0
                        if v3 == F64 {
18762
0
                            let v1319 = constructor_xmm_zero(ctx, F64X2);
18763
0
                            let v1315 = &C::put_in_xmm_mem(ctx, v381);
18764
0
                            let v1326 = constructor_x64_cvtss2sd(ctx, v1319, v1315);
18765
0
                            let v1327 = constructor_output_xmm(ctx, v1326);
18766
0
                            // Rule at src/isa/x64/lower.isle line 2589.
18767
0
                            return Some(v1327);
18768
0
                        }
18769
0
                    }
18770
                }
18771
                &Opcode::Fdemote => {
18772
0
                    let v1 = C::first_result(ctx, arg0);
18773
0
                    if let Some(v2) = v1 {
18774
0
                        let v3 = C::value_type(ctx, v2);
18775
0
                        if v3 == F32 {
18776
0
                            let v1314 = constructor_xmm_zero(ctx, F32X4);
18777
0
                            let v1315 = &C::put_in_xmm_mem(ctx, v381);
18778
0
                            let v1331 = constructor_x64_cvtsd2ss(ctx, v1314, v1315);
18779
0
                            let v1332 = constructor_output_xmm(ctx, v1331);
18780
0
                            // Rule at src/isa/x64/lower.isle line 2597.
18781
0
                            return Some(v1332);
18782
0
                        }
18783
0
                    }
18784
                }
18785
                &Opcode::Fvdemote => {
18786
0
                    let v1 = C::first_result(ctx, arg0);
18787
0
                    if let Some(v2) = v1 {
18788
0
                        let v3 = C::value_type(ctx, v2);
18789
0
                        if v3 == F32X4 {
18790
0
                            let v526 = &C::put_in_xmm_mem(ctx, v381);
18791
0
                            let v1333 = constructor_x64_cvtpd2ps(ctx, v526);
18792
0
                            let v1334 = constructor_output_xmm(ctx, v1333);
18793
0
                            // Rule at src/isa/x64/lower.isle line 2601.
18794
0
                            return Some(v1334);
18795
0
                        }
18796
0
                    }
18797
                }
18798
                &Opcode::FvpromoteLow => {
18799
0
                    let v1 = C::first_result(ctx, arg0);
18800
0
                    if let Some(v2) = v1 {
18801
0
                        let v3 = C::value_type(ctx, v2);
18802
0
                        if v3 == F64X2 {
18803
0
                            let v529 = constructor_put_in_xmm(ctx, v381);
18804
0
                            let v1328 = &C::xmm_to_xmm_mem(ctx, v529);
18805
0
                            let v1329 = constructor_x64_cvtps2pd(ctx, v1328);
18806
0
                            let v1330 = constructor_output_xmm(ctx, v1329);
18807
0
                            // Rule at src/isa/x64/lower.isle line 2593.
18808
0
                            return Some(v1330);
18809
0
                        }
18810
0
                    }
18811
                }
18812
                &Opcode::FcvtToUint => {
18813
0
                    let v1 = C::first_result(ctx, arg0);
18814
0
                    if let Some(v2) = v1 {
18815
0
                        let v640 = C::value_type(ctx, v381);
18816
0
                        let v1875 = C::ty_scalar_float(ctx, v640);
18817
0
                        if let Some(v1876) = v1875 {
18818
0
                            let v3 = C::value_type(ctx, v2);
18819
0
                            let v1877 = constructor_cvt_float_to_uint_seq(ctx, v3, v381, false);
18820
0
                            let v1878 = constructor_output_gpr(ctx, v1877);
18821
0
                            // Rule at src/isa/x64/lower.isle line 3479.
18822
0
                            return Some(v1878);
18823
0
                        }
18824
0
                    }
18825
                }
18826
                &Opcode::FcvtToSint => {
18827
0
                    let v1 = C::first_result(ctx, arg0);
18828
0
                    if let Some(v2) = v1 {
18829
0
                        let v640 = C::value_type(ctx, v381);
18830
0
                        let v1875 = C::ty_scalar_float(ctx, v640);
18831
0
                        if let Some(v1876) = v1875 {
18832
0
                            let v3 = C::value_type(ctx, v2);
18833
0
                            let v1881 = constructor_cvt_float_to_sint_seq(ctx, v3, v381, false);
18834
0
                            let v1882 = constructor_output_gpr(ctx, v1881);
18835
0
                            // Rule at src/isa/x64/lower.isle line 3485.
18836
0
                            return Some(v1882);
18837
0
                        }
18838
0
                    }
18839
                }
18840
                &Opcode::FcvtToUintSat => {
18841
0
                    let v1 = C::first_result(ctx, arg0);
18842
0
                    if let Some(v2) = v1 {
18843
0
                        let v3 = C::value_type(ctx, v2);
18844
0
                        if v3 == I32X4 {
18845
0
                            let v640 = C::value_type(ctx, v381);
18846
0
                            if v640 == F32X4 {
18847
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18848
0
                                let v1899 = constructor_xmm_zero(ctx, F32X4);
18849
0
                                let v1900 = &C::xmm_to_xmm_mem(ctx, v1899);
18850
0
                                let v1901 = constructor_x64_maxps(ctx, v529, v1900);
18851
0
                                let v1902 = &C::xmm_to_xmm_mem(ctx, v1899);
18852
0
                                let v1903 = constructor_x64_pcmpeqd(ctx, v1899, v1902);
18853
0
                                let v1904 = &C::xmi_imm(ctx, 0x1);
18854
0
                                let v1905 = constructor_x64_psrld(ctx, v1903, v1904);
18855
0
                                let v1906 = &C::xmm_to_xmm_mem(ctx, v1905);
18856
0
                                let v1907 = constructor_x64_cvtdq2ps(ctx, v1906);
18857
0
                                let v1908 = &C::xmm_to_xmm_mem(ctx, v1901);
18858
0
                                let v1909 = constructor_x64_cvttps2dq(ctx, v1908);
18859
0
                                let v1910 = &C::xmm_to_xmm_mem(ctx, v1907);
18860
0
                                let v1911 = constructor_x64_subps(ctx, v1901, v1910);
18861
0
                                let v1912 = &C::xmm_to_xmm_mem(ctx, v1911);
18862
0
                                let v1913 = constructor_x64_cmpps(ctx, v1907, v1912, &FcmpImm::LessThanOrEqual);
18863
0
                                let v1914 = &C::xmm_to_xmm_mem(ctx, v1911);
18864
0
                                let v1915 = constructor_x64_cvttps2dq(ctx, v1914);
18865
0
                                let v1916 = &C::xmm_to_xmm_mem(ctx, v1913);
18866
0
                                let v1917 = constructor_x64_pxor(ctx, v1915, v1916);
18867
0
                                let v1918 = constructor_xmm_zero(ctx, I32X4);
18868
0
                                let v1919 = constructor_lower_vec_smax(ctx, I32X4, v1917, v1918);
18869
0
                                let v1920 = &C::xmm_to_xmm_mem(ctx, v1909);
18870
0
                                let v1921 = constructor_x64_paddd(ctx, v1919, v1920);
18871
0
                                let v1922 = constructor_output_xmm(ctx, v1921);
18872
0
                                // Rule at src/isa/x64/lower.isle line 3563.
18873
0
                                return Some(v1922);
18874
0
                            }
18875
0
                        }
18876
0
                        let v640 = C::value_type(ctx, v381);
18877
0
                        let v1875 = C::ty_scalar_float(ctx, v640);
18878
0
                        if let Some(v1876) = v1875 {
18879
0
                            let v1879 = constructor_cvt_float_to_uint_seq(ctx, v3, v381, true);
18880
0
                            let v1880 = constructor_output_gpr(ctx, v1879);
18881
0
                            // Rule at src/isa/x64/lower.isle line 3482.
18882
0
                            return Some(v1880);
18883
0
                        }
18884
0
                    }
18885
                }
18886
                &Opcode::FcvtToSintSat => {
18887
0
                    let v1 = C::first_result(ctx, arg0);
18888
0
                    if let Some(v2) = v1 {
18889
0
                        let v3 = C::value_type(ctx, v2);
18890
0
                        if v3 == I32X4 {
18891
0
                            let v640 = C::value_type(ctx, v381);
18892
0
                            if v640 == F32X4 {
18893
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18894
0
                                let v1328 = &C::xmm_to_xmm_mem(ctx, v529);
18895
0
                                let v1885 = constructor_x64_cmpps(ctx, v529, v1328, &FcmpImm::Equal);
18896
0
                                let v1886 = &C::xmm_to_xmm_mem(ctx, v1885);
18897
0
                                let v1887 = constructor_x64_andps(ctx, v529, v1886);
18898
0
                                let v1888 = &C::xmm_to_xmm_mem(ctx, v1887);
18899
0
                                let v1889 = constructor_x64_pxor(ctx, v1885, v1888);
18900
0
                                let v1890 = &C::xmm_to_xmm_mem(ctx, v1887);
18901
0
                                let v1891 = constructor_x64_cvttps2dq(ctx, v1890);
18902
0
                                let v1892 = &C::xmm_to_xmm_mem(ctx, v1889);
18903
0
                                let v1893 = constructor_x64_pand(ctx, v1891, v1892);
18904
0
                                let v1894 = &C::xmi_imm(ctx, 0x1F);
18905
0
                                let v1895 = constructor_x64_psrad(ctx, v1893, v1894);
18906
0
                                let v1896 = &C::xmm_to_xmm_mem(ctx, v1891);
18907
0
                                let v1897 = constructor_x64_pxor(ctx, v1895, v1896);
18908
0
                                let v1898 = constructor_output_xmm(ctx, v1897);
18909
0
                                // Rule at src/isa/x64/lower.isle line 3492.
18910
0
                                return Some(v1898);
18911
0
                            }
18912
0
                        }
18913
0
                        let v640 = C::value_type(ctx, v381);
18914
0
                        let v1875 = C::ty_scalar_float(ctx, v640);
18915
0
                        if let Some(v1876) = v1875 {
18916
0
                            let v1883 = constructor_cvt_float_to_sint_seq(ctx, v3, v381, true);
18917
0
                            let v1884 = constructor_output_gpr(ctx, v1883);
18918
0
                            // Rule at src/isa/x64/lower.isle line 3488.
18919
0
                            return Some(v1884);
18920
0
                        }
18921
0
                    }
18922
                }
18923
                &Opcode::X86Cvtt2dq => {
18924
0
                    let v1 = C::first_result(ctx, arg0);
18925
0
                    if let Some(v2) = v1 {
18926
0
                        let v3 = C::value_type(ctx, v2);
18927
0
                        if v3 == I32X4 {
18928
0
                            let v640 = C::value_type(ctx, v381);
18929
0
                            if v640 == F32X4 {
18930
0
                                let v526 = &C::put_in_xmm_mem(ctx, v381);
18931
0
                                let v1923 = constructor_x64_cvttps2dq(ctx, v526);
18932
0
                                let v1924 = constructor_output_xmm(ctx, v1923);
18933
0
                                // Rule at src/isa/x64/lower.isle line 3610.
18934
0
                                return Some(v1924);
18935
0
                            }
18936
0
                        }
18937
0
                    }
18938
                }
18939
                &Opcode::FcvtFromUint => {
18940
0
                    let v1 = C::first_result(ctx, arg0);
18941
0
                    if let Some(v2) = v1 {
18942
0
                        let v3 = C::value_type(ctx, v2);
18943
0
                        match v3 {
18944
                            F32 => {
18945
0
                                let v640 = C::value_type(ctx, v381);
18946
0
                                let v1833 = C::fits_in_32(ctx, v640);
18947
0
                                if let Some(v1834) = v1833 {
18948
0
                                    let v1835 = C::ty_int(ctx, v1834);
18949
0
                                    if let Some(v1836) = v1835 {
18950
0
                                        let v1314 = constructor_xmm_zero(ctx, F32X4);
18951
0
                                        let v1837 = constructor_extend_to_gpr(ctx, v381, I64, &ExtendKind::Zero);
18952
0
                                        let v1838 = &C::gpr_to_gpr_mem(ctx, v1837);
18953
0
                                        let v1839 = constructor_x64_cvtsi2ss(ctx, I64, v1314, v1838);
18954
0
                                        let v1840 = constructor_output_xmm(ctx, v1839);
18955
0
                                        // Rule at src/isa/x64/lower.isle line 3406.
18956
0
                                        return Some(v1840);
18957
0
                                    }
18958
0
                                }
18959
                            }
18960
                            F64 => {
18961
0
                                let v640 = C::value_type(ctx, v381);
18962
0
                                let v1833 = C::fits_in_32(ctx, v640);
18963
0
                                if let Some(v1834) = v1833 {
18964
0
                                    let v1835 = C::ty_int(ctx, v1834);
18965
0
                                    if let Some(v1836) = v1835 {
18966
0
                                        let v1319 = constructor_xmm_zero(ctx, F64X2);
18967
0
                                        let v1837 = constructor_extend_to_gpr(ctx, v381, I64, &ExtendKind::Zero);
18968
0
                                        let v1838 = &C::gpr_to_gpr_mem(ctx, v1837);
18969
0
                                        let v1841 = constructor_x64_cvtsi2sd(ctx, I64, v1319, v1838);
18970
0
                                        let v1842 = constructor_output_xmm(ctx, v1841);
18971
0
                                        // Rule at src/isa/x64/lower.isle line 3409.
18972
0
                                        return Some(v1842);
18973
0
                                    }
18974
0
                                }
18975
                            }
18976
                            F32X4 => {
18977
0
                                let v332 = C::use_avx512vl(ctx);
18978
0
                                if v332 == true {
18979
0
                                    let v333 = C::use_avx512f(ctx);
18980
0
                                    if v333 == true {
18981
0
                                        let v526 = &C::put_in_xmm_mem(ctx, v381);
18982
0
                                        let v1855 = constructor_x64_vcvtudq2ps(ctx, v526);
18983
0
                                        let v1856 = constructor_output_xmm(ctx, v1855);
18984
0
                                        // Rule at src/isa/x64/lower.isle line 3427.
18985
0
                                        return Some(v1856);
18986
0
                                    }
18987
0
                                }
18988
0
                                let v529 = constructor_put_in_xmm(ctx, v381);
18989
0
                                let v1858 = &C::xmi_imm(ctx, 0x10);
18990
0
                                let v1859 = constructor_x64_pslld(ctx, v529, v1858);
18991
0
                                let v1860 = &C::xmi_imm(ctx, 0x10);
18992
0
                                let v1861 = constructor_x64_psrld(ctx, v1859, v1860);
18993
0
                                let v1862 = &C::xmm_to_xmm_mem(ctx, v1861);
18994
0
                                let v1863 = constructor_x64_psubd(ctx, v529, v1862);
18995
0
                                let v1864 = &C::xmm_to_xmm_mem(ctx, v1861);
18996
0
                                let v1865 = constructor_x64_cvtdq2ps(ctx, v1864);
18997
0
                                let v1866 = &C::xmi_imm(ctx, 0x1);
18998
0
                                let v1867 = constructor_x64_psrld(ctx, v1863, v1866);
18999
0
                                let v1868 = &C::xmm_to_xmm_mem(ctx, v1867);
19000
0
                                let v1869 = constructor_x64_cvtdq2ps(ctx, v1868);
19001
0
                                let v1870 = &C::xmm_to_xmm_mem(ctx, v1869);
19002
0
                                let v1871 = constructor_x64_addps(ctx, v1869, v1870);
19003
0
                                let v1872 = &C::xmm_to_xmm_mem(ctx, v1865);
19004
0
                                let v1873 = constructor_x64_addps(ctx, v1871, v1872);
19005
0
                                let v1874 = constructor_output_xmm(ctx, v1873);
19006
0
                                // Rule at src/isa/x64/lower.isle line 3455.
19007
0
                                return Some(v1874);
19008
                            }
19009
                            F64X2 => {
19010
0
                                let v1824 = C::def_inst(ctx, v381);
19011
0
                                if let Some(v1825) = v1824 {
19012
0
                                    let v1826 = &C::inst_data(ctx, v1825);
19013
                                    if let &InstructionData::Unary {
19014
0
                                        opcode: ref v1827,
19015
0
                                        arg: v1828,
19016
0
                                    } = v1826 {
19017
0
                                        if let &Opcode::UwidenLow = v1827 {
19018
0
                                            let v1829 = C::value_type(ctx, v1828);
19019
0
                                            if v1829 == I32X4 {
19020
0
                                                let v1846 = C::emit_u128_le_const(ctx, 0x4330000043300000);
19021
0
                                                let v1847 = &constructor_const_to_xmm_mem(ctx, v1846);
19022
0
                                                let v1848 = constructor_put_in_xmm(ctx, v1828);
19023
0
                                                let v1849 = constructor_x64_unpcklps(ctx, v1848, v1847);
19024
0
                                                let v1851 = C::emit_u128_le_const(ctx, 0x43300000000000004330000000000000);
19025
0
                                                let v1852 = &constructor_const_to_xmm_mem(ctx, v1851);
19026
0
                                                let v1853 = constructor_x64_subpd(ctx, v1849, v1852);
19027
0
                                                let v1854 = constructor_output_xmm(ctx, v1853);
19028
0
                                                // Rule at src/isa/x64/lower.isle line 3419.
19029
0
                                                return Some(v1854);
19030
0
                                            }
19031
0
                                        }
19032
0
                                    }
19033
0
                                }
19034
                            }
19035
0
                            _ => {}
19036
                        }
19037
0
                        let v640 = C::value_type(ctx, v381);
19038
0
                        if v640 == I64 {
19039
0
                            let v382 = constructor_put_in_gpr(ctx, v381);
19040
0
                            let v1843 = constructor_cvt_u64_to_float_seq(ctx, v3, v382);
19041
0
                            let v1844 = constructor_output_xmm(ctx, v1843);
19042
0
                            // Rule at src/isa/x64/lower.isle line 3412.
19043
0
                            return Some(v1844);
19044
0
                        }
19045
0
                    }
19046
                }
19047
                &Opcode::FcvtFromSint => {
19048
0
                    let v1 = C::first_result(ctx, arg0);
19049
0
                    if let Some(v2) = v1 {
19050
0
                        let v3 = C::value_type(ctx, v2);
19051
0
                        match v3 {
19052
                            F32 => {
19053
0
                                let v640 = C::value_type(ctx, v381);
19054
0
                                match v640 {
19055
                                    I8 => {
19056
0
                                        let v1314 = constructor_xmm_zero(ctx, F32X4);
19057
0
                                        let v1807 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Sign);
19058
0
                                        let v1808 = &C::gpr_to_gpr_mem(ctx, v1807);
19059
0
                                        let v1809 = constructor_x64_cvtsi2ss(ctx, I32, v1314, v1808);
19060
0
                                        let v1810 = constructor_output_xmm(ctx, v1809);
19061
0
                                        // Rule at src/isa/x64/lower.isle line 3380.
19062
0
                                        return Some(v1810);
19063
                                    }
19064
                                    I16 => {
19065
0
                                        let v1314 = constructor_xmm_zero(ctx, F32X4);
19066
0
                                        let v1807 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Sign);
19067
0
                                        let v1808 = &C::gpr_to_gpr_mem(ctx, v1807);
19068
0
                                        let v1809 = constructor_x64_cvtsi2ss(ctx, I32, v1314, v1808);
19069
0
                                        let v1810 = constructor_output_xmm(ctx, v1809);
19070
0
                                        // Rule at src/isa/x64/lower.isle line 3383.
19071
0
                                        return Some(v1810);
19072
                                    }
19073
0
                                    _ => {}
19074
0
                                }
19075
0
                                let v1811 = C::ty_int(ctx, v640);
19076
0
                                if let Some(v1812) = v1811 {
19077
0
                                    let v1813 = C::fits_in_64(ctx, v1812);
19078
0
                                    if let Some(v1814) = v1813 {
19079
0
                                        let v1314 = constructor_xmm_zero(ctx, F32X4);
19080
0
                                        let v1815 = &constructor_put_in_gpr_mem(ctx, v381);
19081
0
                                        let v1816 = constructor_x64_cvtsi2ss(ctx, v1814, v1314, v1815);
19082
0
                                        let v1817 = constructor_output_xmm(ctx, v1816);
19083
0
                                        // Rule at src/isa/x64/lower.isle line 3386.
19084
0
                                        return Some(v1817);
19085
0
                                    }
19086
0
                                }
19087
                            }
19088
                            F64 => {
19089
0
                                let v640 = C::value_type(ctx, v381);
19090
0
                                match v640 {
19091
                                    I8 => {
19092
0
                                        let v1319 = constructor_xmm_zero(ctx, F64X2);
19093
0
                                        let v1807 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Sign);
19094
0
                                        let v1808 = &C::gpr_to_gpr_mem(ctx, v1807);
19095
0
                                        let v1818 = constructor_x64_cvtsi2sd(ctx, I32, v1319, v1808);
19096
0
                                        let v1819 = constructor_output_xmm(ctx, v1818);
19097
0
                                        // Rule at src/isa/x64/lower.isle line 3389.
19098
0
                                        return Some(v1819);
19099
                                    }
19100
                                    I16 => {
19101
0
                                        let v1319 = constructor_xmm_zero(ctx, F64X2);
19102
0
                                        let v1807 = constructor_extend_to_gpr(ctx, v381, I32, &ExtendKind::Sign);
19103
0
                                        let v1808 = &C::gpr_to_gpr_mem(ctx, v1807);
19104
0
                                        let v1818 = constructor_x64_cvtsi2sd(ctx, I32, v1319, v1808);
19105
0
                                        let v1819 = constructor_output_xmm(ctx, v1818);
19106
0
                                        // Rule at src/isa/x64/lower.isle line 3392.
19107
0
                                        return Some(v1819);
19108
                                    }
19109
0
                                    _ => {}
19110
0
                                }
19111
0
                                let v1811 = C::ty_int(ctx, v640);
19112
0
                                if let Some(v1812) = v1811 {
19113
0
                                    let v1813 = C::fits_in_64(ctx, v1812);
19114
0
                                    if let Some(v1814) = v1813 {
19115
0
                                        let v1319 = constructor_xmm_zero(ctx, F64X2);
19116
0
                                        let v1815 = &constructor_put_in_gpr_mem(ctx, v381);
19117
0
                                        let v1820 = constructor_x64_cvtsi2sd(ctx, v1814, v1319, v1815);
19118
0
                                        let v1821 = constructor_output_xmm(ctx, v1820);
19119
0
                                        // Rule at src/isa/x64/lower.isle line 3395.
19120
0
                                        return Some(v1821);
19121
0
                                    }
19122
0
                                }
19123
                            }
19124
                            F64X2 => {
19125
0
                                let v1824 = C::def_inst(ctx, v381);
19126
0
                                if let Some(v1825) = v1824 {
19127
0
                                    let v1826 = &C::inst_data(ctx, v1825);
19128
                                    if let &InstructionData::Unary {
19129
0
                                        opcode: ref v1827,
19130
0
                                        arg: v1828,
19131
0
                                    } = v1826 {
19132
0
                                        if let &Opcode::SwidenLow = v1827 {
19133
0
                                            let v1829 = C::value_type(ctx, v1828);
19134
0
                                            if v1829 == I32X4 {
19135
0
                                                let v1830 = &C::put_in_xmm_mem(ctx, v1828);
19136
0
                                                let v1831 = constructor_x64_cvtdq2pd(ctx, v1830);
19137
0
                                                let v1832 = constructor_output_xmm(ctx, v1831);
19138
0
                                                // Rule at src/isa/x64/lower.isle line 3401.
19139
0
                                                return Some(v1832);
19140
0
                                            }
19141
0
                                        }
19142
0
                                    }
19143
0
                                }
19144
                            }
19145
0
                            _ => {}
19146
                        }
19147
0
                    }
19148
0
                    let v640 = C::value_type(ctx, v381);
19149
0
                    if v640 == I32X4 {
19150
0
                        let v526 = &C::put_in_xmm_mem(ctx, v381);
19151
0
                        let v1822 = constructor_x64_cvtdq2ps(ctx, v526);
19152
0
                        let v1823 = constructor_output_xmm(ctx, v1822);
19153
0
                        // Rule at src/isa/x64/lower.isle line 3398.
19154
0
                        return Some(v1823);
19155
0
                    }
19156
                }
19157
                &Opcode::Isplit => {
19158
0
                    let v640 = C::value_type(ctx, v381);
19159
0
                    if v640 == I128 {
19160
0
                        let v385 = C::put_in_regs(ctx, v381);
19161
0
                        let v2546 = C::value_regs_get(ctx, v385, 0x0);
19162
0
                        let v2547 = C::value_regs_get(ctx, v385, 0x1);
19163
0
                        let v2548 = C::value_reg(ctx, v2546);
19164
0
                        let v2549 = C::value_reg(ctx, v2547);
19165
0
                        let v2550 = C::output_pair(ctx, v2548, v2549);
19166
0
                        // Rule at src/isa/x64/lower.isle line 4634.
19167
0
                        return Some(v2550);
19168
0
                    }
19169
                }
19170
0
                _ => {}
19171
            }
19172
        }
19173
        &InstructionData::UnaryConst {
19174
0
            opcode: ref v2256,
19175
0
            constant_handle: v2257,
19176
0
        } => {
19177
0
            if let &Opcode::Vconst = v2256 {
19178
0
                let v1 = C::first_result(ctx, arg0);
19179
0
                if let Some(v2) = v1 {
19180
0
                    let v2258 = C::const_to_vconst(ctx, v2257);
19181
0
                    let v3 = C::value_type(ctx, v2);
19182
0
                    let v2259 = constructor_x64_xmm_load_const(ctx, v3, v2258);
19183
0
                    let v2260 = constructor_output_xmm(ctx, v2259);
19184
0
                    // Rule at src/isa/x64/lower.isle line 4204.
19185
0
                    return Some(v2260);
19186
0
                }
19187
0
            }
19188
        }
19189
        &InstructionData::UnaryGlobalValue {
19190
0
            opcode: ref v1703,
19191
0
            global_value: v1704,
19192
0
        } => {
19193
0
            match v1703 {
19194
                &Opcode::SymbolValue => {
19195
0
                    let v1705 = C::symbol_value_data(ctx, v1704);
19196
0
                    if let Some(v1706) = v1705 {
19197
0
                        let v1710 = constructor_load_ext_name(ctx, v1706.0, v1706.2, v1706.1);
19198
0
                        let v1711 = constructor_output_reg(ctx, v1710);
19199
0
                        // Rule at src/isa/x64/lower.isle line 3208.
19200
0
                        return Some(v1711);
19201
0
                    }
19202
                }
19203
                &Opcode::TlsValue => {
19204
0
                    let v1 = C::first_result(ctx, arg0);
19205
0
                    if let Some(v2) = v1 {
19206
0
                        let v1705 = C::symbol_value_data(ctx, v1704);
19207
0
                        if let Some(v1706) = v1705 {
19208
0
                            let v3 = C::value_type(ctx, v2);
19209
0
                            let v2551 = &C::tls_model(ctx, v3);
19210
0
                            match v2551 {
19211
                                &TlsModel::ElfGd => {
19212
0
                                    let v2552 = constructor_elf_tls_get_addr(ctx, v1706.0);
19213
0
                                    let v2553 = constructor_output_gpr(ctx, v2552);
19214
0
                                    // Rule at src/isa/x64/lower.isle line 4642.
19215
0
                                    return Some(v2553);
19216
                                }
19217
                                &TlsModel::Macho => {
19218
0
                                    let v2554 = constructor_macho_tls_get_addr(ctx, v1706.0);
19219
0
                                    let v2555 = constructor_output_gpr(ctx, v2554);
19220
0
                                    // Rule at src/isa/x64/lower.isle line 4645.
19221
0
                                    return Some(v2555);
19222
                                }
19223
                                &TlsModel::Coff => {
19224
0
                                    let v2556 = constructor_coff_tls_get_addr(ctx, v1706.0);
19225
0
                                    let v2557 = constructor_output_gpr(ctx, v2556);
19226
0
                                    // Rule at src/isa/x64/lower.isle line 4648.
19227
0
                                    return Some(v2557);
19228
                                }
19229
0
                                _ => {}
19230
                            }
19231
0
                        }
19232
0
                    }
19233
                }
19234
0
                _ => {}
19235
            }
19236
        }
19237
        &InstructionData::UnaryIeee32 {
19238
0
            opcode: ref v18,
19239
0
            imm: v19,
19240
0
        } => {
19241
0
            if let &Opcode::F32const = v18 {
19242
0
                let v20 = C::u32_from_ieee32(ctx, v19);
19243
0
                let v22 = C::u32_as_u64(ctx, v20);
19244
0
                let v23 = constructor_imm(ctx, F32, v22);
19245
0
                let v24 = constructor_output_reg(ctx, v23);
19246
0
                // Rule at src/isa/x64/lower.isle line 27.
19247
0
                return Some(v24);
19248
0
            }
19249
        }
19250
        &InstructionData::UnaryIeee64 {
19251
0
            opcode: ref v25,
19252
0
            imm: v26,
19253
0
        } => {
19254
0
            if let &Opcode::F64const = v25 {
19255
0
                let v27 = C::u64_from_ieee64(ctx, v26);
19256
0
                let v29 = constructor_imm(ctx, F64, v27);
19257
0
                let v30 = constructor_output_reg(ctx, v29);
19258
0
                // Rule at src/isa/x64/lower.isle line 32.
19259
0
                return Some(v30);
19260
0
            }
19261
        }
19262
        &InstructionData::UnaryImm {
19263
674k
            opcode: ref v7,
19264
674k
            imm: v8,
19265
674k
        } => {
19266
674k
            if let &Opcode::Iconst = v7 {
19267
674k
                let v1 = C::first_result(ctx, arg0);
19268
674k
                if let Some(v2) = v1 {
19269
674k
                    let v3 = C::value_type(ctx, v2);
19270
674k
                    if v3 == I128 {
19271
0
                        let v9 = C::u64_from_imm64(ctx, v8);
19272
0
                        let v13 = constructor_imm(ctx, I64, v9);
19273
0
                        let v15 = constructor_imm(ctx, I64, 0x0);
19274
0
                        let v16 = C::value_regs(ctx, v13, v15);
19275
0
                        let v17 = C::output(ctx, v16);
19276
0
                        // Rule at src/isa/x64/lower.isle line 20.
19277
0
                        return Some(v17);
19278
674k
                    }
19279
674k
                    let v4 = C::fits_in_64(ctx, v3);
19280
674k
                    if let Some(v5) = v4 {
19281
674k
                        let v9 = C::u64_from_imm64(ctx, v8);
19282
674k
                        let v10 = constructor_imm(ctx, v5, v9);
19283
674k
                        let v11 = constructor_output_reg(ctx, v10);
19284
674k
                        // Rule at src/isa/x64/lower.isle line 15.
19285
674k
                        return Some(v11);
19286
0
                    }
19287
0
                }
19288
0
            }
19289
        }
19290
0
        _ => {}
19291
    }
19292
0
    None
19293
5.47M
}
19294
19295
// Generated as internal constructor for term lower_branch.
19296
728k
pub fn constructor_lower_branch<C: Context>(
19297
728k
    ctx: &mut C,
19298
728k
    arg0: Inst,
19299
728k
    arg1: &MachLabelSlice,
19300
728k
) -> Option<Unit> {
19301
728k
    let v1 = &C::inst_data(ctx, arg0);
19302
728k
    match v1 {
19303
        &InstructionData::BranchTable {
19304
15.0k
            opcode: ref v55,
19305
15.0k
            arg: v56,
19306
15.0k
            table: v57,
19307
15.0k
        } => {
19308
15.0k
            if let &Opcode::BrTable = v55 {
19309
15.0k
                let v59 = C::jump_table_targets(ctx, arg1);
19310
15.0k
                if let Some(v60) = v59 {
19311
15.0k
                    let v58 = C::value_type(ctx, v56);
19312
15.0k
                    let v63 = &C::raw_operand_size_of_type(ctx, v58);
19313
15.0k
                    let v64 = C::jump_table_size(ctx, &v60.1);
19314
15.0k
                    let v65 = C::u32_as_u64(ctx, v64);
19315
15.0k
                    let v66 = constructor_imm(ctx, v58, v65);
19316
15.0k
                    let v69 = constructor_extend_to_gpr(ctx, v56, I64, &ExtendKind::Zero);
19317
15.0k
                    let v70 = &constructor_reg_to_gpr_mem_imm(ctx, v66);
19318
15.0k
                    let v71 = &constructor_x64_cmp(ctx, v63, v70, v69);
19319
15.0k
                    let v73 = &C::gpr_to_gpr_mem(ctx, v69);
19320
15.0k
                    let v74 = C::gpr_new(ctx, v66);
19321
15.0k
                    let v75 = &constructor_cmove(ctx, v58, &CC::B, v73, v74);
19322
15.0k
                    let v76 = constructor_with_flags_reg(ctx, v71, v75);
19323
15.0k
                    let v77 = C::gpr_new(ctx, v76);
19324
15.0k
                    let v78 = &constructor_jmp_table_seq(ctx, v58, v77, v60.0, &v60.1);
19325
15.0k
                    let v79 = constructor_emit_side_effect(ctx, v78);
19326
15.0k
                    // Rule at src/isa/x64/lower.isle line 3337.
19327
15.0k
                    return Some(v79);
19328
0
                }
19329
0
            }
19330
        }
19331
        &InstructionData::Brif {
19332
406k
            opcode: ref v9,
19333
406k
            arg: v10,
19334
406k
            blocks: ref v11,
19335
406k
        } => {
19336
406k
            if let &Opcode::Brif = v9 {
19337
406k
                let v26 = C::two_targets(ctx, arg1);
19338
406k
                if let Some(v27) = v26 {
19339
406k
                    let v12 = C::maybe_uextend(ctx, v10);
19340
406k
                    if let Some(v13) = v12 {
19341
406k
                        let v14 = C::def_inst(ctx, v13);
19342
406k
                        if let Some(
v15373k
) = v14 {
19343
373k
                            let v16 = &C::inst_data(ctx, v15);
19344
373k
                            match v16 {
19345
                                &InstructionData::FloatCompare {
19346
0
                                    opcode: ref v33,
19347
0
                                    args: ref v34,
19348
0
                                    cond: ref v35,
19349
0
                                } => {
19350
0
                                    if let &Opcode::Fcmp = v33 {
19351
0
                                        let v36 = C::unpack_value_array_2(ctx, v34);
19352
0
                                        let v39 = &constructor_emit_fcmp(ctx, v35, v36.0, v36.1);
19353
0
                                        let v40 = &constructor_jmp_cond_fcmp(ctx, v39, v27.0, v27.1);
19354
0
                                        let v41 = constructor_emit_side_effect(ctx, v40);
19355
0
                                        // Rule at src/isa/x64/lower.isle line 3298.
19356
0
                                        return Some(v41);
19357
0
                                    }
19358
                                }
19359
                                &InstructionData::IntCompare {
19360
303k
                                    opcode: ref v17,
19361
303k
                                    args: ref v18,
19362
303k
                                    cond: ref v19,
19363
303k
                                } => {
19364
303k
                                    if let &Opcode::Icmp = v17 {
19365
303k
                                        let v20 = C::unpack_value_array_2(ctx, v18);
19366
303k
                                        let v30 = &constructor_emit_cmp(ctx, v19, v20.0, v20.1);
19367
303k
                                        let v31 = &constructor_jmp_cond_icmp(ctx, v30, v27.0, v27.1);
19368
303k
                                        let v32 = constructor_emit_side_effect(ctx, v31);
19369
303k
                                        // Rule at src/isa/x64/lower.isle line 3295.
19370
303k
                                        return Some(v32);
19371
0
                                    }
19372
                                }
19373
70.0k
                                _ => {}
19374
                            }
19375
33.0k
                        }
19376
0
                    }
19377
103k
                    let v42 = C::value_type(ctx, v10);
19378
103k
                    if v42 == I128 {
19379
0
                        let v44 = C::put_in_regs(ctx, v10);
19380
0
                        let v45 = &constructor_cmp_zero_i128(ctx, &CC::Z, v44);
19381
0
                        let v46 = &constructor_jmp_cond_icmp(ctx, v45, v27.0, v27.1);
19382
0
                        let v47 = constructor_emit_side_effect(ctx, v46);
19383
0
                        // Rule at src/isa/x64/lower.isle line 3301.
19384
0
                        return Some(v47);
19385
103k
                    }
19386
103k
                    let v48 = C::ty_int_bool_or_ref(ctx, v42);
19387
103k
                    if let Some(v49) = v48 {
19388
103k
                        let v50 = &constructor_cmp_zero_int_bool_ref(ctx, v10);
19389
103k
                        let v52 = &constructor_jmp_cond(ctx, &CC::NZ, v27.0, v27.1);
19390
103k
                        let v53 = &constructor_with_flags_side_effect(ctx, v50, v52);
19391
103k
                        let v54 = constructor_emit_side_effect(ctx, v53);
19392
103k
                        // Rule at src/isa/x64/lower.isle line 3305.
19393
103k
                        return Some(v54);
19394
0
                    }
19395
0
                }
19396
0
            }
19397
        }
19398
        &InstructionData::Jump {
19399
306k
            opcode: ref v2,
19400
306k
            destination: v3,
19401
306k
        } => {
19402
306k
            if let &Opcode::Jump = v2 {
19403
306k
                let v5 = C::single_target(ctx, arg1);
19404
306k
                if let Some(v6) = v5 {
19405
306k
                    let v7 = &constructor_jmp_known(ctx, v6);
19406
306k
                    let v8 = constructor_emit_side_effect(ctx, v7);
19407
306k
                    // Rule at src/isa/x64/lower.isle line 3290.
19408
306k
                    return Some(v8);
19409
0
                }
19410
0
            }
19411
        }
19412
0
        _ => {}
19413
    }
19414
0
    None
19415
728k
}
19416
19417
// Generated as internal constructor for term construct_overflow_op.
19418
0
pub fn constructor_construct_overflow_op<C: Context>(
19419
0
    ctx: &mut C,
19420
0
    arg0: &CC,
19421
0
    arg1: &ProducesFlags,
19422
0
) -> InstOutput {
19423
0
    let v2 = &constructor_x64_setcc_paired(ctx, arg0);
19424
0
    let v3 = constructor_with_flags(ctx, arg1, v2);
19425
0
    let v5 = C::value_regs_get(ctx, v3, 0x0);
19426
0
    let v6 = C::value_reg(ctx, v5);
19427
0
    let v8 = C::value_regs_get(ctx, v3, 0x1);
19428
0
    let v9 = C::value_reg(ctx, v8);
19429
0
    let v10 = C::output_pair(ctx, v6, v9);
19430
0
    // Rule at src/isa/x64/lower.isle line 104.
19431
0
    return v10;
19432
0
}
19433
19434
// Generated as internal constructor for term construct_overflow_op_alu.
19435
0
pub fn constructor_construct_overflow_op_alu<C: Context>(
19436
0
    ctx: &mut C,
19437
0
    arg0: Type,
19438
0
    arg1: &CC,
19439
0
    arg2: &AluRmiROpcode,
19440
0
    arg3: Gpr,
19441
0
    arg4: &GprMemImm,
19442
0
) -> InstOutput {
19443
0
    let v5 = &constructor_x64_alurmi_with_flags_paired(ctx, arg2, arg0, arg3, arg4);
19444
0
    let v6 = constructor_construct_overflow_op(ctx, arg1, v5);
19445
0
    // Rule at src/isa/x64/lower.isle line 111.
19446
0
    return v6;
19447
0
}
19448
19449
// Generated as internal constructor for term construct_overflow_op_alu_128.
19450
0
pub fn constructor_construct_overflow_op_alu_128<C: Context>(
19451
0
    ctx: &mut C,
19452
0
    arg0: &CC,
19453
0
    arg1: &AluRmiROpcode,
19454
0
    arg2: &AluRmiROpcode,
19455
0
    arg3: Value,
19456
0
    arg4: Value,
19457
0
) -> InstOutput {
19458
0
    let v5 = C::put_in_regs(ctx, arg3);
19459
0
    let v7 = constructor_value_regs_get_gpr(ctx, v5, 0x0);
19460
0
    let v9 = constructor_value_regs_get_gpr(ctx, v5, 0x1);
19461
0
    let v10 = C::put_in_regs(ctx, arg4);
19462
0
    let v11 = constructor_value_regs_get_gpr(ctx, v10, 0x0);
19463
0
    let v12 = constructor_value_regs_get_gpr(ctx, v10, 0x1);
19464
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, v11);
19465
0
    let v15 = &constructor_x64_alurmi_with_flags_paired(ctx, arg1, I64, v7, v14);
19466
0
    let v16 = &C::gpr_to_gpr_mem_imm(ctx, v12);
19467
0
    let v17 = &constructor_x64_alurmi_with_flags_chained(ctx, arg2, I64, v9, v16);
19468
0
    let v18 = &constructor_x64_setcc_paired(ctx, arg0);
19469
0
    let v19 = &constructor_with_flags_chained(ctx, v15, v17, v18);
19470
0
    let v20 = constructor_multi_reg_to_pair_and_single(ctx, v19);
19471
0
    // Rule at src/isa/x64/lower.isle line 119.
19472
0
    return v20;
19473
0
}
19474
19475
// Generated as internal constructor for term sse_and.
19476
0
pub fn constructor_sse_and<C: Context>(
19477
0
    ctx: &mut C,
19478
0
    arg0: Type,
19479
0
    arg1: Xmm,
19480
0
    arg2: &XmmMem,
19481
0
) -> Xmm {
19482
0
    match arg0 {
19483
        F32 => {
19484
0
            let v3 = constructor_x64_andps(ctx, arg1, arg2);
19485
0
            // Rule at src/isa/x64/lower.isle line 293.
19486
0
            return v3;
19487
        }
19488
        F64 => {
19489
0
            let v4 = constructor_x64_andpd(ctx, arg1, arg2);
19490
0
            // Rule at src/isa/x64/lower.isle line 294.
19491
0
            return v4;
19492
        }
19493
        F32X4 => {
19494
0
            let v3 = constructor_x64_andps(ctx, arg1, arg2);
19495
0
            // Rule at src/isa/x64/lower.isle line 291.
19496
0
            return v3;
19497
        }
19498
        F64X2 => {
19499
0
            let v4 = constructor_x64_andpd(ctx, arg1, arg2);
19500
0
            // Rule at src/isa/x64/lower.isle line 292.
19501
0
            return v4;
19502
        }
19503
0
        _ => {}
19504
0
    }
19505
0
    let v5 = C::multi_lane(ctx, arg0);
19506
0
    if let Some(v6) = v5 {
19507
0
        let v9 = constructor_x64_pand(ctx, arg1, arg2);
19508
0
        // Rule at src/isa/x64/lower.isle line 295.
19509
0
        return v9;
19510
0
    }
19511
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "sse_and", "src/isa/x64/lower.isle line 290")
19512
0
}
19513
19514
// Generated as internal constructor for term and_i128.
19515
0
pub fn constructor_and_i128<C: Context>(
19516
0
    ctx: &mut C,
19517
0
    arg0: ValueRegs,
19518
0
    arg1: ValueRegs,
19519
0
) -> ValueRegs {
19520
0
    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
19521
0
    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
19522
0
    let v6 = constructor_value_regs_get_gpr(ctx, arg1, 0x0);
19523
0
    let v7 = constructor_value_regs_get_gpr(ctx, arg1, 0x1);
19524
0
    let v9 = &C::gpr_to_gpr_mem_imm(ctx, v6);
19525
0
    let v10 = constructor_x64_and(ctx, I64, v3, v9);
19526
0
    let v11 = &C::gpr_to_gpr_mem_imm(ctx, v7);
19527
0
    let v12 = constructor_x64_and(ctx, I64, v5, v11);
19528
0
    let v13 = constructor_value_gprs(ctx, v10, v12);
19529
0
    // Rule at src/isa/x64/lower.isle line 304.
19530
0
    return v13;
19531
0
}
19532
19533
// Generated as internal constructor for term sse_and_not.
19534
0
pub fn constructor_sse_and_not<C: Context>(
19535
0
    ctx: &mut C,
19536
0
    arg0: Type,
19537
0
    arg1: Xmm,
19538
0
    arg2: &XmmMem,
19539
0
) -> Xmm {
19540
0
    match arg0 {
19541
        F32X4 => {
19542
0
            let v3 = constructor_x64_andnps(ctx, arg1, arg2);
19543
0
            // Rule at src/isa/x64/lower.isle line 322.
19544
0
            return v3;
19545
        }
19546
        F64X2 => {
19547
0
            let v4 = constructor_x64_andnpd(ctx, arg1, arg2);
19548
0
            // Rule at src/isa/x64/lower.isle line 323.
19549
0
            return v4;
19550
        }
19551
0
        _ => {}
19552
0
    }
19553
0
    let v5 = C::multi_lane(ctx, arg0);
19554
0
    if let Some(v6) = v5 {
19555
0
        let v9 = constructor_x64_pandn(ctx, arg1, arg2);
19556
0
        // Rule at src/isa/x64/lower.isle line 324.
19557
0
        return v9;
19558
0
    }
19559
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "sse_and_not", "src/isa/x64/lower.isle line 321")
19560
0
}
19561
19562
// Generated as internal constructor for term val_minus_one.
19563
135k
pub fn constructor_val_minus_one<C: Context>(
19564
135k
    ctx: &mut C,
19565
135k
    arg0: Value,
19566
135k
) -> Option<Value> {
19567
135k
    let v1 = C::def_inst(ctx, arg0);
19568
135k
    if let Some(
v2128k
) = v1 {
19569
128k
        let v3 = &C::inst_data(ctx, v2);
19570
        if let &InstructionData::Binary {
19571
15.3k
            opcode: ref v4,
19572
15.3k
            args: ref v5,
19573
128k
        } = v3 {
19574
15.3k
            match v4 {
19575
                &Opcode::Iadd => {
19576
4.24k
                    let v6 = C::unpack_value_array_2(ctx, v5);
19577
4.24k
                    let v17 = C::i64_from_iconst(ctx, v6.0);
19578
4.24k
                    if let Some(
v180
) = v17 {
19579
0
                        if v18 == -0x1 {
19580
                            // Rule at src/isa/x64/lower.isle line 353.
19581
0
                            return Some(v6.1);
19582
0
                        }
19583
4.24k
                    }
19584
4.24k
                    let v15 = C::i64_from_iconst(ctx, v6.1);
19585
4.24k
                    if let Some(
v162.96k
) = v15 {
19586
2.96k
                        if v16 == -0x1 {
19587
                            // Rule at src/isa/x64/lower.isle line 352.
19588
1.26k
                            return Some(v6.0);
19589
1.70k
                        }
19590
1.28k
                    }
19591
                }
19592
                &Opcode::Isub => {
19593
4.12k
                    let v6 = C::unpack_value_array_2(ctx, v5);
19594
4.12k
                    let v9 = C::def_inst(ctx, v6.1);
19595
4.12k
                    if let Some(
v103.89k
) = v9 {
19596
3.89k
                        let v11 = &C::inst_data(ctx, v10);
19597
                        if let &InstructionData::UnaryImm {
19598
3.28k
                            opcode: ref v12,
19599
3.28k
                            imm: v13,
19600
3.89k
                        } = v11 {
19601
3.28k
                            if let &Opcode::Iconst = v12 {
19602
3.28k
                                let v14 = C::u64_from_imm64(ctx, v13);
19603
3.28k
                                if v14 == 0x1 {
19604
                                    // Rule at src/isa/x64/lower.isle line 351.
19605
0
                                    return Some(v6.0);
19606
3.28k
                                }
19607
0
                            }
19608
603
                        }
19609
234
                    }
19610
                }
19611
6.95k
                _ => {}
19612
            }
19613
113k
        }
19614
6.92k
    }
19615
134k
    None
19616
135k
}
19617
19618
// Generated as internal constructor for term sse_or.
19619
0
pub fn constructor_sse_or<C: Context>(
19620
0
    ctx: &mut C,
19621
0
    arg0: Type,
19622
0
    arg1: Xmm,
19623
0
    arg2: &XmmMem,
19624
0
) -> Xmm {
19625
0
    match arg0 {
19626
        F32 => {
19627
0
            let v3 = constructor_x64_orps(ctx, arg1, arg2);
19628
0
            // Rule at src/isa/x64/lower.isle line 417.
19629
0
            return v3;
19630
        }
19631
        F64 => {
19632
0
            let v4 = constructor_x64_orpd(ctx, arg1, arg2);
19633
0
            // Rule at src/isa/x64/lower.isle line 418.
19634
0
            return v4;
19635
        }
19636
        F32X4 => {
19637
0
            let v3 = constructor_x64_orps(ctx, arg1, arg2);
19638
0
            // Rule at src/isa/x64/lower.isle line 415.
19639
0
            return v3;
19640
        }
19641
        F64X2 => {
19642
0
            let v4 = constructor_x64_orpd(ctx, arg1, arg2);
19643
0
            // Rule at src/isa/x64/lower.isle line 416.
19644
0
            return v4;
19645
        }
19646
0
        _ => {}
19647
0
    }
19648
0
    let v5 = C::multi_lane(ctx, arg0);
19649
0
    if let Some(v6) = v5 {
19650
0
        let v9 = constructor_x64_por(ctx, arg1, arg2);
19651
0
        // Rule at src/isa/x64/lower.isle line 419.
19652
0
        return v9;
19653
0
    }
19654
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "sse_or", "src/isa/x64/lower.isle line 414")
19655
0
}
19656
19657
// Generated as internal constructor for term or_i128.
19658
0
pub fn constructor_or_i128<C: Context>(
19659
0
    ctx: &mut C,
19660
0
    arg0: ValueRegs,
19661
0
    arg1: ValueRegs,
19662
0
) -> ValueRegs {
19663
0
    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
19664
0
    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
19665
0
    let v6 = constructor_value_regs_get_gpr(ctx, arg1, 0x0);
19666
0
    let v7 = constructor_value_regs_get_gpr(ctx, arg1, 0x1);
19667
0
    let v9 = &C::gpr_to_gpr_mem_imm(ctx, v6);
19668
0
    let v10 = constructor_x64_or(ctx, I64, v3, v9);
19669
0
    let v11 = &C::gpr_to_gpr_mem_imm(ctx, v7);
19670
0
    let v12 = constructor_x64_or(ctx, I64, v5, v11);
19671
0
    let v13 = constructor_value_gprs(ctx, v10, v12);
19672
0
    // Rule at src/isa/x64/lower.isle line 428.
19673
0
    return v13;
19674
0
}
19675
19676
// Generated as internal constructor for term shl_i128.
19677
0
pub fn constructor_shl_i128<C: Context>(
19678
0
    ctx: &mut C,
19679
0
    arg0: ValueRegs,
19680
0
    arg1: Gpr,
19681
0
) -> ValueRegs {
19682
0
    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
19683
0
    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
19684
0
    let v7 = &C::gpr_to_imm8_gpr(ctx, arg1);
19685
0
    let v8 = constructor_x64_shl(ctx, I64, v3, v7);
19686
0
    let v9 = &C::gpr_to_imm8_gpr(ctx, arg1);
19687
0
    let v10 = constructor_x64_shl(ctx, I64, v5, v9);
19688
0
    let v12 = constructor_imm(ctx, I64, 0x40);
19689
0
    let v13 = C::gpr_new(ctx, v12);
19690
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, arg1);
19691
0
    let v15 = constructor_x64_sub(ctx, I64, v13, v14);
19692
0
    let v16 = &C::gpr_to_imm8_gpr(ctx, v15);
19693
0
    let v17 = constructor_x64_shr(ctx, I64, v3, v16);
19694
0
    let v19 = constructor_imm(ctx, I64, 0x0);
19695
0
    let v20 = C::gpr_new(ctx, v19);
19696
0
    let v23 = RegMemImm::Imm {
19697
0
        simm32: 0x7F,
19698
0
    };
19699
0
    let v24 = &C::gpr_mem_imm_new(ctx, &v23);
19700
0
    let v25 = &constructor_x64_test(ctx, &OperandSize::Size64, v24, arg1);
19701
0
    let v27 = &C::gpr_to_gpr_mem(ctx, v20);
19702
0
    let v28 = &constructor_cmove(ctx, I64, &CC::Z, v27, v17);
19703
0
    let v29 = constructor_with_flags_reg(ctx, v25, v28);
19704
0
    let v30 = C::gpr_new(ctx, v29);
19705
0
    let v31 = &C::gpr_to_gpr_mem_imm(ctx, v10);
19706
0
    let v32 = constructor_x64_or(ctx, I64, v30, v31);
19707
0
    let v34 = RegMemImm::Imm {
19708
0
        simm32: 0x40,
19709
0
    };
19710
0
    let v35 = &C::gpr_mem_imm_new(ctx, &v34);
19711
0
    let v36 = &constructor_x64_test(ctx, &OperandSize::Size64, v35, arg1);
19712
0
    let v37 = &C::gpr_to_gpr_mem(ctx, v8);
19713
0
    let v38 = &constructor_cmove(ctx, I64, &CC::Z, v37, v20);
19714
0
    let v39 = &C::gpr_to_gpr_mem(ctx, v32);
19715
0
    let v40 = &constructor_cmove(ctx, I64, &CC::Z, v39, v8);
19716
0
    let v41 = &constructor_consumes_flags_concat(ctx, v38, v40);
19717
0
    let v42 = constructor_with_flags(ctx, v36, v41);
19718
0
    // Rule at src/isa/x64/lower.isle line 502.
19719
0
    return v42;
19720
0
}
19721
19722
// Generated as internal constructor for term ishl_i8x16_mask.
19723
0
pub fn constructor_ishl_i8x16_mask<C: Context>(
19724
0
    ctx: &mut C,
19725
0
    arg0: &RegMemImm,
19726
0
) -> SyntheticAmode {
19727
0
    match arg0 {
19728
        &RegMemImm::Reg {
19729
0
            reg: v3,
19730
0
        } => {
19731
0
            let v4 = &C::ishl_i8x16_mask_table(ctx);
19732
0
            let v6 = constructor_x64_lea(ctx, I64, v4);
19733
0
            let v7 = C::gpr_new(ctx, v3);
19734
0
            let v9 = &C::imm8_to_imm8_gpr(ctx, 0x4);
19735
0
            let v10 = constructor_x64_shl(ctx, I64, v7, v9);
19736
0
            let v13 = C::mem_flags_trusted(ctx);
19737
0
            let v14 = Amode::ImmRegRegShift {
19738
0
                simm32: 0x0,
19739
0
                base: v6,
19740
0
                index: v10,
19741
0
                shift: 0x0,
19742
0
                flags: v13,
19743
0
            };
19744
0
            let v15 = &C::amode_to_synthetic_amode(ctx, &v14);
19745
0
            // Rule at src/isa/x64/lower.isle line 576.
19746
0
            return v15.clone();
19747
        }
19748
        &RegMemImm::Mem {
19749
0
            addr: ref v16,
19750
0
        } => {
19751
0
            let v18 = constructor_x64_load(ctx, I64, v16, &ExtKind::None);
19752
0
            let v19 = RegMemImm::Reg {
19753
0
                reg: v18,
19754
0
            };
19755
0
            let v20 = &constructor_ishl_i8x16_mask(ctx, &v19);
19756
0
            // Rule at src/isa/x64/lower.isle line 587.
19757
0
            return v20.clone();
19758
        }
19759
        &RegMemImm::Imm {
19760
0
            simm32: v1,
19761
0
        } => {
19762
0
            let v2 = &C::ishl_i8x16_mask_for_const(ctx, v1);
19763
0
            // Rule at src/isa/x64/lower.isle line 567.
19764
0
            return v2.clone();
19765
        }
19766
0
        _ => {}
19767
0
    }
19768
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "ishl_i8x16_mask", "src/isa/x64/lower.isle line 561")
19769
0
}
19770
19771
// Generated as internal constructor for term shr_i128.
19772
0
pub fn constructor_shr_i128<C: Context>(
19773
0
    ctx: &mut C,
19774
0
    arg0: ValueRegs,
19775
0
    arg1: Gpr,
19776
0
) -> ValueRegs {
19777
0
    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
19778
0
    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
19779
0
    let v7 = &C::gpr_to_imm8_gpr(ctx, arg1);
19780
0
    let v8 = constructor_x64_shr(ctx, I64, v3, v7);
19781
0
    let v9 = &C::gpr_to_imm8_gpr(ctx, arg1);
19782
0
    let v10 = constructor_x64_shr(ctx, I64, v5, v9);
19783
0
    let v12 = constructor_imm(ctx, I64, 0x40);
19784
0
    let v13 = C::gpr_new(ctx, v12);
19785
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, arg1);
19786
0
    let v15 = constructor_x64_sub(ctx, I64, v13, v14);
19787
0
    let v16 = &C::gpr_to_imm8_gpr(ctx, v15);
19788
0
    let v17 = constructor_x64_shl(ctx, I64, v5, v16);
19789
0
    let v19 = constructor_imm(ctx, I64, 0x0);
19790
0
    let v20 = C::gpr_new(ctx, v19);
19791
0
    let v23 = RegMemImm::Imm {
19792
0
        simm32: 0x7F,
19793
0
    };
19794
0
    let v24 = &C::gpr_mem_imm_new(ctx, &v23);
19795
0
    let v25 = &constructor_x64_test(ctx, &OperandSize::Size64, v24, arg1);
19796
0
    let v27 = &C::gpr_to_gpr_mem(ctx, v20);
19797
0
    let v28 = &constructor_cmove(ctx, I64, &CC::Z, v27, v17);
19798
0
    let v29 = constructor_with_flags_reg(ctx, v25, v28);
19799
0
    let v30 = C::gpr_new(ctx, v29);
19800
0
    let v31 = &C::gpr_to_gpr_mem_imm(ctx, v8);
19801
0
    let v32 = constructor_x64_or(ctx, I64, v30, v31);
19802
0
    let v34 = RegMemImm::Imm {
19803
0
        simm32: 0x40,
19804
0
    };
19805
0
    let v35 = &C::gpr_mem_imm_new(ctx, &v34);
19806
0
    let v36 = &constructor_x64_test(ctx, &OperandSize::Size64, v35, arg1);
19807
0
    let v37 = &C::gpr_to_gpr_mem(ctx, v32);
19808
0
    let v38 = &constructor_cmove(ctx, I64, &CC::Z, v37, v10);
19809
0
    let v39 = &C::gpr_to_gpr_mem(ctx, v10);
19810
0
    let v40 = &constructor_cmove(ctx, I64, &CC::Z, v39, v20);
19811
0
    let v41 = &constructor_consumes_flags_concat(ctx, v38, v40);
19812
0
    let v42 = constructor_with_flags(ctx, v36, v41);
19813
0
    // Rule at src/isa/x64/lower.isle line 612.
19814
0
    return v42;
19815
0
}
19816
19817
// Generated as internal constructor for term ushr_i8x16_mask.
19818
0
pub fn constructor_ushr_i8x16_mask<C: Context>(
19819
0
    ctx: &mut C,
19820
0
    arg0: &RegMemImm,
19821
0
) -> SyntheticAmode {
19822
0
    match arg0 {
19823
        &RegMemImm::Reg {
19824
0
            reg: v3,
19825
0
        } => {
19826
0
            let v4 = &C::ushr_i8x16_mask_table(ctx);
19827
0
            let v6 = constructor_x64_lea(ctx, I64, v4);
19828
0
            let v7 = C::gpr_new(ctx, v3);
19829
0
            let v9 = &C::imm8_to_imm8_gpr(ctx, 0x4);
19830
0
            let v10 = constructor_x64_shl(ctx, I64, v7, v9);
19831
0
            let v13 = C::mem_flags_trusted(ctx);
19832
0
            let v14 = Amode::ImmRegRegShift {
19833
0
                simm32: 0x0,
19834
0
                base: v6,
19835
0
                index: v10,
19836
0
                shift: 0x0,
19837
0
                flags: v13,
19838
0
            };
19839
0
            let v15 = &C::amode_to_synthetic_amode(ctx, &v14);
19840
0
            // Rule at src/isa/x64/lower.isle line 681.
19841
0
            return v15.clone();
19842
        }
19843
        &RegMemImm::Mem {
19844
0
            addr: ref v16,
19845
0
        } => {
19846
0
            let v18 = constructor_x64_load(ctx, I64, v16, &ExtKind::None);
19847
0
            let v19 = RegMemImm::Reg {
19848
0
                reg: v18,
19849
0
            };
19850
0
            let v20 = &constructor_ushr_i8x16_mask(ctx, &v19);
19851
0
            // Rule at src/isa/x64/lower.isle line 693.
19852
0
            return v20.clone();
19853
        }
19854
        &RegMemImm::Imm {
19855
0
            simm32: v1,
19856
0
        } => {
19857
0
            let v2 = &C::ushr_i8x16_mask_for_const(ctx, v1);
19858
0
            // Rule at src/isa/x64/lower.isle line 672.
19859
0
            return v2.clone();
19860
        }
19861
0
        _ => {}
19862
0
    }
19863
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "ushr_i8x16_mask", "src/isa/x64/lower.isle line 666")
19864
0
}
19865
19866
// Generated as internal constructor for term mask_xmm_shift.
19867
0
pub fn constructor_mask_xmm_shift<C: Context>(
19868
0
    ctx: &mut C,
19869
0
    arg0: Type,
19870
0
    arg1: Value,
19871
0
) -> RegMemImm {
19872
0
    let v11 = C::def_inst(ctx, arg1);
19873
0
    if let Some(v12) = v11 {
19874
0
        let v13 = &C::inst_data(ctx, v12);
19875
        if let &InstructionData::UnaryImm {
19876
0
            opcode: ref v14,
19877
0
            imm: v15,
19878
0
        } = v13 {
19879
0
            if let &Opcode::Iconst = v14 {
19880
0
                let v16 = C::shift_amount_masked(ctx, arg0, v15);
19881
0
                let v17 = C::u8_as_u32(ctx, v16);
19882
0
                let v18 = RegMemImm::Imm {
19883
0
                    simm32: v17,
19884
0
                };
19885
0
                // Rule at src/isa/x64/lower.isle line 710.
19886
0
                return v18;
19887
0
            }
19888
0
        }
19889
0
    }
19890
0
    let v3 = constructor_put_in_gpr(ctx, arg1);
19891
0
    let v4 = C::shift_mask(ctx, arg0);
19892
0
    let v5 = C::u8_as_u32(ctx, v4);
19893
0
    let v6 = RegMemImm::Imm {
19894
0
        simm32: v5,
19895
0
    };
19896
0
    let v7 = &C::gpr_mem_imm_new(ctx, &v6);
19897
0
    let v8 = constructor_x64_and(ctx, I64, v3, v7);
19898
0
    let v9 = C::gpr_to_reg(ctx, v8);
19899
0
    let v10 = &C::reg_to_reg_mem_imm(ctx, v9);
19900
0
    // Rule at src/isa/x64/lower.isle line 708.
19901
0
    return v10.clone();
19902
0
}
19903
19904
// Generated as internal constructor for term sar_i128.
19905
0
pub fn constructor_sar_i128<C: Context>(
19906
0
    ctx: &mut C,
19907
0
    arg0: ValueRegs,
19908
0
    arg1: Gpr,
19909
0
) -> ValueRegs {
19910
0
    let v3 = constructor_value_regs_get_gpr(ctx, arg0, 0x0);
19911
0
    let v5 = constructor_value_regs_get_gpr(ctx, arg0, 0x1);
19912
0
    let v7 = &C::gpr_to_imm8_gpr(ctx, arg1);
19913
0
    let v8 = constructor_x64_shr(ctx, I64, v3, v7);
19914
0
    let v9 = &C::gpr_to_imm8_gpr(ctx, arg1);
19915
0
    let v10 = constructor_x64_sar(ctx, I64, v5, v9);
19916
0
    let v12 = constructor_imm(ctx, I64, 0x40);
19917
0
    let v13 = C::gpr_new(ctx, v12);
19918
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, arg1);
19919
0
    let v15 = constructor_x64_sub(ctx, I64, v13, v14);
19920
0
    let v16 = &C::gpr_to_imm8_gpr(ctx, v15);
19921
0
    let v17 = constructor_x64_shl(ctx, I64, v5, v16);
19922
0
    let v20 = RegMemImm::Imm {
19923
0
        simm32: 0x7F,
19924
0
    };
19925
0
    let v21 = &C::gpr_mem_imm_new(ctx, &v20);
19926
0
    let v22 = &constructor_x64_test(ctx, &OperandSize::Size64, v21, arg1);
19927
0
    let v25 = constructor_imm(ctx, I64, 0x0);
19928
0
    let v26 = &C::reg_to_gpr_mem(ctx, v25);
19929
0
    let v27 = &constructor_cmove(ctx, I64, &CC::Z, v26, v17);
19930
0
    let v28 = constructor_with_flags_reg(ctx, v22, v27);
19931
0
    let v29 = C::gpr_new(ctx, v28);
19932
0
    let v30 = &C::gpr_to_gpr_mem_imm(ctx, v29);
19933
0
    let v31 = constructor_x64_or(ctx, I64, v8, v30);
19934
0
    let v33 = &C::imm8_to_imm8_gpr(ctx, 0x3F);
19935
0
    let v34 = constructor_x64_sar(ctx, I64, v5, v33);
19936
0
    let v36 = RegMemImm::Imm {
19937
0
        simm32: 0x40,
19938
0
    };
19939
0
    let v37 = &C::gpr_mem_imm_new(ctx, &v36);
19940
0
    let v38 = &constructor_x64_test(ctx, &OperandSize::Size64, v37, arg1);
19941
0
    let v39 = &C::gpr_to_gpr_mem(ctx, v31);
19942
0
    let v40 = &constructor_cmove(ctx, I64, &CC::Z, v39, v10);
19943
0
    let v41 = &C::gpr_to_gpr_mem(ctx, v10);
19944
0
    let v42 = &constructor_cmove(ctx, I64, &CC::Z, v41, v34);
19945
0
    let v43 = &constructor_consumes_flags_concat(ctx, v40, v42);
19946
0
    let v44 = constructor_with_flags(ctx, v38, v43);
19947
0
    // Rule at src/isa/x64/lower.isle line 724.
19948
0
    return v44;
19949
0
}
19950
19951
// Generated as internal constructor for term sshr_i8x16_bigger_shift.
19952
0
pub fn constructor_sshr_i8x16_bigger_shift<C: Context>(
19953
0
    ctx: &mut C,
19954
0
    arg0: Type,
19955
0
    arg1: &RegMemImm,
19956
0
) -> XmmMemImm {
19957
0
    match arg1 {
19958
        &RegMemImm::Reg {
19959
0
            reg: v7,
19960
0
        } => {
19961
0
            let v8 = C::gpr_new(ctx, v7);
19962
0
            let v9 = RegMemImm::Imm {
19963
0
                simm32: 0x8,
19964
0
            };
19965
0
            let v10 = &C::gpr_mem_imm_new(ctx, &v9);
19966
0
            let v11 = constructor_x64_add(ctx, arg0, v8, v10);
19967
0
            let v12 = C::gpr_to_reg(ctx, v11);
19968
0
            let v13 = RegMemImm::Reg {
19969
0
                reg: v12,
19970
0
            };
19971
0
            let v14 = &constructor_mov_rmi_to_xmm(ctx, &v13);
19972
0
            // Rule at src/isa/x64/lower.isle line 792.
19973
0
            return v14.clone();
19974
        }
19975
        &RegMemImm::Mem {
19976
0
            addr: ref v15,
19977
0
        } => {
19978
0
            let v17 = constructor_imm(ctx, arg0, 0x8);
19979
0
            let v18 = C::gpr_new(ctx, v17);
19980
0
            let v19 = &C::gpr_mem_imm_new(ctx, arg1);
19981
0
            let v20 = constructor_x64_add(ctx, arg0, v18, v19);
19982
0
            let v21 = C::gpr_to_reg(ctx, v20);
19983
0
            let v22 = RegMemImm::Reg {
19984
0
                reg: v21,
19985
0
            };
19986
0
            let v23 = &constructor_mov_rmi_to_xmm(ctx, &v22);
19987
0
            // Rule at src/isa/x64/lower.isle line 796.
19988
0
            return v23.clone();
19989
        }
19990
        &RegMemImm::Imm {
19991
0
            simm32: v2,
19992
0
        } => {
19993
0
            let v4 = C::u32_add(ctx, v2, 0x8);
19994
0
            let v5 = RegMemImm::Imm {
19995
0
                simm32: v4,
19996
0
            };
19997
0
            let v6 = &C::xmm_mem_imm_new(ctx, &v5);
19998
0
            // Rule at src/isa/x64/lower.isle line 790.
19999
0
            return v6.clone();
20000
        }
20001
0
        _ => {}
20002
0
    }
20003
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "sshr_i8x16_bigger_shift", "src/isa/x64/lower.isle line 789")
20004
0
}
20005
20006
// Generated as internal constructor for term lower_i64x2_sshr_imm.
20007
0
pub fn constructor_lower_i64x2_sshr_imm<C: Context>(
20008
0
    ctx: &mut C,
20009
0
    arg0: Xmm,
20010
0
    arg1: u32,
20011
0
) -> Xmm {
20012
0
    let v2 = C::u32_as_u64(ctx, arg1);
20013
0
    let v4 = C::u64_lt(ctx, v2, 0x20);
20014
0
    if v4 == true {
20015
0
        let v5 = &C::xmi_imm(ctx, arg1);
20016
0
        let v6 = constructor_x64_psrad(ctx, arg0, v5);
20017
0
        let v7 = &C::xmm_to_xmm_mem(ctx, v6);
20018
0
        let v9 = constructor_x64_pshufd(ctx, v7, 0xED);
20019
0
        let v10 = &C::xmi_imm(ctx, arg1);
20020
0
        let v11 = constructor_x64_psrlq(ctx, arg0, v10);
20021
0
        let v12 = &C::xmm_to_xmm_mem(ctx, v11);
20022
0
        let v14 = constructor_x64_pshufd(ctx, v12, 0xE8);
20023
0
        let v15 = &C::xmm_to_xmm_mem(ctx, v9);
20024
0
        let v16 = constructor_x64_punpckldq(ctx, v14, v15);
20025
0
        // Rule at src/isa/x64/lower.isle line 835.
20026
0
        return v16;
20027
0
    }
20028
0
    if arg1 == 0x20 {
20029
0
        let v17 = &C::xmm_to_xmm_mem(ctx, arg0);
20030
0
        let v18 = constructor_x64_pshufd(ctx, v17, 0xED);
20031
0
        let v20 = &C::xmi_imm(ctx, 0x1F);
20032
0
        let v21 = constructor_x64_psrad(ctx, arg0, v20);
20033
0
        let v22 = &C::xmm_to_xmm_mem(ctx, v21);
20034
0
        let v23 = constructor_x64_pshufd(ctx, v22, 0xED);
20035
0
        let v24 = &C::xmm_to_xmm_mem(ctx, v23);
20036
0
        let v25 = constructor_x64_punpckldq(ctx, v18, v24);
20037
0
        // Rule at src/isa/x64/lower.isle line 846.
20038
0
        return v25;
20039
0
    }
20040
0
    let v26 = C::u64_lt(ctx, 0x20, v2);
20041
0
    if v26 == true {
20042
0
        let v27 = &C::xmi_imm(ctx, 0x1F);
20043
0
        let v28 = constructor_x64_psrad(ctx, arg0, v27);
20044
0
        let v29 = &C::xmm_to_xmm_mem(ctx, v28);
20045
0
        let v30 = constructor_x64_pshufd(ctx, v29, 0xED);
20046
0
        let v32 = C::u32_sub(ctx, arg1, 0x20);
20047
0
        let v33 = &C::xmi_imm(ctx, v32);
20048
0
        let v34 = constructor_x64_psrad(ctx, arg0, v33);
20049
0
        let v35 = &C::xmm_to_xmm_mem(ctx, v34);
20050
0
        let v36 = constructor_x64_pshufd(ctx, v35, 0xED);
20051
0
        let v37 = &C::xmm_to_xmm_mem(ctx, v30);
20052
0
        let v38 = constructor_x64_punpckldq(ctx, v36, v37);
20053
0
        // Rule at src/isa/x64/lower.isle line 857.
20054
0
        return v38;
20055
0
    }
20056
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_i64x2_sshr_imm", "src/isa/x64/lower.isle line 830")
20057
0
}
20058
20059
// Generated as internal constructor for term lower_i64x2_sshr_gpr.
20060
0
pub fn constructor_lower_i64x2_sshr_gpr<C: Context>(
20061
0
    ctx: &mut C,
20062
0
    arg0: Xmm,
20063
0
    arg1: Gpr,
20064
0
) -> Xmm {
20065
0
    let v2 = &C::gpr_to_gpr_mem(ctx, arg1);
20066
0
    let v3 = constructor_x64_movq_to_xmm(ctx, v2);
20067
0
    let v5 = constructor_flip_high_bit_mask(ctx, I64X2);
20068
0
    let v6 = &C::xmm_to_xmm_mem_imm(ctx, v3);
20069
0
    let v7 = constructor_x64_psrlq(ctx, v5, v6);
20070
0
    let v8 = &C::xmm_to_xmm_mem_imm(ctx, v3);
20071
0
    let v9 = constructor_x64_psrlq(ctx, arg0, v8);
20072
0
    let v10 = &C::xmm_to_xmm_mem(ctx, v9);
20073
0
    let v11 = constructor_x64_pxor(ctx, v7, v10);
20074
0
    let v12 = &C::xmm_to_xmm_mem(ctx, v7);
20075
0
    let v13 = constructor_x64_psubq(ctx, v11, v12);
20076
0
    // Rule at src/isa/x64/lower.isle line 872.
20077
0
    return v13;
20078
0
}
20079
20080
// Generated as internal constructor for term lower_bmask.
20081
0
pub fn constructor_lower_bmask<C: Context>(
20082
0
    ctx: &mut C,
20083
0
    arg0: Type,
20084
0
    arg1: Type,
20085
0
    arg2: ValueRegs,
20086
0
) -> ValueRegs {
20087
0
    if arg0 == I128 {
20088
0
        let v23 = constructor_lower_bmask(ctx, I64, arg1, arg2);
20089
0
        let v24 = constructor_value_regs_get_gpr(ctx, v23, 0x0);
20090
0
        let v25 = C::gpr_to_reg(ctx, v24);
20091
0
        let v26 = C::gpr_to_reg(ctx, v24);
20092
0
        let v27 = C::value_regs(ctx, v25, v26);
20093
0
        // Rule at src/isa/x64/lower.isle line 1356.
20094
0
        return v27;
20095
0
    }
20096
0
    let v1 = C::fits_in_64(ctx, arg0);
20097
0
    if let Some(v2) = v1 {
20098
0
        if arg1 == I128 {
20099
0
            let v8 = constructor_value_regs_get_gpr(ctx, arg2, 0x0);
20100
0
            let v16 = constructor_value_regs_get_gpr(ctx, arg2, 0x1);
20101
0
            let v18 = &C::gpr_to_gpr_mem_imm(ctx, v16);
20102
0
            let v19 = constructor_x64_or(ctx, I64, v8, v18);
20103
0
            let v20 = C::gpr_to_reg(ctx, v19);
20104
0
            let v21 = C::value_reg(ctx, v20);
20105
0
            let v22 = constructor_lower_bmask(ctx, v2, I64, v21);
20106
0
            // Rule at src/isa/x64/lower.isle line 1348.
20107
0
            return v22;
20108
0
        }
20109
0
        let v4 = C::fits_in_64(ctx, arg1);
20110
0
        if let Some(v5) = v4 {
20111
0
            let v8 = constructor_value_regs_get_gpr(ctx, arg2, 0x0);
20112
0
            let v9 = &constructor_x64_neg_paired(ctx, v5, v8);
20113
0
            let v10 = &C::gpr_to_gpr_mem_imm(ctx, v8);
20114
0
            let v11 = &constructor_x64_sbb_paired(ctx, v2, v8, v10);
20115
0
            let v12 = constructor_with_flags(ctx, v9, v11);
20116
0
            let v14 = C::value_regs_get(ctx, v12, 0x1);
20117
0
            let v15 = C::value_reg(ctx, v14);
20118
0
            // Rule at src/isa/x64/lower.isle line 1337.
20119
0
            return v15;
20120
0
        }
20121
0
    }
20122
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_bmask", "src/isa/x64/lower.isle line 1325")
20123
0
}
20124
20125
// Generated as internal constructor for term i128_not.
20126
0
pub fn constructor_i128_not<C: Context>(
20127
0
    ctx: &mut C,
20128
0
    arg0: Value,
20129
0
) -> ValueRegs {
20130
0
    let v1 = C::put_in_regs(ctx, arg0);
20131
0
    let v3 = constructor_value_regs_get_gpr(ctx, v1, 0x0);
20132
0
    let v5 = constructor_value_regs_get_gpr(ctx, v1, 0x1);
20133
0
    let v7 = constructor_x64_not(ctx, I64, v3);
20134
0
    let v8 = constructor_x64_not(ctx, I64, v5);
20135
0
    let v9 = constructor_value_gprs(ctx, v7, v8);
20136
0
    // Rule at src/isa/x64/lower.isle line 1379.
20137
0
    return v9;
20138
0
}
20139
20140
// Generated as internal constructor for term all_ones_or_all_zeros.
20141
0
pub fn constructor_all_ones_or_all_zeros<C: Context>(
20142
0
    ctx: &mut C,
20143
0
    arg0: Value,
20144
0
) -> Option<bool> {
20145
0
    let v1 = C::def_inst(ctx, arg0);
20146
0
    if let Some(v2) = v1 {
20147
0
        let v3 = &C::inst_data(ctx, v2);
20148
0
        match v3 {
20149
            &InstructionData::FloatCompare {
20150
0
                opcode: ref v16,
20151
0
                args: ref v17,
20152
0
                cond: ref v18,
20153
0
            } => {
20154
0
                if let &Opcode::Fcmp = v16 {
20155
0
                    let v10 = C::value_type(ctx, arg0);
20156
0
                    let v11 = C::multi_lane(ctx, v10);
20157
0
                    if let Some(v12) = v11 {
20158
                        // Rule at src/isa/x64/lower.isle line 1425.
20159
0
                        return Some(true);
20160
0
                    }
20161
0
                }
20162
            }
20163
            &InstructionData::IntCompare {
20164
0
                opcode: ref v4,
20165
0
                args: ref v5,
20166
0
                cond: ref v6,
20167
0
            } => {
20168
0
                if let &Opcode::Icmp = v4 {
20169
0
                    let v10 = C::value_type(ctx, arg0);
20170
0
                    let v11 = C::multi_lane(ctx, v10);
20171
0
                    if let Some(v12) = v11 {
20172
                        // Rule at src/isa/x64/lower.isle line 1424.
20173
0
                        return Some(true);
20174
0
                    }
20175
0
                }
20176
            }
20177
            &InstructionData::UnaryConst {
20178
0
                opcode: ref v22,
20179
0
                constant_handle: v23,
20180
0
            } => {
20181
0
                if let &Opcode::Vconst = v22 {
20182
0
                    let v24 = C::vconst_all_ones_or_all_zeros(ctx, v23);
20183
0
                    if let Some(v25) = v24 {
20184
                        // Rule at src/isa/x64/lower.isle line 1426.
20185
0
                        return Some(true);
20186
0
                    }
20187
0
                }
20188
            }
20189
0
            _ => {}
20190
        }
20191
0
    }
20192
0
    None
20193
0
}
20194
20195
// Generated as internal constructor for term vec_insert_lane.
20196
0
pub fn constructor_vec_insert_lane<C: Context>(
20197
0
    ctx: &mut C,
20198
0
    arg0: Type,
20199
0
    arg1: Xmm,
20200
0
    arg2: &RegMem,
20201
0
    arg3: u8,
20202
0
) -> Xmm {
20203
0
    match arg0 {
20204
        I8X16 => {
20205
0
            let v4 = C::use_sse41(ctx);
20206
0
            if v4 == true {
20207
0
                let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20208
0
                let v6 = constructor_x64_pinsrb(ctx, arg1, v5, arg3);
20209
0
                // Rule at src/isa/x64/lower.isle line 1494.
20210
0
                return v6;
20211
0
            }
20212
0
            let v7 = C::insert_i8x16_lane_hole(ctx, arg3);
20213
0
            let v8 = &constructor_const_to_xmm_mem(ctx, v7);
20214
0
            let v9 = constructor_x64_pand(ctx, arg1, v8);
20215
0
            let v11 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20216
0
            let v12 = constructor_x64_movzx(ctx, &ExtMode::BL, v11);
20217
0
            let v15 = C::u8_and(ctx, arg3, 0x3);
20218
0
            let v16 = C::u8_shl(ctx, v15, 0x3);
20219
0
            let v17 = Imm8Reg::Imm8 {
20220
0
                imm: v16,
20221
0
            };
20222
0
            let v18 = &C::imm8_reg_to_imm8_gpr(ctx, &v17);
20223
0
            let v19 = constructor_x64_shl(ctx, I32, v12, v18);
20224
0
            let v20 = &C::gpr_to_gpr_mem(ctx, v19);
20225
0
            let v21 = constructor_x64_movd_to_xmm(ctx, v20);
20226
0
            let v22 = &C::xmm_to_xmm_mem(ctx, v21);
20227
0
            let v24 = C::u8_shr(ctx, arg3, 0x2);
20228
0
            let v25 = constructor_insert_i8x16_lane_pshufd_imm(ctx, v24);
20229
0
            let v26 = constructor_x64_pshufd(ctx, v22, v25);
20230
0
            let v27 = &C::xmm_to_xmm_mem(ctx, v26);
20231
0
            let v28 = constructor_x64_por(ctx, v9, v27);
20232
0
            // Rule at src/isa/x64/lower.isle line 1522.
20233
0
            return v28;
20234
        }
20235
        I16X8 => {
20236
0
            let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20237
0
            let v29 = constructor_x64_pinsrw(ctx, arg1, v5, arg3);
20238
0
            // Rule at src/isa/x64/lower.isle line 1539.
20239
0
            return v29;
20240
        }
20241
        I32X4 => {
20242
0
            let v4 = C::use_sse41(ctx);
20243
0
            if v4 == true {
20244
0
                let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20245
0
                let v30 = constructor_x64_pinsrd(ctx, arg1, v5, arg3);
20246
0
                // Rule at src/isa/x64/lower.isle line 1543.
20247
0
                return v30;
20248
0
            }
20249
0
            match arg3 {
20250
                0x0 => {
20251
0
                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20252
0
                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
20253
0
                    let v32 = constructor_x64_movss_regmove(ctx, arg1, v31);
20254
0
                    // Rule at src/isa/x64/lower.isle line 1547.
20255
0
                    return v32;
20256
                }
20257
                0x1 => {
20258
0
                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20259
0
                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
20260
0
                    let v33 = &C::xmm_to_xmm_mem(ctx, arg1);
20261
0
                    let v34 = constructor_x64_punpcklqdq(ctx, v31, v33);
20262
0
                    let v35 = &C::xmm_to_xmm_mem(ctx, arg1);
20263
0
                    let v37 = constructor_x64_shufps(ctx, v34, v35, 0xE2);
20264
0
                    // Rule at src/isa/x64/lower.isle line 1552.
20265
0
                    return v37;
20266
                }
20267
                0x2 => {
20268
0
                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20269
0
                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
20270
0
                    let v33 = &C::xmm_to_xmm_mem(ctx, arg1);
20271
0
                    let v39 = constructor_x64_shufps(ctx, v31, v33, 0x30);
20272
0
                    let v40 = &C::xmm_to_xmm_mem(ctx, v39);
20273
0
                    let v42 = constructor_x64_shufps(ctx, arg1, v40, 0x84);
20274
0
                    // Rule at src/isa/x64/lower.isle line 1559.
20275
0
                    return v42;
20276
                }
20277
                0x3 => {
20278
0
                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20279
0
                    let v31 = constructor_x64_movd_to_xmm(ctx, v5);
20280
0
                    let v33 = &C::xmm_to_xmm_mem(ctx, arg1);
20281
0
                    let v44 = constructor_x64_shufps(ctx, v31, v33, 0xE4);
20282
0
                    let v45 = &C::xmm_to_xmm_mem(ctx, v44);
20283
0
                    let v47 = constructor_x64_shufps(ctx, arg1, v45, 0x24);
20284
0
                    // Rule at src/isa/x64/lower.isle line 1566.
20285
0
                    return v47;
20286
                }
20287
0
                _ => {}
20288
            }
20289
        }
20290
        I64X2 => {
20291
0
            let v4 = C::use_sse41(ctx);
20292
0
            if v4 == true {
20293
0
                let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20294
0
                let v48 = constructor_x64_pinsrq(ctx, arg1, v5, arg3);
20295
0
                // Rule at src/isa/x64/lower.isle line 1572.
20296
0
                return v48;
20297
0
            }
20298
0
            match arg3 {
20299
                0x0 => {
20300
0
                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20301
0
                    let v49 = constructor_x64_movq_to_xmm(ctx, v5);
20302
0
                    let v50 = constructor_x64_movsd_regmove(ctx, arg1, v49);
20303
0
                    // Rule at src/isa/x64/lower.isle line 1575.
20304
0
                    return v50;
20305
                }
20306
                0x1 => {
20307
0
                    let v5 = &C::reg_mem_to_gpr_mem(ctx, arg2);
20308
0
                    let v49 = constructor_x64_movq_to_xmm(ctx, v5);
20309
0
                    let v51 = &C::xmm_to_xmm_mem(ctx, v49);
20310
0
                    let v52 = constructor_x64_punpcklqdq(ctx, arg1, v51);
20311
0
                    // Rule at src/isa/x64/lower.isle line 1577.
20312
0
                    return v52;
20313
                }
20314
0
                _ => {}
20315
            }
20316
        }
20317
        F32X4 => {
20318
0
            let v4 = C::use_sse41(ctx);
20319
0
            if v4 == true {
20320
0
                let v53 = &C::reg_mem_to_xmm_mem(ctx, arg2);
20321
0
                let v54 = C::sse_insertps_lane_imm(ctx, arg3);
20322
0
                let v55 = constructor_x64_insertps(ctx, arg1, v53, v54);
20323
0
                // Rule at src/isa/x64/lower.isle line 1581.
20324
0
                return v55;
20325
0
            }
20326
0
            match arg2 {
20327
                &RegMem::Reg {
20328
0
                    reg: v56,
20329
0
                } => {
20330
0
                    match arg3 {
20331
                        0x0 => {
20332
0
                            let v57 = C::xmm_new(ctx, v56);
20333
0
                            let v58 = constructor_x64_movss_regmove(ctx, arg1, v57);
20334
0
                            // Rule at src/isa/x64/lower.isle line 1586.
20335
0
                            return v58;
20336
                        }
20337
                        0x1 => {
20338
0
                            let v57 = C::xmm_new(ctx, v56);
20339
0
                            let v59 = &C::xmm_to_xmm_mem(ctx, arg1);
20340
0
                            let v60 = constructor_x64_movlhps(ctx, v57, v59);
20341
0
                            let v61 = &C::xmm_to_xmm_mem(ctx, arg1);
20342
0
                            let v62 = constructor_x64_shufps(ctx, v60, v61, 0xE2);
20343
0
                            // Rule at src/isa/x64/lower.isle line 1592.
20344
0
                            return v62;
20345
                        }
20346
                        0x2 => {
20347
0
                            let v57 = C::xmm_new(ctx, v56);
20348
0
                            let v59 = &C::xmm_to_xmm_mem(ctx, arg1);
20349
0
                            let v63 = constructor_x64_shufps(ctx, v57, v59, 0x30);
20350
0
                            let v64 = &C::xmm_to_xmm_mem(ctx, v63);
20351
0
                            let v65 = constructor_x64_shufps(ctx, arg1, v64, 0x84);
20352
0
                            // Rule at src/isa/x64/lower.isle line 1599.
20353
0
                            return v65;
20354
                        }
20355
                        0x3 => {
20356
0
                            let v57 = C::xmm_new(ctx, v56);
20357
0
                            let v59 = &C::xmm_to_xmm_mem(ctx, arg1);
20358
0
                            let v66 = constructor_x64_shufps(ctx, v57, v59, 0xE4);
20359
0
                            let v67 = &C::xmm_to_xmm_mem(ctx, v66);
20360
0
                            let v68 = constructor_x64_shufps(ctx, arg1, v67, 0x24);
20361
0
                            // Rule at src/isa/x64/lower.isle line 1606.
20362
0
                            return v68;
20363
                        }
20364
0
                        _ => {}
20365
                    }
20366
                }
20367
                &RegMem::Mem {
20368
0
                    addr: ref v69,
20369
0
                } => {
20370
0
                    let v71 = constructor_x64_movss_load(ctx, v69);
20371
0
                    let v72 = C::xmm_to_reg(ctx, v71);
20372
0
                    let v73 = &constructor_xmm_to_reg_mem(ctx, v72);
20373
0
                    let v74 = &C::xmm_mem_to_reg_mem(ctx, v73);
20374
0
                    let v75 = constructor_vec_insert_lane(ctx, F32X4, arg1, v74, arg3);
20375
0
                    // Rule at src/isa/x64/lower.isle line 1611.
20376
0
                    return v75;
20377
                }
20378
0
                _ => {}
20379
            }
20380
        }
20381
        F64X2 => {
20382
0
            match arg3 {
20383
                0x0 => {
20384
0
                    match arg2 {
20385
                        &RegMem::Reg {
20386
0
                            reg: v56,
20387
0
                        } => {
20388
0
                            let v57 = C::xmm_new(ctx, v56);
20389
0
                            let v76 = constructor_x64_movsd_regmove(ctx, arg1, v57);
20390
0
                            // Rule at src/isa/x64/lower.isle line 1623.
20391
0
                            return v76;
20392
                        }
20393
                        &RegMem::Mem {
20394
0
                            addr: ref v69,
20395
0
                        } => {
20396
0
                            let v77 = constructor_x64_movsd_load(ctx, v69);
20397
0
                            let v78 = constructor_x64_movsd_regmove(ctx, arg1, v77);
20398
0
                            // Rule at src/isa/x64/lower.isle line 1625.
20399
0
                            return v78;
20400
                        }
20401
0
                        _ => {}
20402
                    }
20403
                }
20404
                0x1 => {
20405
0
                    let v53 = &C::reg_mem_to_xmm_mem(ctx, arg2);
20406
0
                    let v79 = constructor_x64_movlhps(ctx, arg1, v53);
20407
0
                    // Rule at src/isa/x64/lower.isle line 1633.
20408
0
                    return v79;
20409
                }
20410
0
                _ => {}
20411
            }
20412
        }
20413
0
        _ => {}
20414
    }
20415
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "vec_insert_lane", "src/isa/x64/lower.isle line 1491")
20416
0
}
20417
20418
// Generated as internal constructor for term insert_i8x16_lane_pshufd_imm.
20419
0
pub fn constructor_insert_i8x16_lane_pshufd_imm<C: Context>(
20420
0
    ctx: &mut C,
20421
0
    arg0: u8,
20422
0
) -> u8 {
20423
0
    match arg0 {
20424
        0x0 => {
20425
            // Rule at src/isa/x64/lower.isle line 1533.
20426
0
            return 0x54;
20427
        }
20428
        0x1 => {
20429
            // Rule at src/isa/x64/lower.isle line 1534.
20430
0
            return 0x51;
20431
        }
20432
        0x2 => {
20433
            // Rule at src/isa/x64/lower.isle line 1535.
20434
0
            return 0x45;
20435
        }
20436
        0x3 => {
20437
            // Rule at src/isa/x64/lower.isle line 1536.
20438
0
            return 0x15;
20439
        }
20440
0
        _ => {}
20441
0
    }
20442
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "insert_i8x16_lane_pshufd_imm", "src/isa/x64/lower.isle line 1532")
20443
0
}
20444
20445
// Generated as internal constructor for term cmp_and_choose.
20446
4.54k
pub fn constructor_cmp_and_choose<C: Context>(
20447
4.54k
    ctx: &mut C,
20448
4.54k
    arg0: Type,
20449
4.54k
    arg1: &CC,
20450
4.54k
    arg2: Value,
20451
4.54k
    arg3: Value,
20452
4.54k
) -> ValueRegs {
20453
4.54k
    let v1 = C::fits_in_64(ctx, arg0);
20454
4.54k
    if let Some(v2) = v1 {
20455
4.54k
        let v6 = &C::raw_operand_size_of_type(ctx, v2);
20456
4.54k
        let v7 = C::put_in_reg(ctx, arg2);
20457
4.54k
        let v8 = C::put_in_reg(ctx, arg3);
20458
4.54k
        let v9 = &constructor_reg_to_gpr_mem_imm(ctx, v7);
20459
4.54k
        let v10 = C::gpr_new(ctx, v8);
20460
4.54k
        let v11 = &constructor_x64_cmp(ctx, v6, v9, v10);
20461
4.54k
        let v12 = &C::reg_to_gpr_mem(ctx, v8);
20462
4.54k
        let v13 = C::gpr_new(ctx, v7);
20463
4.54k
        let v14 = &constructor_cmove(ctx, v2, arg1, v12, v13);
20464
4.54k
        let v15 = constructor_with_flags_reg(ctx, v11, v14);
20465
4.54k
        let v16 = C::value_reg(ctx, v15);
20466
4.54k
        // Rule at src/isa/x64/lower.isle line 1641.
20467
4.54k
        return v16;
20468
0
    }
20469
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "cmp_and_choose", "src/isa/x64/lower.isle line 1640")
20470
4.54k
}
20471
20472
// Generated as internal constructor for term has_pmins.
20473
0
pub fn constructor_has_pmins<C: Context>(
20474
0
    ctx: &mut C,
20475
0
    arg0: Type,
20476
0
) -> bool {
20477
0
    match arg0 {
20478
        I16X8 => {
20479
            // Rule at src/isa/x64/lower.isle line 1667.
20480
0
            return true;
20481
        }
20482
        I64X2 => {
20483
            // Rule at src/isa/x64/lower.isle line 1668.
20484
0
            return false;
20485
        }
20486
0
        _ => {}
20487
0
    }
20488
0
    let v3 = C::use_sse41(ctx);
20489
0
    // Rule at src/isa/x64/lower.isle line 1669.
20490
0
    return v3;
20491
0
}
20492
20493
// Generated as internal constructor for term has_pmaxs.
20494
0
pub fn constructor_has_pmaxs<C: Context>(
20495
0
    ctx: &mut C,
20496
0
    arg0: Type,
20497
0
) -> bool {
20498
0
    match arg0 {
20499
        I16X8 => {
20500
            // Rule at src/isa/x64/lower.isle line 1672.
20501
0
            return true;
20502
        }
20503
        I64X2 => {
20504
            // Rule at src/isa/x64/lower.isle line 1673.
20505
0
            return false;
20506
        }
20507
0
        _ => {}
20508
0
    }
20509
0
    let v3 = C::use_sse41(ctx);
20510
0
    // Rule at src/isa/x64/lower.isle line 1674.
20511
0
    return v3;
20512
0
}
20513
20514
// Generated as internal constructor for term has_pmaxu.
20515
0
pub fn constructor_has_pmaxu<C: Context>(
20516
0
    ctx: &mut C,
20517
0
    arg0: Type,
20518
0
) -> bool {
20519
0
    match arg0 {
20520
        I8X16 => {
20521
            // Rule at src/isa/x64/lower.isle line 1677.
20522
0
            return true;
20523
        }
20524
        I64X2 => {
20525
            // Rule at src/isa/x64/lower.isle line 1678.
20526
0
            return false;
20527
        }
20528
0
        _ => {}
20529
0
    }
20530
0
    let v3 = C::use_sse41(ctx);
20531
0
    // Rule at src/isa/x64/lower.isle line 1679.
20532
0
    return v3;
20533
0
}
20534
20535
// Generated as internal constructor for term has_pminu.
20536
0
pub fn constructor_has_pminu<C: Context>(
20537
0
    ctx: &mut C,
20538
0
    arg0: Type,
20539
0
) -> bool {
20540
0
    match arg0 {
20541
        I8X16 => {
20542
            // Rule at src/isa/x64/lower.isle line 1682.
20543
0
            return true;
20544
        }
20545
        I64X2 => {
20546
            // Rule at src/isa/x64/lower.isle line 1683.
20547
0
            return false;
20548
        }
20549
0
        _ => {}
20550
0
    }
20551
0
    let v3 = C::use_sse41(ctx);
20552
0
    // Rule at src/isa/x64/lower.isle line 1684.
20553
0
    return v3;
20554
0
}
20555
20556
// Generated as internal constructor for term lower_vec_smax.
20557
0
pub fn constructor_lower_vec_smax<C: Context>(
20558
0
    ctx: &mut C,
20559
0
    arg0: Type,
20560
0
    arg1: Xmm,
20561
0
    arg2: Xmm,
20562
0
) -> Xmm {
20563
0
    let v3 = constructor_has_pmaxs(ctx, arg0);
20564
0
    if v3 == true {
20565
0
        let v4 = &C::xmm_to_xmm_mem(ctx, arg2);
20566
0
        let v5 = constructor_x64_pmaxs(ctx, arg0, arg1, v4);
20567
0
        // Rule at src/isa/x64/lower.isle line 1692.
20568
0
        return v5;
20569
0
    }
20570
0
    let v4 = &C::xmm_to_xmm_mem(ctx, arg2);
20571
0
    let v6 = constructor_x64_pcmpgt(ctx, arg0, arg1, v4);
20572
0
    let v7 = &C::xmm_to_xmm_mem(ctx, arg1);
20573
0
    let v8 = constructor_x64_pand(ctx, v6, v7);
20574
0
    let v9 = &C::xmm_to_xmm_mem(ctx, arg2);
20575
0
    let v10 = constructor_x64_pandn(ctx, v6, v9);
20576
0
    let v11 = &C::xmm_to_xmm_mem(ctx, v10);
20577
0
    let v12 = constructor_x64_por(ctx, v8, v11);
20578
0
    // Rule at src/isa/x64/lower.isle line 1696.
20579
0
    return v12;
20580
0
}
20581
20582
// Generated as internal constructor for term flip_high_bit_mask.
20583
0
pub fn constructor_flip_high_bit_mask<C: Context>(
20584
0
    ctx: &mut C,
20585
0
    arg0: Type,
20586
0
) -> Xmm {
20587
0
    match arg0 {
20588
        I16X8 => {
20589
0
            let v2 = C::emit_u128_le_const(ctx, 0x80008000800080008000800080008000);
20590
0
            let v3 = &constructor_const_to_xmm_mem(ctx, v2);
20591
0
            let v4 = constructor_x64_movdqu_load(ctx, v3);
20592
0
            // Rule at src/isa/x64/lower.isle line 1751.
20593
0
            return v4;
20594
        }
20595
        I32X4 => {
20596
0
            let v6 = C::emit_u128_le_const(ctx, 0x80000000800000008000000080000000);
20597
0
            let v7 = &constructor_const_to_xmm_mem(ctx, v6);
20598
0
            let v8 = constructor_x64_movdqu_load(ctx, v7);
20599
0
            // Rule at src/isa/x64/lower.isle line 1753.
20600
0
            return v8;
20601
        }
20602
        I64X2 => {
20603
0
            let v10 = C::emit_u128_le_const(ctx, 0x80000000000000008000000000000000);
20604
0
            let v11 = &constructor_const_to_xmm_mem(ctx, v10);
20605
0
            let v12 = constructor_x64_movdqu_load(ctx, v11);
20606
0
            // Rule at src/isa/x64/lower.isle line 1755.
20607
0
            return v12;
20608
        }
20609
0
        _ => {}
20610
0
    }
20611
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "flip_high_bit_mask", "src/isa/x64/lower.isle line 1750")
20612
0
}
20613
20614
// Generated as internal constructor for term lower_select_fcmp.
20615
0
pub fn constructor_lower_select_fcmp<C: Context>(
20616
0
    ctx: &mut C,
20617
0
    arg0: Type,
20618
0
    arg1: &FcmpCondResult,
20619
0
    arg2: Value,
20620
0
    arg3: Value,
20621
0
) -> InstOutput {
20622
0
    match arg1 {
20623
        &FcmpCondResult::Condition {
20624
0
            producer: ref v2,
20625
0
            cc: ref v3,
20626
0
        } => {
20627
0
            let v6 = &constructor_cmove_from_values(ctx, arg0, v3, arg2, arg3);
20628
0
            let v7 = constructor_with_flags(ctx, v2, v6);
20629
0
            let v8 = C::output(ctx, v7);
20630
0
            // Rule at src/isa/x64/lower.isle line 2074.
20631
0
            return v8;
20632
        }
20633
        &FcmpCondResult::OrCondition {
20634
0
            producer: ref v9,
20635
0
            cc1: ref v10,
20636
0
            cc2: ref v11,
20637
0
        } => {
20638
0
            let v12 = &constructor_cmove_or_from_values(ctx, arg0, v10, v11, arg2, arg3);
20639
0
            let v13 = constructor_with_flags(ctx, v9, v12);
20640
0
            let v14 = C::output(ctx, v13);
20641
0
            // Rule at src/isa/x64/lower.isle line 2076.
20642
0
            return v14;
20643
        }
20644
0
        _ => {}
20645
0
    }
20646
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_select_fcmp", "src/isa/x64/lower.isle line 2073")
20647
0
}
20648
20649
// Generated as internal constructor for term lower_select_icmp.
20650
13.4k
pub fn constructor_lower_select_icmp<C: Context>(
20651
13.4k
    ctx: &mut C,
20652
13.4k
    arg0: Type,
20653
13.4k
    arg1: &IcmpCondResult,
20654
13.4k
    arg2: Value,
20655
13.4k
    arg3: Value,
20656
13.4k
) -> InstOutput {
20657
13.4k
    if let &IcmpCondResult::Condition {
20658
13.4k
        producer: ref v2,
20659
13.4k
        cc: ref v3,
20660
13.4k
    } = arg1 {
20661
13.4k
        let v6 = &constructor_cmove_from_values(ctx, arg0, v3, arg2, arg3);
20662
13.4k
        let v7 = constructor_with_flags(ctx, v2, v6);
20663
13.4k
        let v8 = C::output(ctx, v7);
20664
13.4k
        // Rule at src/isa/x64/lower.isle line 2102.
20665
13.4k
        return v8;
20666
13.4k
    }
20667
13.4k
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_select_icmp", "src/isa/x64/lower.isle line 2101")
20668
13.4k
}
20669
20670
// Generated as internal constructor for term do_clz.
20671
0
pub fn constructor_do_clz<C: Context>(
20672
0
    ctx: &mut C,
20673
0
    arg0: Type,
20674
0
    arg1: Type,
20675
0
    arg2: Gpr,
20676
0
) -> Gpr {
20677
0
    let v5 = constructor_imm_i64(ctx, I64, -0x1);
20678
0
    let v6 = C::gpr_new(ctx, v5);
20679
0
    let v7 = constructor_bsr_or_else(ctx, arg0, arg2, v6);
20680
0
    let v8 = C::gpr_to_reg(ctx, v7);
20681
0
    let v9 = C::ty_bits_u64(ctx, arg1);
20682
0
    let v11 = C::u64_sub(ctx, v9, 0x1);
20683
0
    let v12 = constructor_imm(ctx, arg0, v11);
20684
0
    let v13 = C::gpr_new(ctx, v12);
20685
0
    let v14 = &constructor_reg_to_gpr_mem_imm(ctx, v8);
20686
0
    let v15 = constructor_x64_sub(ctx, arg0, v13, v14);
20687
0
    // Rule at src/isa/x64/lower.isle line 2150.
20688
0
    return v15;
20689
0
}
20690
20691
// Generated as internal constructor for term do_ctz.
20692
0
pub fn constructor_do_ctz<C: Context>(
20693
0
    ctx: &mut C,
20694
0
    arg0: Type,
20695
0
    arg1: Type,
20696
0
    arg2: Gpr,
20697
0
) -> Gpr {
20698
0
    let v4 = C::ty_bits_u64(ctx, arg1);
20699
0
    let v5 = constructor_imm(ctx, I64, v4);
20700
0
    let v6 = C::gpr_new(ctx, v5);
20701
0
    let v7 = constructor_bsf_or_else(ctx, arg0, arg2, v6);
20702
0
    // Rule at src/isa/x64/lower.isle line 2186.
20703
0
    return v7;
20704
0
}
20705
20706
// Generated as internal constructor for term do_popcnt.
20707
0
pub fn constructor_do_popcnt<C: Context>(
20708
0
    ctx: &mut C,
20709
0
    arg0: Type,
20710
0
    arg1: Gpr,
20711
0
) -> Gpr {
20712
0
    match arg0 {
20713
        I32 => {
20714
0
            let v4 = Imm8Reg::Imm8 {
20715
0
                imm: 0x1,
20716
0
            };
20717
0
            let v5 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
20718
0
            let v47 = constructor_x64_shr(ctx, I32, arg1, v5);
20719
0
            let v49 = constructor_imm(ctx, I32, 0x77777777);
20720
0
            let v50 = C::gpr_new(ctx, v49);
20721
0
            let v51 = &C::gpr_to_gpr_mem_imm(ctx, v50);
20722
0
            let v52 = constructor_x64_and(ctx, I32, v47, v51);
20723
0
            let v53 = &C::gpr_to_gpr_mem_imm(ctx, v52);
20724
0
            let v54 = constructor_x64_sub(ctx, I32, arg1, v53);
20725
0
            let v14 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
20726
0
            let v55 = constructor_x64_shr(ctx, I32, v52, v14);
20727
0
            let v56 = &C::gpr_to_gpr_mem_imm(ctx, v50);
20728
0
            let v57 = constructor_x64_and(ctx, I32, v55, v56);
20729
0
            let v58 = &C::gpr_to_gpr_mem_imm(ctx, v57);
20730
0
            let v59 = constructor_x64_sub(ctx, I32, v54, v58);
20731
0
            let v20 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
20732
0
            let v60 = constructor_x64_shr(ctx, I32, v57, v20);
20733
0
            let v61 = &C::gpr_to_gpr_mem_imm(ctx, v50);
20734
0
            let v62 = constructor_x64_and(ctx, I32, v60, v61);
20735
0
            let v63 = &C::gpr_to_gpr_mem_imm(ctx, v62);
20736
0
            let v64 = constructor_x64_sub(ctx, I32, v59, v63);
20737
0
            let v27 = Imm8Reg::Imm8 {
20738
0
                imm: 0x4,
20739
0
            };
20740
0
            let v28 = &C::imm8_reg_to_imm8_gpr(ctx, &v27);
20741
0
            let v65 = constructor_x64_shr(ctx, I32, v64, v28);
20742
0
            let v66 = &C::gpr_to_gpr_mem_imm(ctx, v64);
20743
0
            let v67 = constructor_x64_add(ctx, I32, v65, v66);
20744
0
            let v69 = RegMemImm::Imm {
20745
0
                simm32: 0xF0F0F0F,
20746
0
            };
20747
0
            let v70 = &C::gpr_mem_imm_new(ctx, &v69);
20748
0
            let v71 = constructor_x64_and(ctx, I32, v67, v70);
20749
0
            let v73 = RegMemImm::Imm {
20750
0
                simm32: 0x1010101,
20751
0
            };
20752
0
            let v74 = &C::gpr_mem_imm_new(ctx, &v73);
20753
0
            let v75 = constructor_x64_mul(ctx, I32, v71, v74);
20754
0
            let v77 = Imm8Reg::Imm8 {
20755
0
                imm: 0x18,
20756
0
            };
20757
0
            let v78 = &C::imm8_reg_to_imm8_gpr(ctx, &v77);
20758
0
            let v79 = constructor_x64_shr(ctx, I32, v75, v78);
20759
0
            // Rule at src/isa/x64/lower.isle line 2268.
20760
0
            return v79;
20761
        }
20762
        I64 => {
20763
0
            let v4 = Imm8Reg::Imm8 {
20764
0
                imm: 0x1,
20765
0
            };
20766
0
            let v5 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
20767
0
            let v6 = constructor_x64_shr(ctx, I64, arg1, v5);
20768
0
            let v8 = constructor_imm(ctx, I64, 0x7777777777777777);
20769
0
            let v9 = C::gpr_new(ctx, v8);
20770
0
            let v10 = &C::gpr_to_gpr_mem_imm(ctx, v9);
20771
0
            let v11 = constructor_x64_and(ctx, I64, v6, v10);
20772
0
            let v12 = &C::gpr_to_gpr_mem_imm(ctx, v11);
20773
0
            let v13 = constructor_x64_sub(ctx, I64, arg1, v12);
20774
0
            let v14 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
20775
0
            let v15 = constructor_x64_shr(ctx, I64, v11, v14);
20776
0
            let v16 = &C::gpr_to_gpr_mem_imm(ctx, v9);
20777
0
            let v17 = constructor_x64_and(ctx, I64, v15, v16);
20778
0
            let v18 = &C::gpr_to_gpr_mem_imm(ctx, v17);
20779
0
            let v19 = constructor_x64_sub(ctx, I64, v13, v18);
20780
0
            let v20 = &C::imm8_reg_to_imm8_gpr(ctx, &v4);
20781
0
            let v21 = constructor_x64_shr(ctx, I64, v17, v20);
20782
0
            let v22 = &C::gpr_to_gpr_mem_imm(ctx, v9);
20783
0
            let v23 = constructor_x64_and(ctx, I64, v21, v22);
20784
0
            let v24 = &C::gpr_to_gpr_mem_imm(ctx, v23);
20785
0
            let v25 = constructor_x64_sub(ctx, I64, v19, v24);
20786
0
            let v27 = Imm8Reg::Imm8 {
20787
0
                imm: 0x4,
20788
0
            };
20789
0
            let v28 = &C::imm8_reg_to_imm8_gpr(ctx, &v27);
20790
0
            let v29 = constructor_x64_shr(ctx, I64, v25, v28);
20791
0
            let v30 = &C::gpr_to_gpr_mem_imm(ctx, v25);
20792
0
            let v31 = constructor_x64_add(ctx, I64, v29, v30);
20793
0
            let v33 = constructor_imm(ctx, I64, 0xF0F0F0F0F0F0F0F);
20794
0
            let v34 = C::gpr_new(ctx, v33);
20795
0
            let v35 = &C::gpr_to_gpr_mem_imm(ctx, v34);
20796
0
            let v36 = constructor_x64_and(ctx, I64, v31, v35);
20797
0
            let v38 = constructor_imm(ctx, I64, 0x101010101010101);
20798
0
            let v39 = C::gpr_new(ctx, v38);
20799
0
            let v40 = &C::gpr_to_gpr_mem_imm(ctx, v39);
20800
0
            let v41 = constructor_x64_mul(ctx, I64, v36, v40);
20801
0
            let v43 = Imm8Reg::Imm8 {
20802
0
                imm: 0x38,
20803
0
            };
20804
0
            let v44 = &C::imm8_reg_to_imm8_gpr(ctx, &v43);
20805
0
            let v45 = constructor_x64_shr(ctx, I64, v41, v44);
20806
0
            // Rule at src/isa/x64/lower.isle line 2225.
20807
0
            return v45;
20808
        }
20809
0
        _ => {}
20810
0
    }
20811
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "do_popcnt", "src/isa/x64/lower.isle line 2224")
20812
0
}
20813
20814
// Generated as internal constructor for term do_bitrev8.
20815
0
pub fn constructor_do_bitrev8<C: Context>(
20816
0
    ctx: &mut C,
20817
0
    arg0: Type,
20818
0
    arg1: Gpr,
20819
0
) -> Gpr {
20820
0
    let v2 = C::ty_mask(ctx, arg0);
20821
0
    let v4 = C::u64_and(ctx, v2, 0x5555555555555555);
20822
0
    let v5 = constructor_imm(ctx, arg0, v4);
20823
0
    let v6 = C::gpr_new(ctx, v5);
20824
0
    let v7 = &C::gpr_to_gpr_mem_imm(ctx, v6);
20825
0
    let v8 = constructor_x64_and(ctx, arg0, arg1, v7);
20826
0
    let v10 = Imm8Reg::Imm8 {
20827
0
        imm: 0x1,
20828
0
    };
20829
0
    let v11 = &C::imm8_reg_to_imm8_gpr(ctx, &v10);
20830
0
    let v12 = constructor_x64_shr(ctx, arg0, arg1, v11);
20831
0
    let v13 = &C::gpr_to_gpr_mem_imm(ctx, v6);
20832
0
    let v14 = constructor_x64_and(ctx, arg0, v12, v13);
20833
0
    let v15 = &C::imm8_reg_to_imm8_gpr(ctx, &v10);
20834
0
    let v16 = constructor_x64_shl(ctx, arg0, v8, v15);
20835
0
    let v17 = &C::gpr_to_gpr_mem_imm(ctx, v14);
20836
0
    let v18 = constructor_x64_or(ctx, arg0, v16, v17);
20837
0
    let v20 = C::u64_and(ctx, v2, 0x3333333333333333);
20838
0
    let v21 = constructor_imm(ctx, arg0, v20);
20839
0
    let v22 = C::gpr_new(ctx, v21);
20840
0
    let v23 = &C::gpr_to_gpr_mem_imm(ctx, v22);
20841
0
    let v24 = constructor_x64_and(ctx, arg0, v18, v23);
20842
0
    let v26 = Imm8Reg::Imm8 {
20843
0
        imm: 0x2,
20844
0
    };
20845
0
    let v27 = &C::imm8_reg_to_imm8_gpr(ctx, &v26);
20846
0
    let v28 = constructor_x64_shr(ctx, arg0, v18, v27);
20847
0
    let v29 = &C::gpr_to_gpr_mem_imm(ctx, v22);
20848
0
    let v30 = constructor_x64_and(ctx, arg0, v28, v29);
20849
0
    let v31 = &C::imm8_reg_to_imm8_gpr(ctx, &v26);
20850
0
    let v32 = constructor_x64_shl(ctx, arg0, v24, v31);
20851
0
    let v33 = &C::gpr_to_gpr_mem_imm(ctx, v30);
20852
0
    let v34 = constructor_x64_or(ctx, arg0, v32, v33);
20853
0
    let v36 = C::u64_and(ctx, v2, 0xF0F0F0F0F0F0F0F);
20854
0
    let v37 = constructor_imm(ctx, arg0, v36);
20855
0
    let v38 = C::gpr_new(ctx, v37);
20856
0
    let v39 = &C::gpr_to_gpr_mem_imm(ctx, v38);
20857
0
    let v40 = constructor_x64_and(ctx, arg0, v34, v39);
20858
0
    let v42 = Imm8Reg::Imm8 {
20859
0
        imm: 0x4,
20860
0
    };
20861
0
    let v43 = &C::imm8_reg_to_imm8_gpr(ctx, &v42);
20862
0
    let v44 = constructor_x64_shr(ctx, arg0, v34, v43);
20863
0
    let v45 = &C::gpr_to_gpr_mem_imm(ctx, v38);
20864
0
    let v46 = constructor_x64_and(ctx, arg0, v44, v45);
20865
0
    let v47 = &C::imm8_reg_to_imm8_gpr(ctx, &v42);
20866
0
    let v48 = constructor_x64_shl(ctx, arg0, v40, v47);
20867
0
    let v49 = &C::gpr_to_gpr_mem_imm(ctx, v46);
20868
0
    let v50 = constructor_x64_or(ctx, arg0, v48, v49);
20869
0
    // Rule at src/isa/x64/lower.isle line 2362.
20870
0
    return v50;
20871
0
}
20872
20873
// Generated as internal constructor for term do_bitrev16.
20874
0
pub fn constructor_do_bitrev16<C: Context>(
20875
0
    ctx: &mut C,
20876
0
    arg0: Type,
20877
0
    arg1: Gpr,
20878
0
) -> Gpr {
20879
0
    let v2 = constructor_do_bitrev8(ctx, arg0, arg1);
20880
0
    let v3 = C::ty_mask(ctx, arg0);
20881
0
    let v5 = C::u64_and(ctx, v3, 0xFF00FF00FF00FF);
20882
0
    let v6 = constructor_imm(ctx, arg0, v5);
20883
0
    let v7 = C::gpr_new(ctx, v6);
20884
0
    let v8 = &C::gpr_to_gpr_mem_imm(ctx, v7);
20885
0
    let v9 = constructor_x64_and(ctx, arg0, v2, v8);
20886
0
    let v11 = Imm8Reg::Imm8 {
20887
0
        imm: 0x8,
20888
0
    };
20889
0
    let v12 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
20890
0
    let v13 = constructor_x64_shr(ctx, arg0, v2, v12);
20891
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, v7);
20892
0
    let v15 = constructor_x64_and(ctx, arg0, v13, v14);
20893
0
    let v16 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
20894
0
    let v17 = constructor_x64_shl(ctx, arg0, v9, v16);
20895
0
    let v18 = &C::gpr_to_gpr_mem_imm(ctx, v15);
20896
0
    let v19 = constructor_x64_or(ctx, arg0, v17, v18);
20897
0
    // Rule at src/isa/x64/lower.isle line 2385.
20898
0
    return v19;
20899
0
}
20900
20901
// Generated as internal constructor for term do_bitrev32.
20902
0
pub fn constructor_do_bitrev32<C: Context>(
20903
0
    ctx: &mut C,
20904
0
    arg0: Type,
20905
0
    arg1: Gpr,
20906
0
) -> Gpr {
20907
0
    let v2 = constructor_do_bitrev16(ctx, arg0, arg1);
20908
0
    let v3 = C::ty_mask(ctx, arg0);
20909
0
    let v5 = C::u64_and(ctx, v3, 0xFFFF0000FFFF);
20910
0
    let v6 = constructor_imm(ctx, arg0, v5);
20911
0
    let v7 = C::gpr_new(ctx, v6);
20912
0
    let v8 = &C::gpr_to_gpr_mem_imm(ctx, v7);
20913
0
    let v9 = constructor_x64_and(ctx, arg0, v2, v8);
20914
0
    let v11 = Imm8Reg::Imm8 {
20915
0
        imm: 0x10,
20916
0
    };
20917
0
    let v12 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
20918
0
    let v13 = constructor_x64_shr(ctx, arg0, v2, v12);
20919
0
    let v14 = &C::gpr_to_gpr_mem_imm(ctx, v7);
20920
0
    let v15 = constructor_x64_and(ctx, arg0, v13, v14);
20921
0
    let v16 = &C::imm8_reg_to_imm8_gpr(ctx, &v11);
20922
0
    let v17 = constructor_x64_shl(ctx, arg0, v9, v16);
20923
0
    let v18 = &C::gpr_to_gpr_mem_imm(ctx, v15);
20924
0
    let v19 = constructor_x64_or(ctx, arg0, v17, v18);
20925
0
    // Rule at src/isa/x64/lower.isle line 2397.
20926
0
    return v19;
20927
0
}
20928
20929
// Generated as internal constructor for term do_bitrev64.
20930
0
pub fn constructor_do_bitrev64<C: Context>(
20931
0
    ctx: &mut C,
20932
0
    arg0: Type,
20933
0
    arg1: Gpr,
20934
0
) -> Gpr {
20935
0
    if arg0 == I64 {
20936
0
        let v2 = constructor_do_bitrev32(ctx, arg0, arg1);
20937
0
        let v4 = constructor_imm(ctx, arg0, 0xFFFFFFFF);
20938
0
        let v5 = C::gpr_new(ctx, v4);
20939
0
        let v6 = &C::gpr_to_gpr_mem_imm(ctx, v5);
20940
0
        let v7 = constructor_x64_and(ctx, arg0, v2, v6);
20941
0
        let v9 = Imm8Reg::Imm8 {
20942
0
            imm: 0x20,
20943
0
        };
20944
0
        let v10 = &C::imm8_reg_to_imm8_gpr(ctx, &v9);
20945
0
        let v11 = constructor_x64_shr(ctx, arg0, v2, v10);
20946
0
        let v12 = &C::imm8_reg_to_imm8_gpr(ctx, &v9);
20947
0
        let v13 = constructor_x64_shl(ctx, arg0, v7, v12);
20948
0
        let v14 = &C::gpr_to_gpr_mem_imm(ctx, v11);
20949
0
        let v15 = constructor_x64_or(ctx, arg0, v13, v14);
20950
0
        // Rule at src/isa/x64/lower.isle line 2409.
20951
0
        return v15;
20952
0
    }
20953
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "do_bitrev64", "src/isa/x64/lower.isle line 2408")
20954
0
}
20955
20956
// Generated as internal constructor for term fmadd.
20957
0
pub fn constructor_fmadd<C: Context>(
20958
0
    ctx: &mut C,
20959
0
    arg0: Type,
20960
0
    arg1: Value,
20961
0
    arg2: Value,
20962
0
    arg3: Value,
20963
0
) -> Xmm {
20964
0
    let v24 = C::def_inst(ctx, arg2);
20965
0
    if let Some(v25) = v24 {
20966
0
        let v26 = &C::inst_data(ctx, v25);
20967
        if let &InstructionData::Unary {
20968
0
            opcode: ref v27,
20969
0
            arg: v28,
20970
0
        } = v26 {
20971
0
            if let &Opcode::Fneg = v27 {
20972
0
                let v29 = constructor_fnmadd(ctx, arg0, arg1, v28, arg3);
20973
0
                // Rule at src/isa/x64/lower.isle line 2843.
20974
0
                return v29;
20975
0
            }
20976
0
        }
20977
0
    }
20978
0
    let v18 = C::def_inst(ctx, arg1);
20979
0
    if let Some(v19) = v18 {
20980
0
        let v20 = &C::inst_data(ctx, v19);
20981
        if let &InstructionData::Unary {
20982
0
            opcode: ref v21,
20983
0
            arg: v22,
20984
0
        } = v20 {
20985
0
            if let &Opcode::Fneg = v21 {
20986
0
                let v23 = constructor_fnmadd(ctx, arg0, v22, arg2, arg3);
20987
0
                // Rule at src/isa/x64/lower.isle line 2842.
20988
0
                return v23;
20989
0
            }
20990
0
        }
20991
0
    }
20992
0
    let v14 = &C::sinkable_load(ctx, arg2);
20993
0
    if let Some(v15) = v14 {
20994
0
        let v4 = constructor_put_in_xmm(ctx, arg1);
20995
0
        let v11 = constructor_put_in_xmm(ctx, arg3);
20996
0
        let v16 = &constructor_sink_load_to_xmm_mem(ctx, v15);
20997
0
        let v17 = constructor_x64_vfmadd132(ctx, arg0, v4, v11, v16);
20998
0
        // Rule at src/isa/x64/lower.isle line 2838.
20999
0
        return v17;
21000
0
    }
21001
0
    let v8 = &C::sinkable_load(ctx, arg1);
21002
0
    if let Some(v9) = v8 {
21003
0
        let v10 = constructor_put_in_xmm(ctx, arg2);
21004
0
        let v11 = constructor_put_in_xmm(ctx, arg3);
21005
0
        let v12 = &constructor_sink_load_to_xmm_mem(ctx, v9);
21006
0
        let v13 = constructor_x64_vfmadd132(ctx, arg0, v10, v11, v12);
21007
0
        // Rule at src/isa/x64/lower.isle line 2837.
21008
0
        return v13;
21009
0
    }
21010
0
    let v4 = constructor_put_in_xmm(ctx, arg1);
21011
0
    let v5 = constructor_put_in_xmm(ctx, arg2);
21012
0
    let v6 = &C::put_in_xmm_mem(ctx, arg3);
21013
0
    let v7 = constructor_x64_vfmadd213(ctx, arg0, v4, v5, v6);
21014
0
    // Rule at src/isa/x64/lower.isle line 2832.
21015
0
    return v7;
21016
0
}
21017
21018
// Generated as internal constructor for term fnmadd.
21019
0
pub fn constructor_fnmadd<C: Context>(
21020
0
    ctx: &mut C,
21021
0
    arg0: Type,
21022
0
    arg1: Value,
21023
0
    arg2: Value,
21024
0
    arg3: Value,
21025
0
) -> Xmm {
21026
0
    let v24 = C::def_inst(ctx, arg2);
21027
0
    if let Some(v25) = v24 {
21028
0
        let v26 = &C::inst_data(ctx, v25);
21029
        if let &InstructionData::Unary {
21030
0
            opcode: ref v27,
21031
0
            arg: v28,
21032
0
        } = v26 {
21033
0
            if let &Opcode::Fneg = v27 {
21034
0
                let v29 = constructor_fmadd(ctx, arg0, arg1, v28, arg3);
21035
0
                // Rule at src/isa/x64/lower.isle line 2851.
21036
0
                return v29;
21037
0
            }
21038
0
        }
21039
0
    }
21040
0
    let v18 = C::def_inst(ctx, arg1);
21041
0
    if let Some(v19) = v18 {
21042
0
        let v20 = &C::inst_data(ctx, v19);
21043
        if let &InstructionData::Unary {
21044
0
            opcode: ref v21,
21045
0
            arg: v22,
21046
0
        } = v20 {
21047
0
            if let &Opcode::Fneg = v21 {
21048
0
                let v23 = constructor_fmadd(ctx, arg0, v22, arg2, arg3);
21049
0
                // Rule at src/isa/x64/lower.isle line 2850.
21050
0
                return v23;
21051
0
            }
21052
0
        }
21053
0
    }
21054
0
    let v14 = &C::sinkable_load(ctx, arg2);
21055
0
    if let Some(v15) = v14 {
21056
0
        let v4 = constructor_put_in_xmm(ctx, arg1);
21057
0
        let v11 = constructor_put_in_xmm(ctx, arg3);
21058
0
        let v16 = &constructor_sink_load_to_xmm_mem(ctx, v15);
21059
0
        let v17 = constructor_x64_vfnmadd132(ctx, arg0, v4, v11, v16);
21060
0
        // Rule at src/isa/x64/lower.isle line 2847.
21061
0
        return v17;
21062
0
    }
21063
0
    let v8 = &C::sinkable_load(ctx, arg1);
21064
0
    if let Some(v9) = v8 {
21065
0
        let v10 = constructor_put_in_xmm(ctx, arg2);
21066
0
        let v11 = constructor_put_in_xmm(ctx, arg3);
21067
0
        let v12 = &constructor_sink_load_to_xmm_mem(ctx, v9);
21068
0
        let v13 = constructor_x64_vfnmadd132(ctx, arg0, v10, v11, v12);
21069
0
        // Rule at src/isa/x64/lower.isle line 2846.
21070
0
        return v13;
21071
0
    }
21072
0
    let v4 = constructor_put_in_xmm(ctx, arg1);
21073
0
    let v5 = constructor_put_in_xmm(ctx, arg2);
21074
0
    let v6 = &C::put_in_xmm_mem(ctx, arg3);
21075
0
    let v7 = constructor_x64_vfnmadd213(ctx, arg0, v4, v5, v6);
21076
0
    // Rule at src/isa/x64/lower.isle line 2845.
21077
0
    return v7;
21078
0
}
21079
21080
// Generated as internal constructor for term cmp_zero_i128.
21081
0
pub fn constructor_cmp_zero_i128<C: Context>(
21082
0
    ctx: &mut C,
21083
0
    arg0: &CC,
21084
0
    arg1: ValueRegs,
21085
0
) -> IcmpCondResult {
21086
0
    let v1 = &C::cc_nz_or_z(ctx, arg0);
21087
0
    if let Some(v2) = v1 {
21088
0
        let v5 = constructor_value_regs_get_gpr(ctx, arg1, 0x0);
21089
0
        let v7 = constructor_value_regs_get_gpr(ctx, arg1, 0x1);
21090
0
        let v10 = RegMemImm::Imm {
21091
0
            simm32: 0x0,
21092
0
        };
21093
0
        let v11 = &C::gpr_mem_imm_new(ctx, &v10);
21094
0
        let v12 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v11, v5);
21095
0
        let v14 = &constructor_x64_setcc(ctx, &CC::Z);
21096
0
        let v15 = constructor_with_flags_reg(ctx, v12, v14);
21097
0
        let v16 = C::gpr_new(ctx, v15);
21098
0
        let v17 = &C::gpr_mem_imm_new(ctx, &v10);
21099
0
        let v18 = &constructor_x64_cmp(ctx, &OperandSize::Size64, v17, v7);
21100
0
        let v19 = &constructor_x64_setcc(ctx, &CC::Z);
21101
0
        let v20 = constructor_with_flags_reg(ctx, v18, v19);
21102
0
        let v21 = C::gpr_new(ctx, v20);
21103
0
        let v23 = &C::gpr_to_gpr_mem_imm(ctx, v16);
21104
0
        let v24 = &constructor_x64_test(ctx, &OperandSize::Size8, v23, v21);
21105
0
        let v25 = &constructor_icmp_cond_result(ctx, v24, v2);
21106
0
        // Rule at src/isa/x64/lower.isle line 3319.
21107
0
        return v25.clone();
21108
0
    }
21109
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "cmp_zero_i128", "src/isa/x64/lower.isle line 3318")
21110
0
}
21111
21112
// Generated as internal constructor for term cmp_zero_int_bool_ref.
21113
103k
pub fn constructor_cmp_zero_int_bool_ref<C: Context>(
21114
103k
    ctx: &mut C,
21115
103k
    arg0: Value,
21116
103k
) -> ProducesFlags {
21117
103k
    let v1 = C::value_type(ctx, arg0);
21118
103k
    let v2 = &C::raw_operand_size_of_type(ctx, v1);
21119
103k
    let v3 = constructor_put_in_gpr(ctx, arg0);
21120
103k
    let v4 = &C::gpr_to_gpr_mem_imm(ctx, v3);
21121
103k
    let v5 = &constructor_x64_test(ctx, v2, v4, v3);
21122
103k
    // Rule at src/isa/x64/lower.isle line 3330.
21123
103k
    return v5.clone();
21124
103k
}
21125
21126
// Generated as internal constructor for term lower_swiden_low.
21127
0
pub fn constructor_lower_swiden_low<C: Context>(
21128
0
    ctx: &mut C,
21129
0
    arg0: Type,
21130
0
    arg1: Xmm,
21131
0
) -> Xmm {
21132
0
    match arg0 {
21133
        I16X8 => {
21134
0
            let v2 = &C::xmm_to_xmm_mem(ctx, arg1);
21135
0
            let v3 = constructor_x64_punpcklbw(ctx, arg1, v2);
21136
0
            let v5 = &C::xmi_imm(ctx, 0x8);
21137
0
            let v6 = constructor_x64_psraw(ctx, v3, v5);
21138
0
            // Rule at src/isa/x64/lower.isle line 3744.
21139
0
            return v6;
21140
        }
21141
        I32X4 => {
21142
0
            let v2 = &C::xmm_to_xmm_mem(ctx, arg1);
21143
0
            let v7 = constructor_x64_punpcklwd(ctx, arg1, v2);
21144
0
            let v9 = &C::xmi_imm(ctx, 0x10);
21145
0
            let v10 = constructor_x64_psrad(ctx, v7, v9);
21146
0
            // Rule at src/isa/x64/lower.isle line 3746.
21147
0
            return v10;
21148
        }
21149
        I64X2 => {
21150
0
            let v12 = constructor_xmm_zero(ctx, I32X4);
21151
0
            let v13 = &C::xmm_to_xmm_mem(ctx, arg1);
21152
0
            let v14 = constructor_x64_pcmpgtd(ctx, v12, v13);
21153
0
            let v15 = &C::xmm_to_xmm_mem(ctx, v14);
21154
0
            let v16 = constructor_x64_punpckldq(ctx, arg1, v15);
21155
0
            // Rule at src/isa/x64/lower.isle line 3752.
21156
0
            return v16;
21157
        }
21158
0
        _ => {}
21159
0
    }
21160
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_swiden_low", "src/isa/x64/lower.isle line 3739")
21161
0
}
21162
21163
// Generated as internal constructor for term lower_uwiden_low.
21164
0
pub fn constructor_lower_uwiden_low<C: Context>(
21165
0
    ctx: &mut C,
21166
0
    arg0: Type,
21167
0
    arg1: Xmm,
21168
0
) -> Xmm {
21169
0
    match arg0 {
21170
        I16X8 => {
21171
0
            let v3 = constructor_xmm_zero(ctx, I8X16);
21172
0
            let v4 = &C::xmm_to_xmm_mem(ctx, v3);
21173
0
            let v5 = constructor_x64_punpcklbw(ctx, arg1, v4);
21174
0
            // Rule at src/isa/x64/lower.isle line 3807.
21175
0
            return v5;
21176
        }
21177
        I32X4 => {
21178
0
            let v3 = constructor_xmm_zero(ctx, I8X16);
21179
0
            let v4 = &C::xmm_to_xmm_mem(ctx, v3);
21180
0
            let v6 = constructor_x64_punpcklwd(ctx, arg1, v4);
21181
0
            // Rule at src/isa/x64/lower.isle line 3808.
21182
0
            return v6;
21183
        }
21184
        I64X2 => {
21185
0
            let v8 = constructor_xmm_zero(ctx, F32X4);
21186
0
            let v9 = &C::xmm_to_xmm_mem(ctx, v8);
21187
0
            let v10 = constructor_x64_unpcklps(ctx, arg1, v9);
21188
0
            // Rule at src/isa/x64/lower.isle line 3809.
21189
0
            return v10;
21190
        }
21191
0
        _ => {}
21192
0
    }
21193
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_uwiden_low", "src/isa/x64/lower.isle line 3806")
21194
0
}
21195
21196
// Generated as internal constructor for term unarrow_i32x4_lanes_to_low_u16_lanes.
21197
0
pub fn constructor_unarrow_i32x4_lanes_to_low_u16_lanes<C: Context>(
21198
0
    ctx: &mut C,
21199
0
    arg0: Xmm,
21200
0
) -> Xmm {
21201
0
    let v2 = constructor_xmm_zero(ctx, I32X4);
21202
0
    let v3 = &C::xmm_to_xmm_mem(ctx, v2);
21203
0
    let v4 = constructor_x64_pcmpgtd(ctx, arg0, v3);
21204
0
    let v5 = &C::xmm_to_xmm_mem(ctx, v4);
21205
0
    let v6 = constructor_x64_pand(ctx, arg0, v5);
21206
0
    let v8 = C::emit_u128_le_const(ctx, 0xFFFF0000FFFF0000FFFF0000FFFF);
21207
0
    let v9 = &constructor_const_to_xmm_mem(ctx, v8);
21208
0
    let v10 = constructor_x64_movdqu_load(ctx, v9);
21209
0
    let v11 = &C::xmm_to_xmm_mem(ctx, v6);
21210
0
    let v12 = constructor_x64_pcmpgtd(ctx, v10, v11);
21211
0
    let v13 = &C::xmm_to_xmm_mem(ctx, v12);
21212
0
    let v14 = constructor_x64_pand(ctx, v6, v13);
21213
0
    let v15 = &C::xmm_to_xmm_mem(ctx, v10);
21214
0
    let v16 = constructor_x64_pandn(ctx, v12, v15);
21215
0
    let v17 = &C::xmm_to_xmm_mem(ctx, v16);
21216
0
    let v18 = constructor_x64_por(ctx, v14, v17);
21217
0
    let v19 = &C::xmm_to_xmm_mem(ctx, v18);
21218
0
    let v21 = constructor_x64_pshuflw(ctx, v19, 0x8);
21219
0
    let v22 = &C::xmm_to_xmm_mem(ctx, v21);
21220
0
    let v23 = constructor_x64_pshufhw(ctx, v22, 0x8);
21221
0
    let v24 = &C::xmm_to_xmm_mem(ctx, v23);
21222
0
    let v25 = constructor_x64_pshufd(ctx, v24, 0x8);
21223
0
    // Rule at src/isa/x64/lower.isle line 3889.
21224
0
    return v25;
21225
0
}
21226
21227
// Generated as internal constructor for term x64_round.
21228
0
pub fn constructor_x64_round<C: Context>(
21229
0
    ctx: &mut C,
21230
0
    arg0: Type,
21231
0
    arg1: &RegMem,
21232
0
    arg2: &RoundImm,
21233
0
) -> Xmm {
21234
0
    match arg0 {
21235
        F32 => {
21236
0
            let v3 = C::use_sse41(ctx);
21237
0
            if v3 == true {
21238
0
                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
21239
0
                let v5 = constructor_x64_roundss(ctx, v4, arg2);
21240
0
                // Rule at src/isa/x64/lower.isle line 3957.
21241
0
                return v5;
21242
0
            }
21243
            if let &RegMem::Reg {
21244
0
                reg: v9,
21245
0
            } = arg1 {
21246
0
                let v11 = &constructor_round_libcall(ctx, F32, arg2);
21247
0
                let v12 = C::libcall_1(ctx, v11, v9);
21248
0
                let v13 = C::xmm_new(ctx, v12);
21249
0
                // Rule at src/isa/x64/lower.isle line 3970.
21250
0
                return v13;
21251
0
            }
21252
        }
21253
        F64 => {
21254
0
            let v3 = C::use_sse41(ctx);
21255
0
            if v3 == true {
21256
0
                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
21257
0
                let v6 = constructor_x64_roundsd(ctx, v4, arg2);
21258
0
                // Rule at src/isa/x64/lower.isle line 3960.
21259
0
                return v6;
21260
0
            }
21261
            if let &RegMem::Reg {
21262
0
                reg: v9,
21263
0
            } = arg1 {
21264
0
                let v15 = &constructor_round_libcall(ctx, F64, arg2);
21265
0
                let v16 = C::libcall_1(ctx, v15, v9);
21266
0
                let v17 = C::xmm_new(ctx, v16);
21267
0
                // Rule at src/isa/x64/lower.isle line 3971.
21268
0
                return v17;
21269
0
            }
21270
        }
21271
        F32X4 => {
21272
0
            let v3 = C::use_sse41(ctx);
21273
0
            if v3 == true {
21274
0
                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
21275
0
                let v7 = constructor_x64_roundps(ctx, v4, arg2);
21276
0
                // Rule at src/isa/x64/lower.isle line 3963.
21277
0
                return v7;
21278
0
            }
21279
            if let &RegMem::Reg {
21280
0
                reg: v9,
21281
0
            } = arg1 {
21282
0
                let v11 = &constructor_round_libcall(ctx, F32, arg2);
21283
0
                let v12 = C::libcall_1(ctx, v11, v9);
21284
0
                let v13 = C::xmm_new(ctx, v12);
21285
0
                let v18 = &constructor_reg_to_xmm_mem(ctx, v9);
21286
0
                let v20 = constructor_x64_pshufd(ctx, v18, 0x1);
21287
0
                let v21 = C::xmm_to_reg(ctx, v20);
21288
0
                let v22 = C::libcall_1(ctx, v11, v21);
21289
0
                let v23 = C::xmm_new(ctx, v22);
21290
0
                let v25 = C::xmm_to_reg(ctx, v23);
21291
0
                let v26 = &constructor_xmm_to_reg_mem(ctx, v25);
21292
0
                let v27 = &C::xmm_mem_to_reg_mem(ctx, v26);
21293
0
                let v28 = constructor_vec_insert_lane(ctx, F32X4, v13, v27, 0x1);
21294
0
                let v29 = &constructor_reg_to_xmm_mem(ctx, v9);
21295
0
                let v31 = constructor_x64_pshufd(ctx, v29, 0x2);
21296
0
                let v32 = C::xmm_to_reg(ctx, v31);
21297
0
                let v33 = C::libcall_1(ctx, v11, v32);
21298
0
                let v34 = C::xmm_new(ctx, v33);
21299
0
                let v35 = C::xmm_to_reg(ctx, v34);
21300
0
                let v36 = &constructor_xmm_to_reg_mem(ctx, v35);
21301
0
                let v37 = &C::xmm_mem_to_reg_mem(ctx, v36);
21302
0
                let v38 = constructor_vec_insert_lane(ctx, F32X4, v28, v37, 0x2);
21303
0
                let v39 = &constructor_reg_to_xmm_mem(ctx, v9);
21304
0
                let v41 = constructor_x64_pshufd(ctx, v39, 0x3);
21305
0
                let v42 = C::xmm_to_reg(ctx, v41);
21306
0
                let v43 = C::libcall_1(ctx, v11, v42);
21307
0
                let v44 = C::xmm_new(ctx, v43);
21308
0
                let v45 = C::xmm_to_reg(ctx, v44);
21309
0
                let v46 = &constructor_xmm_to_reg_mem(ctx, v45);
21310
0
                let v47 = &C::xmm_mem_to_reg_mem(ctx, v46);
21311
0
                let v48 = constructor_vec_insert_lane(ctx, F32X4, v38, v47, 0x3);
21312
0
                // Rule at src/isa/x64/lower.isle line 3972.
21313
0
                return v48;
21314
0
            }
21315
        }
21316
        F64X2 => {
21317
0
            let v3 = C::use_sse41(ctx);
21318
0
            if v3 == true {
21319
0
                let v4 = &C::reg_mem_to_xmm_mem(ctx, arg1);
21320
0
                let v8 = constructor_x64_roundpd(ctx, v4, arg2);
21321
0
                // Rule at src/isa/x64/lower.isle line 3966.
21322
0
                return v8;
21323
0
            }
21324
            if let &RegMem::Reg {
21325
0
                reg: v9,
21326
0
            } = arg1 {
21327
0
                let v15 = &constructor_round_libcall(ctx, F64, arg2);
21328
0
                let v16 = C::libcall_1(ctx, v15, v9);
21329
0
                let v17 = C::xmm_new(ctx, v16);
21330
0
                let v18 = &constructor_reg_to_xmm_mem(ctx, v9);
21331
0
                let v50 = constructor_x64_pshufd(ctx, v18, 0xE);
21332
0
                let v51 = C::xmm_to_reg(ctx, v50);
21333
0
                let v52 = C::libcall_1(ctx, v15, v51);
21334
0
                let v53 = C::xmm_new(ctx, v52);
21335
0
                let v55 = C::xmm_to_reg(ctx, v53);
21336
0
                let v56 = &constructor_xmm_to_reg_mem(ctx, v55);
21337
0
                let v57 = &C::xmm_mem_to_reg_mem(ctx, v56);
21338
0
                let v58 = constructor_vec_insert_lane(ctx, F64X2, v17, v57, 0x1);
21339
0
                // Rule at src/isa/x64/lower.isle line 3984.
21340
0
                return v58;
21341
0
            }
21342
        }
21343
0
        _ => {}
21344
    }
21345
    if let &RegMem::Mem {
21346
0
        addr: ref v59,
21347
0
    } = arg1 {
21348
0
        let v61 = constructor_x64_load(ctx, arg0, v59, &ExtKind::ZeroExtend);
21349
0
        let v62 = RegMem::Reg {
21350
0
            reg: v61,
21351
0
        };
21352
0
        let v63 = constructor_x64_round(ctx, arg0, &v62, arg2);
21353
0
        // Rule at src/isa/x64/lower.isle line 3992.
21354
0
        return v63;
21355
0
    }
21356
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "x64_round", "src/isa/x64/lower.isle line 3956")
21357
0
}
21358
21359
// Generated as internal constructor for term round_libcall.
21360
0
pub fn constructor_round_libcall<C: Context>(
21361
0
    ctx: &mut C,
21362
0
    arg0: Type,
21363
0
    arg1: &RoundImm,
21364
0
) -> LibCall {
21365
0
    match arg0 {
21366
        F32 => {
21367
0
            match arg1 {
21368
                &RoundImm::RoundNearest => {
21369
                    // Rule at src/isa/x64/lower.isle line 4000.
21370
0
                    return LibCall::NearestF32;
21371
                }
21372
                &RoundImm::RoundDown => {
21373
                    // Rule at src/isa/x64/lower.isle line 3998.
21374
0
                    return LibCall::FloorF32;
21375
                }
21376
                &RoundImm::RoundUp => {
21377
                    // Rule at src/isa/x64/lower.isle line 3996.
21378
0
                    return LibCall::CeilF32;
21379
                }
21380
                &RoundImm::RoundZero => {
21381
                    // Rule at src/isa/x64/lower.isle line 4002.
21382
0
                    return LibCall::TruncF32;
21383
                }
21384
0
                _ => {}
21385
            }
21386
        }
21387
        F64 => {
21388
0
            match arg1 {
21389
                &RoundImm::RoundNearest => {
21390
                    // Rule at src/isa/x64/lower.isle line 4001.
21391
0
                    return LibCall::NearestF64;
21392
                }
21393
                &RoundImm::RoundDown => {
21394
                    // Rule at src/isa/x64/lower.isle line 3999.
21395
0
                    return LibCall::FloorF64;
21396
                }
21397
                &RoundImm::RoundUp => {
21398
                    // Rule at src/isa/x64/lower.isle line 3997.
21399
0
                    return LibCall::CeilF64;
21400
                }
21401
                &RoundImm::RoundZero => {
21402
                    // Rule at src/isa/x64/lower.isle line 4003.
21403
0
                    return LibCall::TruncF64;
21404
                }
21405
0
                _ => {}
21406
            }
21407
        }
21408
0
        _ => {}
21409
    }
21410
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "round_libcall", "src/isa/x64/lower.isle line 3995")
21411
0
}
21412
21413
// Generated as internal constructor for term nonzero_sdiv_divisor.
21414
454
pub fn constructor_nonzero_sdiv_divisor<C: Context>(
21415
454
    ctx: &mut C,
21416
454
    arg0: Type,
21417
454
    arg1: Value,
21418
454
) -> Reg {
21419
454
    let v2 = C::def_inst(ctx, arg1);
21420
454
    if let Some(v3) = v2 {
21421
454
        let v4 = &C::inst_data(ctx, v3);
21422
        if let &InstructionData::UnaryImm {
21423
454
            opcode: ref v5,
21424
454
            imm: v6,
21425
454
        } = v4 {
21426
454
            if let &Opcode::Iconst = v5 {
21427
454
                let v7 = C::safe_divisor_from_imm64(ctx, arg0, v6);
21428
454
                if let Some(v8) = v7 {
21429
454
                    let v9 = constructor_imm(ctx, arg0, v8);
21430
454
                    // Rule at src/isa/x64/lower.isle line 4083.
21431
454
                    return v9;
21432
0
                }
21433
0
            }
21434
0
        }
21435
0
    }
21436
0
    let v10 = C::put_in_reg(ctx, arg1);
21437
0
    let v11 = &C::raw_operand_size_of_type(ctx, arg0);
21438
0
    let v12 = &constructor_reg_to_gpr_mem_imm(ctx, v10);
21439
0
    let v13 = C::gpr_new(ctx, v10);
21440
0
    let v14 = &constructor_x64_test(ctx, v11, v12, v13);
21441
0
    let v17 = &constructor_trap_if(ctx, &CC::Z, &TrapCode::IntegerDivisionByZero);
21442
0
    let v18 = &constructor_with_flags_side_effect(ctx, v14, v17);
21443
0
    let v19 = constructor_side_effect(ctx, v18);
21444
0
    // Rule at src/isa/x64/lower.isle line 4086.
21445
0
    return v10;
21446
454
}
21447
21448
// Generated as internal constructor for term lower_pshufb.
21449
0
pub fn constructor_lower_pshufb<C: Context>(
21450
0
    ctx: &mut C,
21451
0
    arg0: Xmm,
21452
0
    arg1: &RegMem,
21453
0
) -> Xmm {
21454
0
    let v2 = C::use_ssse3(ctx);
21455
0
    if v2 == true {
21456
0
        let v3 = &C::reg_mem_to_xmm_mem(ctx, arg1);
21457
0
        let v4 = constructor_x64_pshufb(ctx, arg0, v3);
21458
0
        // Rule at src/isa/x64/lower.isle line 4379.
21459
0
        return v4;
21460
0
    }
21461
0
    match arg1 {
21462
        &RegMem::Reg {
21463
0
            reg: v5,
21464
0
        } => {
21465
0
            let v7 = C::xmm_to_reg(ctx, arg0);
21466
0
            let v8 = C::libcall_2(ctx, &LibCall::X86Pshufb, v7, v5);
21467
0
            let v9 = C::xmm_new(ctx, v8);
21468
0
            // Rule at src/isa/x64/lower.isle line 4382.
21469
0
            return v9;
21470
        }
21471
        &RegMem::Mem {
21472
0
            addr: ref v10,
21473
0
        } => {
21474
0
            let v11 = &constructor_synthetic_amode_to_xmm_mem(ctx, v10);
21475
0
            let v12 = constructor_x64_movdqu_load(ctx, v11);
21476
0
            let v13 = C::xmm_to_reg(ctx, v12);
21477
0
            let v14 = &constructor_xmm_to_reg_mem(ctx, v13);
21478
0
            let v15 = &C::xmm_mem_to_reg_mem(ctx, v14);
21479
0
            let v16 = constructor_lower_pshufb(ctx, arg0, v15);
21480
0
            // Rule at src/isa/x64/lower.isle line 4384.
21481
0
            return v16;
21482
        }
21483
0
        _ => {}
21484
0
    }
21485
0
unreachable!("no rule matched for term {} at {}; should it be partial?", "lower_pshufb", "src/isa/x64/lower.isle line 4378")
21486
0
}